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Commit d50f58bb authored by Russell King's avatar Russell King
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Merge branch 'for-rmk' of git://git.pengutronix.de/git/imx/linux-2.6 into devel-stable

parents 129961ec 79d3c2c2
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Showing with 6208 additions and 2917 deletions
arch/arm/Makefile
View file @ d50f58bb
......@@ -150,8 +150,8 @@ machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx
machine-$(CONFIG_ARCH_MMP) := mmp
machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_MX1) := mx1
machine-$(CONFIG_ARCH_MX2) := mx2
machine-$(CONFIG_ARCH_MX1) := imx
machine-$(CONFIG_ARCH_MX2) := imx
machine-$(CONFIG_ARCH_MX25) := mx25
machine-$(CONFIG_ARCH_MX3) := mx3
machine-$(CONFIG_ARCH_MX5) := mx5
......
arch/arm/mach-mx2/Kconfig → arch/arm/mach-imx/Kconfig
View file @ d50f58bb
config IMX_HAVE_DMA_V1
bool
if ARCH_MX1
config SOC_IMX1
select CPU_ARM920T
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
bool
comment "MX1 platforms:"
config MACH_MXLADS
bool
config ARCH_MX1ADS
bool "MX1ADS platform"
select MACH_MXLADS
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
help
Say Y here if you are using Motorola MX1ADS/MXLADS boards
config MACH_SCB9328
bool "Synertronixx scb9328"
select IMX_HAVE_PLATFORM_IMX_UART
help
Say Y here if you are using a Synertronixx scb9328 board
endif
if ARCH_MX2
config SOC_IMX21
select CPU_ARM926T
select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
bool
config SOC_IMX27
select CPU_ARM926T
select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
bool
choice
prompt "CPUs:"
default MACH_MX21
config MACH_MX21
bool "i.MX21 support"
select ARCH_MXC_AUDMUX_V1
select SOC_IMX21
help
This enables support for Freescale's MX2 based i.MX21 processor.
config MACH_MX27
bool "i.MX27 support"
select ARCH_MXC_AUDMUX_V1
select SOC_IMX27
help
This enables support for Freescale's MX2 based i.MX27 processor.
endchoice
comment "MX2 platforms:"
endif
if MACH_MX21
comment "MX21 platforms:"
config MACH_MX21ADS
bool "MX21ADS platform"
depends on MACH_MX21
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for MX21ADS platform. This includes specific
configurations for the board and its peripherals.
endif
if MACH_MX27
comment "MX27 platforms:"
config MACH_MX27ADS
bool "MX27ADS platform"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for MX27ADS platform. This includes specific
configurations for the board and its peripherals.
config MACH_PCM038
bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_ULPI if USB_ULPI
help
Include support for phyCORE-i.MX27 (aka pcm038) platform. This
......@@ -58,7 +119,9 @@ endchoice
config MACH_CPUIMX27
bool "Eukrea CPUIMX27 module"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for Eukrea CPUIMX27 platform. This includes
specific configurations for the module and its peripherals.
......@@ -67,9 +130,16 @@ config MACH_EUKREA_CPUIMX27_USESDHC2
bool "CPUIMX27 integrates SDHC2 module"
depends on MACH_CPUIMX27
help
This adds support for the internal SDHC2 used on CPUIMX27 used
This adds support for the internal SDHC2 used on CPUIMX27
for wifi or eMMC.
config MACH_EUKREA_CPUIMX27_USEUART4
bool "CPUIMX27 integrates UART4 module"
depends on MACH_CPUIMX27
help
This adds support for the internal UART4 used on CPUIMX27
for bluetooth.
choice
prompt "Baseboard"
depends on MACH_CPUIMX27
......@@ -78,6 +148,8 @@ choice
config MACH_EUKREA_MBIMX27_BASEBOARD
prompt "Eukrea MBIMX27 development board"
bool
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SPI_IMX
help
This adds board specific devices that can be found on Eukrea's
MBIMX27 evaluation board.
......@@ -86,21 +158,24 @@ endchoice
config MACH_MX27_3DS
bool "MX27PDK platform"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_UART
help
Include support for MX27PDK platform. This includes specific
configurations for the board and its peripherals.
config MACH_IMX27LITE
bool "LogicPD MX27 LITEKIT platform"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_UART
help
Include support for MX27 LITEKIT platform. This includes specific
configurations for the board and its peripherals.
config MACH_PCA100
bool "Phytec phyCARD-s (pca100)"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_ULPI if USB_ULPI
help
Include support for phyCARD-s (aka pca100) platform. This
......@@ -108,7 +183,9 @@ config MACH_PCA100
config MACH_MXT_TD60
bool "Maxtrack i-MXT TD60"
depends on MACH_MX27
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
help
Include support for i-MXT (aka td60) platform. This
includes specific configurations for the module and its peripherals.
......
arch/arm/mach-mx2/Makefile → arch/arm/mach-imx/Makefile
View file @ d50f58bb
......@@ -4,14 +4,24 @@
# Object file lists.
obj-y := devices.o serial.o
obj-y := devices.o
obj-$(CONFIG_MACH_MX21) += clock_imx21.o mm-imx21.o
obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
obj-$(CONFIG_MACH_MX27) += cpu_imx27.o
obj-$(CONFIG_MACH_MX27) += clock_imx27.o mm-imx27.o
obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o
# Support for CMOS sensor interface
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
obj-$(CONFIG_MACH_PCM038) += mach-pcm038.o
obj-$(CONFIG_MACH_PCM970_BASEBOARD) += pcm970-baseboard.o
......
arch/arm/mach-mx2/Makefile.boot → arch/arm/mach-imx/Makefile.boot
View file @ d50f58bb
zreladdr-$(CONFIG_ARCH_MX1) := 0x08008000
params_phys-$(CONFIG_ARCH_MX1) := 0x08000100
initrd_phys-$(CONFIG_ARCH_MX1) := 0x08800000
zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000
params_phys-$(CONFIG_MACH_MX21) := 0xC0000100
initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000
......
arch/arm/mach-mx1/clock.c → arch/arm/mach-imx/clock-imx1.c
View file @ d50f58bb
......@@ -2,18 +2,17 @@
* Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#include <linux/kernel.h>
......@@ -29,7 +28,41 @@
#include <mach/clock.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include "crm_regs.h"
#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
/* CCM register addresses */
#define CCM_CSCR IO_ADDR_CCM(0x0)
#define CCM_MPCTL0 IO_ADDR_CCM(0x4)
#define CCM_SPCTL0 IO_ADDR_CCM(0xc)
#define CCM_PCDR IO_ADDR_CCM(0x20)
#define CCM_CSCR_CLKO_OFFSET 29
#define CCM_CSCR_CLKO_MASK (0x7 << 29)
#define CCM_CSCR_USB_OFFSET 26
#define CCM_CSCR_USB_MASK (0x7 << 26)
#define CCM_CSCR_OSC_EN_SHIFT 17
#define CCM_CSCR_SYSTEM_SEL (1 << 16)
#define CCM_CSCR_BCLK_OFFSET 10
#define CCM_CSCR_BCLK_MASK (0xf << 10)
#define CCM_CSCR_PRESC (1 << 15)
#define CCM_PCDR_PCLK3_OFFSET 16
#define CCM_PCDR_PCLK3_MASK (0x7f << 16)
#define CCM_PCDR_PCLK2_OFFSET 4
#define CCM_PCDR_PCLK2_MASK (0xf << 4)
#define CCM_PCDR_PCLK1_OFFSET 0
#define CCM_PCDR_PCLK1_MASK 0xf
#define IO_ADDR_SCM(off) (MX1_IO_ADDRESS(MX1_SCM_BASE_ADDR + (off)))
/* SCM register addresses */
#define SCM_GCCR IO_ADDR_SCM(0xc)
#define SCM_GCCR_DMA_CLK_EN_OFFSET 3
#define SCM_GCCR_CSI_CLK_EN_OFFSET 2
#define SCM_GCCR_MMA_CLK_EN_OFFSET 1
#define SCM_GCCR_USBD_CLK_EN_OFFSET 0
static int _clk_enable(struct clk *clk)
{
......@@ -596,7 +629,8 @@ int __init mx1_clocks_init(unsigned long fref)
clk_enable(&hclk);
clk_enable(&fclk);
mxc_timer_init(&gpt_clk, IO_ADDRESS(TIM1_BASE_ADDR), TIM1_INT);
mxc_timer_init(&gpt_clk, MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR),
MX1_TIM1_INT);
return 0;
}
arch/arm/mach-mx2/clock_imx27.c → arch/arm/mach-imx/clock-imx27.c
View file @ d50f58bb
......@@ -644,7 +644,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
_REGISTER_CLOCK("spi_imx.2", NULL, cspi3_clk)
_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
_REGISTER_CLOCK(NULL, "csi", csi_clk)
_REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk)
_REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk1)
_REGISTER_CLOCK("mxc-ehci.0", "usb", usb_clk)
......
arch/arm/mach-imx/devices-imx1.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx1.h>
#include <mach/devices-common.h>
#define imx1_add_i2c_imx(pdata) \
imx_add_imx_i2c(0, MX1_I2C_BASE_ADDR, SZ_4K, MX1_INT_I2C, pdata)
#define imx1_add_imx_uart0(pdata) \
imx_add_imx_uart_3irq(0, MX1_UART1_BASE_ADDR, 0xd0, MX1_INT_UART1RX, MX1_INT_UART1TX, MX1_INT_UART1RTS, pdata)
#define imx1_add_imx_uart1(pdata) \
imx_add_imx_uart_3irq(0, MX1_UART2_BASE_ADDR, 0xd0, MX1_INT_UART2RX, MX1_INT_UART2TX, MX1_INT_UART2RTS, pdata)
arch/arm/mach-imx/devices-imx21.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx21.h>
#include <mach/devices-common.h>
#define imx21_add_i2c_imx(pdata) \
imx_add_imx_i2c(0, MX2x_I2C_BASE_ADDR, SZ_4K, MX2x_INT_I2C, pdata)
#define imx21_add_imx_uart0(pdata) \
imx_add_imx_uart_1irq(0, MX21_UART1_BASE_ADDR, SZ_4K, MX21_INT_UART1, pdata)
#define imx21_add_imx_uart1(pdata) \
imx_add_imx_uart_1irq(1, MX21_UART2_BASE_ADDR, SZ_4K, MX21_INT_UART2, pdata)
#define imx21_add_imx_uart2(pdata) \
imx_add_imx_uart_1irq(2, MX21_UART3_BASE_ADDR, SZ_4K, MX21_INT_UART3, pdata)
#define imx21_add_imx_uart3(pdata) \
imx_add_imx_uart_1irq(3, MX21_UART4_BASE_ADDR, SZ_4K, MX21_INT_UART4, pdata)
#define imx21_add_mxc_nand(pdata) \
imx_add_mxc_nand_v1(MX21_NFC_BASE_ADDR, MX21_INT_NANDFC, pdata)
#define imx21_add_spi_imx0(pdata) \
imx_add_spi_imx(0, MX21_CSPI1_BASE_ADDR, SZ_4K, MX21_INT_CSPI1, pdata)
#define imx21_add_spi_imx1(pdata) \
imx_add_spi_imx(1, MX21_CSPI2_BASE_ADDR, SZ_4K, MX21_INT_CSPI2, pdata)
arch/arm/mach-imx/devices-imx27.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx27.h>
#include <mach/devices-common.h>
#define imx27_add_i2c_imx0(pdata) \
imx_add_imx_i2c(0, MX27_I2C1_BASE_ADDR, SZ_4K, MX27_INT_I2C1, pdata)
#define imx27_add_i2c_imx1(pdata) \
imx_add_imx_i2c(1, MX27_I2C2_BASE_ADDR, SZ_4K, MX27_INT_I2C2, pdata)
#define imx27_add_imx_uart0(pdata) \
imx_add_imx_uart_1irq(0, MX27_UART1_BASE_ADDR, SZ_4K, MX27_INT_UART1, pdata)
#define imx27_add_imx_uart1(pdata) \
imx_add_imx_uart_1irq(1, MX27_UART2_BASE_ADDR, SZ_4K, MX27_INT_UART2, pdata)
#define imx27_add_imx_uart2(pdata) \
imx_add_imx_uart_1irq(2, MX27_UART3_BASE_ADDR, SZ_4K, MX27_INT_UART3, pdata)
#define imx27_add_imx_uart3(pdata) \
imx_add_imx_uart_1irq(3, MX27_UART4_BASE_ADDR, SZ_4K, MX27_INT_UART4, pdata)
#define imx27_add_imx_uart4(pdata) \
imx_add_imx_uart_1irq(4, MX27_UART5_BASE_ADDR, SZ_4K, MX27_INT_UART5, pdata)
#define imx27_add_imx_uart5(pdata) \
imx_add_imx_uart_1irq(5, MX27_UART6_BASE_ADDR, SZ_4K, MX27_INT_UART6, pdata)
#define imx27_add_mxc_nand(pdata) \
imx_add_mxc_nand_v1(MX27_NFC_BASE_ADDR, MX27_INT_NANDFC, pdata)
#define imx27_add_spi_imx0(pdata) \
imx_add_spi_imx(0, MX27_CSPI1_BASE_ADDR, SZ_4K, MX27_INT_CSPI1, pdata)
#define imx27_add_spi_imx1(pdata) \
imx_add_spi_imx(1, MX27_CSPI2_BASE_ADDR, SZ_4K, MX27_INT_CSPI2, pdata)
#define imx27_add_spi_imx2(pdata) \
imx_add_spi_imx(2, MX27_CSPI3_BASE_ADDR, SZ_4K, MX27_INT_CSPI3, pdata)
arch/arm/mach-mx2/devices.c → arch/arm/mach-imx/devices.c
View file @ d50f58bb
......@@ -11,6 +11,9 @@
*
* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
* Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
* Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
......@@ -32,6 +35,7 @@
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/dma-mapping.h>
#include <linux/serial.h>
#include <mach/irqs.h>
#include <mach/hardware.h>
......@@ -40,38 +44,179 @@
#include "devices.h"
/*
* SPI master controller
*
* - i.MX1: 2 channel (slighly different register setting)
* - i.MX21: 2 channel
* - i.MX27: 3 channel
*/
#define DEFINE_IMX_SPI_DEVICE(n, baseaddr, irq) \
static struct resource mxc_spi_resources ## n[] = { \
{ \
.start = baseaddr, \
.end = baseaddr + SZ_4K - 1, \
.flags = IORESOURCE_MEM, \
}, { \
.start = irq, \
.end = irq, \
.flags = IORESOURCE_IRQ, \
}, \
}; \
\
struct platform_device mxc_spi_device ## n = { \
.name = "spi_imx", \
.id = n, \
.num_resources = ARRAY_SIZE(mxc_spi_resources ## n), \
.resource = mxc_spi_resources ## n, \
#if defined(CONFIG_ARCH_MX1)
static struct resource imx1_camera_resources[] = {
{
.start = 0x00224000,
.end = 0x00224010,
.flags = IORESOURCE_MEM,
}, {
.start = MX1_CSI_INT,
.end = MX1_CSI_INT,
.flags = IORESOURCE_IRQ,
},
};
static u64 imx1_camera_dmamask = DMA_BIT_MASK(32);
struct platform_device imx1_camera_device = {
.name = "mx1-camera",
.id = 0, /* This is used to put cameras on this interface */
.dev = {
.dma_mask = &imx1_camera_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
},
.resource = imx1_camera_resources,
.num_resources = ARRAY_SIZE(imx1_camera_resources),
};
static struct resource imx_rtc_resources[] = {
{
.start = 0x00204000,
.end = 0x00204024,
.flags = IORESOURCE_MEM,
}, {
.start = MX1_RTC_INT,
.end = MX1_RTC_INT,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_RTC_SAMINT,
.end = MX1_RTC_SAMINT,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_rtc_device = {
.name = "rtc-imx",
.id = 0,
.resource = imx_rtc_resources,
.num_resources = ARRAY_SIZE(imx_rtc_resources),
};
static struct resource imx_wdt_resources[] = {
{
.start = 0x00201000,
.end = 0x00201008,
.flags = IORESOURCE_MEM,
}, {
.start = MX1_WDT_INT,
.end = MX1_WDT_INT,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_wdt_device = {
.name = "imx-wdt",
.id = 0,
.resource = imx_wdt_resources,
.num_resources = ARRAY_SIZE(imx_wdt_resources),
};
static struct resource imx_usb_resources[] = {
{
.start = 0x00212000,
.end = 0x00212148,
.flags = IORESOURCE_MEM,
}, {
.start = MX1_USBD_INT0,
.end = MX1_USBD_INT0,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT1,
.end = MX1_USBD_INT1,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT2,
.end = MX1_USBD_INT2,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT3,
.end = MX1_USBD_INT3,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT4,
.end = MX1_USBD_INT4,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT5,
.end = MX1_USBD_INT5,
.flags = IORESOURCE_IRQ,
}, {
.start = MX1_USBD_INT6,
.end = MX1_USBD_INT6,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_usb_device = {
.name = "imx_udc",
.id = 0,
.num_resources = ARRAY_SIZE(imx_usb_resources),
.resource = imx_usb_resources,
};
/* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = {
{
.chip.label = "gpio-0",
.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR),
.irq = MX1_GPIO_INT_PORTA,
.virtual_irq_start = MXC_GPIO_IRQ_START,
}, {
.chip.label = "gpio-1",
.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x100),
.irq = MX1_GPIO_INT_PORTB,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
}, {
.chip.label = "gpio-2",
.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x200),
.irq = MX1_GPIO_INT_PORTC,
.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
}, {
.chip.label = "gpio-3",
.base = (void __iomem *)MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR + 0x300),
.irq = MX1_GPIO_INT_PORTD,
.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
}
};
int __init imx1_register_gpios(void)
{
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
}
#endif
DEFINE_IMX_SPI_DEVICE(0, MX2x_CSPI1_BASE_ADDR, MX2x_INT_CSPI1);
DEFINE_IMX_SPI_DEVICE(1, MX2x_CSPI2_BASE_ADDR, MX2x_INT_CSPI2);
#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
#ifdef CONFIG_MACH_MX27
DEFINE_IMX_SPI_DEVICE(2, MX27_CSPI3_BASE_ADDR, MX27_INT_CSPI3);
static struct resource mx27_camera_resources[] = {
{
.start = MX27_CSI_BASE_ADDR,
.end = MX27_CSI_BASE_ADDR + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.start = MX27_EMMA_PRP_BASE_ADDR,
.end = MX27_EMMA_PRP_BASE_ADDR + 0x1f,
.flags = IORESOURCE_MEM,
}, {
.start = MX27_INT_CSI,
.end = MX27_INT_CSI,
.flags = IORESOURCE_IRQ,
},{
.start = MX27_INT_EMMAPRP,
.end = MX27_INT_EMMAPRP,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mx27_camera_device = {
.name = "mx2-camera",
.id = 0,
.num_resources = ARRAY_SIZE(mx27_camera_resources),
.resource = mx27_camera_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
#endif
/*
......@@ -140,34 +285,6 @@ struct platform_device mxc_w1_master_device = {
.resource = mxc_w1_master_resources,
};
#define DEFINE_MXC_NAND_DEVICE(pfx, baseaddr, irq) \
static struct resource pfx ## _nand_resources[] = { \
{ \
.start = baseaddr, \
.end = baseaddr + SZ_4K - 1, \
.flags = IORESOURCE_MEM, \
}, { \
.start = irq, \
.end = irq, \
.flags = IORESOURCE_IRQ, \
}, \
}; \
\
struct platform_device pfx ## _nand_device = { \
.name = "mxc_nand", \
.id = 0, \
.num_resources = ARRAY_SIZE(pfx ## _nand_resources), \
.resource = pfx ## _nand_resources, \
}
#ifdef CONFIG_MACH_MX21
DEFINE_MXC_NAND_DEVICE(imx21, MX21_NFC_BASE_ADDR, MX21_INT_NANDFC);
#endif
#ifdef CONFIG_MACH_MX27
DEFINE_MXC_NAND_DEVICE(imx27, MX27_NFC_BASE_ADDR, MX27_INT_NANDFC);
#endif
/*
* lcdc:
* - i.MX1: the basic controller
......@@ -218,32 +335,6 @@ struct platform_device mxc_fec_device = {
};
#endif
#define DEFINE_IMX_I2C_DEVICE(n, baseaddr, irq) \
static struct resource mxc_i2c_resources ## n[] = { \
{ \
.start = baseaddr, \
.end = baseaddr + SZ_4K - 1, \
.flags = IORESOURCE_MEM, \
}, { \
.start = irq, \
.end = irq, \
.flags = IORESOURCE_IRQ, \
} \
}; \
\
struct platform_device mxc_i2c_device ## n = { \
.name = "imx-i2c", \
.id = n, \
.num_resources = ARRAY_SIZE(mxc_i2c_resources ## n), \
.resource = mxc_i2c_resources ## n, \
}
DEFINE_IMX_I2C_DEVICE(0, MX2x_I2C_BASE_ADDR, MX2x_INT_I2C);
#ifdef CONFIG_MACH_MX27
DEFINE_IMX_I2C_DEVICE(1, MX27_I2C2_BASE_ADDR, MX27_INT_I2C2);
#endif
static struct resource mxc_pwm_resources[] = {
{
.start = MX2x_PWM_BASE_ADDR,
......@@ -454,26 +545,21 @@ DEFINE_IMX_SSI_DEVICE(1, 2, MX2x_SSI1_BASE_ADDR, MX2x_INT_SSI1);
#ifdef CONFIG_MACH_MX21
DEFINE_MXC_GPIO_PORTS(MX21, imx21);
int __init imx21_register_gpios(void)
{
return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
}
#endif
#ifdef CONFIG_MACH_MX27
DEFINE_MXC_GPIO_PORTS(MX27, imx27);
#endif
int __init mxc_register_gpios(void)
int __init imx27_register_gpios(void)
{
#ifdef CONFIG_MACH_MX21
if (cpu_is_mx21())
return mxc_gpio_init(imx21_gpio_ports, ARRAY_SIZE(imx21_gpio_ports));
else
#endif
#ifdef CONFIG_MACH_MX27
if (cpu_is_mx27())
return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
else
#endif
return 0;
return mxc_gpio_init(imx27_gpio_ports, ARRAY_SIZE(imx27_gpio_ports));
}
#endif
#ifdef CONFIG_MACH_MX21
static struct resource mx21_usbhc_resources[] = {
......@@ -501,3 +587,23 @@ struct platform_device mx21_usbhc_device = {
};
#endif
static struct resource imx_kpp_resources[] = {
{
.start = MX2x_KPP_BASE_ADDR,
.end = MX2x_KPP_BASE_ADDR + 0xf,
.flags = IORESOURCE_MEM
}, {
.start = MX2x_INT_KPP,
.end = MX2x_INT_KPP,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_kpp_device = {
.name = "imx-keypad",
.id = -1,
.num_resources = ARRAY_SIZE(imx_kpp_resources),
.resource = imx_kpp_resources,
};
#endif
arch/arm/mach-mx2/devices.h → arch/arm/mach-imx/devices.h
View file @ d50f58bb
#ifdef CONFIG_ARCH_MX1
extern struct platform_device imx1_camera_device;
extern struct platform_device imx_rtc_device;
extern struct platform_device imx_wdt_device;
extern struct platform_device imx_usb_device;
#endif
#if defined(CONFIG_MACH_MX21) || defined(CONFIG_MACH_MX27)
extern struct platform_device mxc_gpt1;
extern struct platform_device mxc_gpt2;
#ifdef CONFIG_MACH_MX27
......@@ -6,37 +14,19 @@ extern struct platform_device mxc_gpt4;
extern struct platform_device mxc_gpt5;
#endif
extern struct platform_device mxc_wdt;
extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_uart_device3;
extern struct platform_device mxc_uart_device4;
extern struct platform_device mxc_uart_device5;
extern struct platform_device mxc_w1_master_device;
#ifdef CONFIG_MACH_MX21
extern struct platform_device imx21_nand_device;
#endif
#ifdef CONFIG_MACH_MX27
extern struct platform_device imx27_nand_device;
#endif
extern struct platform_device mxc_fb_device;
extern struct platform_device mxc_fec_device;
extern struct platform_device mxc_pwm_device;
extern struct platform_device mxc_i2c_device0;
#ifdef CONFIG_MACH_MX27
extern struct platform_device mxc_i2c_device1;
#endif
extern struct platform_device mxc_sdhc_device0;
extern struct platform_device mxc_sdhc_device1;
extern struct platform_device mxc_otg_udc_device;
extern struct platform_device mx27_camera_device;
extern struct platform_device mxc_otg_host;
extern struct platform_device mxc_usbh1;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
#ifdef CONFIG_MACH_MX27
extern struct platform_device mxc_spi_device2;
#endif
extern struct platform_device mx21_usbhc_device;
extern struct platform_device imx_ssi_device0;
extern struct platform_device imx_ssi_device1;
extern struct platform_device imx_kpp_device;
#endif
arch/arm/plat-mxc/dma-mx1-mx2.c → arch/arm/mach-imx/dma-v1.c
View file @ d50f58bb
/*
* linux/arch/arm/plat-mxc/dma-mx1-mx2.c
* linux/arch/arm/plat-mxc/dma-v1.c
*
* i.MX DMA registration and IRQ dispatching
*
......@@ -34,7 +34,7 @@
#include <asm/system.h>
#include <asm/irq.h>
#include <mach/hardware.h>
#include <mach/dma-mx1-mx2.h>
#include <mach/dma-v1.h>
#define DMA_DCR 0x00 /* Control Register */
#define DMA_DISR 0x04 /* Interrupt status Register */
......
arch/arm/mach-mx2/eukrea_mbimx27-baseboard.c → arch/arm/mach-imx/eukrea_mbimx27-baseboard.c
View file @ d50f58bb
/*
* Copyright (C) 2009 Eric Benard - eric@eukrea.com
* Copyright (C) 2009-2010 Eric Benard - eric@eukrea.com
*
* Based on pcm970-baseboard.c which is :
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
......@@ -24,6 +24,9 @@
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/backlight.h>
#include <video/platform_lcd.h>
#include <linux/input/matrix_keypad.h>
#include <asm/mach/arch.h>
......@@ -32,8 +35,11 @@
#include <mach/imxfb.h>
#include <mach/hardware.h>
#include <mach/mmc.h>
#include <mach/imx-uart.h>
#include <mach/spi.h>
#include <mach/ssi.h>
#include <mach/audmux.h>
#include "devices-imx27.h"
#include "devices.h"
static int eukrea_mbimx27_pins[] = {
......@@ -48,10 +54,12 @@ static int eukrea_mbimx27_pins[] = {
PE10_PF_UART3_CTS,
PE11_PF_UART3_RTS,
/* UART4 */
#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
PB26_AF_UART4_RTS,
PB28_AF_UART4_TXD,
PB29_AF_UART4_CTS,
PB31_AF_UART4_RXD,
#endif
/* SDHC1*/
PE18_PF_SD1_D0,
PE19_PF_SD1_D1,
......@@ -84,10 +92,29 @@ static int eukrea_mbimx27_pins[] = {
PA30_PF_CONTRAST,
PA31_PF_OE_ACD,
/* SPI1 */
PD28_PF_CSPI1_SS0,
PD29_PF_CSPI1_SCLK,
PD30_PF_CSPI1_MISO,
PD31_PF_CSPI1_MOSI,
/* SSI4 */
#if defined(CONFIG_SND_SOC_EUKREA_TLV320) \
|| defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE)
PC16_PF_SSI4_FS,
PC17_PF_SSI4_RXD | GPIO_PUEN,
PC18_PF_SSI4_TXD | GPIO_PUEN,
PC19_PF_SSI4_CLK,
#endif
};
static const uint32_t eukrea_mbimx27_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_DOWN),
KEY(1, 0, KEY_RIGHT),
KEY(1, 1, KEY_LEFT),
};
static struct matrix_keymap_data eukrea_mbimx27_keymap_data = {
.keymap = eukrea_mbimx27_keymap,
.keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap),
};
static struct gpio_led gpio_leds[] = {
......@@ -103,12 +130,6 @@ static struct gpio_led gpio_leds[] = {
.active_low = 1,
.gpio = GPIO_PORTF | 19,
},
{
.name = "backlight",
.default_trigger = "backlight",
.active_low = 0,
.gpio = GPIO_PORTE | 5,
},
};
static struct gpio_led_platform_data gpio_led_info = {
......@@ -127,7 +148,7 @@ static struct platform_device leds_gpio = {
static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
{
.mode = {
.name = "CMO-QGVA",
.name = "CMO-QVGA",
.refresh = 60,
.xres = 320,
.yres = 240,
......@@ -141,6 +162,38 @@ static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
},
.pcr = 0xFAD08B80,
.bpp = 16,
}, {
.mode = {
.name = "DVI-VGA",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 32000,
.hsync_len = 1,
.left_margin = 35,
.right_margin = 0,
.vsync_len = 1,
.upper_margin = 7,
.lower_margin = 0,
},
.pcr = 0xFA208B80,
.bpp = 16,
}, {
.mode = {
.name = "DVI-SVGA",
.refresh = 60,
.xres = 800,
.yres = 600,
.pixclock = 25000,
.hsync_len = 1,
.left_margin = 35,
.right_margin = 0,
.vsync_len = 1,
.upper_margin = 7,
.lower_margin = 0,
},
.pcr = 0xFA208B80,
.bpp = 16,
},
};
......@@ -153,16 +206,52 @@ static struct imx_fb_platform_data eukrea_mbimx27_fb_data = {
.dmacr = 0x00040060,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
},
{
.flags = IMXUART_HAVE_RTSCTS,
static void eukrea_mbimx27_bl_set_intensity(int intensity)
{
if (intensity)
gpio_direction_output(GPIO_PORTE | 5, 1);
else
gpio_direction_output(GPIO_PORTE | 5, 0);
}
static struct generic_bl_info eukrea_mbimx27_bl_info = {
.name = "eukrea_mbimx27-bl",
.max_intensity = 0xff,
.default_intensity = 0xff,
.set_bl_intensity = eukrea_mbimx27_bl_set_intensity,
};
static struct platform_device eukrea_mbimx27_bl_dev = {
.name = "generic-bl",
.id = 1,
.dev = {
.platform_data = &eukrea_mbimx27_bl_info,
},
};
#if defined(CONFIG_TOUCHSCREEN_ADS7846)
static void eukrea_mbimx27_lcd_power_set(struct plat_lcd_data *pd,
unsigned int power)
{
if (power)
gpio_direction_output(GPIO_PORTA | 25, 1);
else
gpio_direction_output(GPIO_PORTA | 25, 0);
}
static struct plat_lcd_data eukrea_mbimx27_lcd_power_data = {
.set_power = eukrea_mbimx27_lcd_power_set,
};
static struct platform_device eukrea_mbimx27_lcd_powerdev = {
.name = "platform-lcd",
.dev.platform_data = &eukrea_mbimx27_lcd_power_data,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
#if defined(CONFIG_TOUCHSCREEN_ADS7846) \
|| defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
#define ADS7846_PENDOWN (GPIO_PORTD | 25)
......@@ -173,7 +262,6 @@ static void ads7846_dev_init(void)
printk(KERN_ERR "can't get ads746 pen down GPIO\n");
return;
}
gpio_direction_input(ADS7846_PENDOWN);
}
......@@ -186,7 +274,9 @@ static struct ads7846_platform_data ads7846_config __initdata = {
.get_pendown_state = ads7846_get_pendown_state,
.keep_vref_on = 1,
};
#endif
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
static struct spi_board_info eukrea_mbimx27_spi_board_info[] __initdata = {
[0] = {
.modalias = "ads7846",
......@@ -201,16 +291,30 @@ static struct spi_board_info eukrea_mbimx27_spi_board_info[] __initdata = {
static int eukrea_mbimx27_spi_cs[] = {GPIO_PORTD | 28};
static struct spi_imx_master eukrea_mbimx27_spi_0_data = {
static const struct spi_imx_master eukrea_mbimx27_spi0_data __initconst = {
.chipselect = eukrea_mbimx27_spi_cs,
.num_chipselect = ARRAY_SIZE(eukrea_mbimx27_spi_cs),
};
#endif
static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = {
{
I2C_BOARD_INFO("tlv320aic23", 0x1a),
},
};
static struct platform_device *platform_devices[] __initdata = {
&leds_gpio,
};
static struct imxmmc_platform_data sdhc_pdata = {
.dat3_card_detect = 1,
};
struct imx_ssi_platform_data eukrea_mbimx27_ssi_pdata = {
.flags = IMX_SSI_DMA | IMX_SSI_USE_I2S_SLAVE,
};
/*
* system init for baseboard usage. Will be called by cpuimx27 init.
*
......@@ -222,21 +326,52 @@ void __init eukrea_mbimx27_baseboard_init(void)
mxc_gpio_setup_multiple_pins(eukrea_mbimx27_pins,
ARRAY_SIZE(eukrea_mbimx27_pins), "MBIMX27");
mxc_register_device(&mxc_uart_device1, &uart_pdata[0]);
mxc_register_device(&mxc_uart_device2, &uart_pdata[1]);
#if defined(CONFIG_SND_SOC_EUKREA_TLV320) \
|| defined(CONFIG_SND_SOC_EUKREA_TLV320_MODULE)
/* SSI unit master I2S codec connected to SSI_PINS_4*/
mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
MXC_AUDMUX_V1_PCR_SYN |
MXC_AUDMUX_V1_PCR_TFSDIR |
MXC_AUDMUX_V1_PCR_TCLKDIR |
MXC_AUDMUX_V1_PCR_RFSDIR |
MXC_AUDMUX_V1_PCR_RCLKDIR |
MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
);
mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
MXC_AUDMUX_V1_PCR_SYN |
MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
);
#endif
imx27_add_imx_uart1(&uart_pdata);
imx27_add_imx_uart2(&uart_pdata);
#if !defined(MACH_EUKREA_CPUIMX27_USEUART4)
imx27_add_imx_uart3(&uart_pdata);
#endif
mxc_register_device(&mxc_fb_device, &eukrea_mbimx27_fb_data);
mxc_register_device(&mxc_sdhc_device0, NULL);
mxc_register_device(&mxc_sdhc_device0, &sdhc_pdata);
#if defined(CONFIG_TOUCHSCREEN_ADS7846)
i2c_register_board_info(0, eukrea_mbimx27_i2c_devices,
ARRAY_SIZE(eukrea_mbimx27_i2c_devices));
mxc_register_device(&imx_ssi_device0, &eukrea_mbimx27_ssi_pdata);
#if defined(CONFIG_TOUCHSCREEN_ADS7846) \
|| defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
/* SPI and ADS7846 Touchscreen controler init */
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
/* ADS7846 Touchscreen controller init */
mxc_gpio_mode(GPIO_PORTD | 25 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_spi_device0, &eukrea_mbimx27_spi_0_data);
ads7846_dev_init();
#endif
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
/* SPI_CS0 init */
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
imx27_add_spi_imx0(&eukrea_mbimx27_spi0_data);
spi_register_board_info(eukrea_mbimx27_spi_board_info,
ARRAY_SIZE(eukrea_mbimx27_spi_board_info));
ads7846_dev_init();
#endif
/* Leds configuration */
......@@ -244,6 +379,14 @@ void __init eukrea_mbimx27_baseboard_init(void)
mxc_gpio_mode(GPIO_PORTF | 19 | GPIO_GPIO | GPIO_OUT);
/* Backlight */
mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_OUT);
gpio_request(GPIO_PORTE | 5, "backlight");
platform_device_register(&eukrea_mbimx27_bl_dev);
/* LCD Reset */
mxc_gpio_mode(GPIO_PORTA | 25 | GPIO_GPIO | GPIO_OUT);
gpio_request(GPIO_PORTA | 25, "lcd_enable");
platform_device_register(&eukrea_mbimx27_lcd_powerdev);
mxc_register_device(&imx_kpp_device, &eukrea_mbimx27_keymap_data);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
arch/arm/mach-imx/include/mach/dma-mx1-mx2.h 0 → 100644
View file @ d50f58bb
#ifndef __MACH_DMA_MX1_MX2_H__
#define __MACH_DMA_MX1_MX2_H__
/*
* Don't use this header in new code, it will go away when all users are
* converted to mach/dma-v1.h
*/
#include <mach/dma-v1.h>
#endif /* ifndef __MACH_DMA_MX1_MX2_H__ */
arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h → arch/arm/mach-imx/include/mach/dma-v1.h
View file @ d50f58bb
/*
* linux/arch/arm/plat-mxc/include/mach/dma-mx1-mx2.h
* linux/arch/arm/mach-imx/include/mach/dma-v1.h
*
* i.MX DMA registration and IRQ dispatching
*
......@@ -22,8 +22,10 @@
* MA 02110-1301, USA.
*/
#ifndef __ASM_ARCH_MXC_DMA_H
#define __ASM_ARCH_MXC_DMA_H
#ifndef __MACH_DMA_V1_H__
#define __MACH_DMA_V1_H__
#define imx_has_dma_v1() (cpu_is_mx1() || cpu_is_mx21() || cpu_is_mx27())
#define IMX_DMA_CHANNELS 16
......@@ -102,4 +104,4 @@ enum imx_dma_prio {
int imx_dma_request_by_prio(const char *name, enum imx_dma_prio prio);
#endif /* _ASM_ARCH_MXC_DMA_H */
#endif /* __MACH_DMA_V1_H__ */
arch/arm/mach-mx2/mach-cpuimx27.c → arch/arm/mach-imx/mach-cpuimx27.c
View file @ d50f58bb
......@@ -26,20 +26,24 @@
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/serial_8250.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/fsl_devices.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/board-eukrea_cpuimx27.h>
#include <mach/eukrea-baseboards.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/iomux-mx27.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include "devices-imx27.h"
#include "devices.h"
static int eukrea_cpuimx27_pins[] = {
......@@ -49,10 +53,12 @@ static int eukrea_cpuimx27_pins[] = {
PE14_PF_UART1_CTS,
PE15_PF_UART1_RTS,
/* UART4 */
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
PB26_AF_UART4_RTS,
PB28_AF_UART4_TXD,
PB29_AF_UART4_CTS,
PB31_AF_UART4_RXD,
#endif
/* FEC */
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
......@@ -76,19 +82,47 @@ static int eukrea_cpuimx27_pins[] = {
PD17_PF_I2C_DATA,
PD18_PF_I2C_CLK,
/* SDHC2 */
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
PB4_PF_SD2_D0,
PB5_PF_SD2_D1,
PB6_PF_SD2_D2,
PB7_PF_SD2_D3,
PB8_PF_SD2_CMD,
PB9_PF_SD2_CLK,
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/* Quad UART's IRQ */
GPIO_PORTD | 22 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 23 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN,
GPIO_PORTD | 30 | GPIO_GPIO | GPIO_IN,
GPIO_PORTB | 22 | GPIO_GPIO | GPIO_IN,
GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN,
GPIO_PORTB | 27 | GPIO_GPIO | GPIO_IN,
GPIO_PORTB | 30 | GPIO_GPIO | GPIO_IN,
#endif
/* OTG */
PC7_PF_USBOTG_DATA5,
PC8_PF_USBOTG_DATA6,
PC9_PF_USBOTG_DATA0,
PC10_PF_USBOTG_DATA2,
PC11_PF_USBOTG_DATA1,
PC12_PF_USBOTG_DATA4,
PC13_PF_USBOTG_DATA3,
PE0_PF_USBOTG_NXT,
PE1_PF_USBOTG_STP,
PE2_PF_USBOTG_DIR,
PE24_PF_USBOTG_CLK,
PE25_PF_USBOTG_DATA7,
/* USBH2 */
PA0_PF_USBH2_CLK,
PA1_PF_USBH2_DIR,
PA2_PF_USBH2_DATA7,
PA3_PF_USBH2_NXT,
PA4_PF_USBH2_STP,
PD19_AF_USBH2_DATA4,
PD20_AF_USBH2_DATA3,
PD21_AF_USBH2_DATA6,
PD22_AF_USBH2_DATA0,
PD23_AF_USBH2_DATA2,
PD24_AF_USBH2_DATA1,
PD26_AF_USBH2_DATA5,
};
static struct physmap_flash_data eukrea_cpuimx27_flash_data = {
......@@ -111,15 +145,12 @@ static struct platform_device eukrea_cpuimx27_nor_mtd_device = {
.resource = &eukrea_cpuimx27_flash_resource,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = {
static const struct mxc_nand_platform_data
cpuimx27_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -127,9 +158,11 @@ static struct mxc_nand_platform_data eukrea_cpuimx27_nand_board_info = {
static struct platform_device *platform_devices[] __initdata = {
&eukrea_cpuimx27_nor_mtd_device,
&mxc_fec_device,
&mxc_wdt,
&mxc_w1_master_device,
};
static struct imxi2c_platform_data eukrea_cpuimx27_i2c_1_data = {
static const struct imxi2c_platform_data cpuimx27_i2c1_data __initconst = {
.bitrate = 100000,
};
......@@ -182,34 +215,83 @@ static struct platform_device serial_device = {
};
#endif
#if defined(CONFIG_USB_ULPI)
static struct mxc_usbh_platform_data otg_pdata = {
.portsc = MXC_EHCI_MODE_ULPI,
.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
};
static struct mxc_usbh_platform_data usbh2_pdata = {
.portsc = MXC_EHCI_MODE_ULPI,
.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif
static struct fsl_usb2_platform_data otg_device_pdata = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_ULPI,
};
static int otg_mode_host;
static int __init eukrea_cpuimx27_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = 1;
else if (!strcmp(options, "device"))
otg_mode_host = 0;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 0;
}
__setup("otg_mode=", eukrea_cpuimx27_otg_mode);
static void __init eukrea_cpuimx27_init(void)
{
mxc_gpio_setup_multiple_pins(eukrea_cpuimx27_pins,
ARRAY_SIZE(eukrea_cpuimx27_pins), "CPUIMX27");
mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
imx27_add_imx_uart0(&uart_pdata);
mxc_register_device(&imx27_nand_device,
&eukrea_cpuimx27_nand_board_info);
imx27_add_mxc_nand(&cpuimx27_nand_board_info);
i2c_register_board_info(0, eukrea_cpuimx27_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx27_i2c_devices));
mxc_register_device(&mxc_i2c_device0, &eukrea_cpuimx27_i2c_1_data);
imx27_add_i2c_imx1(&cpuimx27_i2c1_data);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
#if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2)
/* SDHC2 can be used for Wifi */
mxc_register_device(&mxc_sdhc_device1, NULL);
#endif
#if defined(MACH_EUKREA_CPUIMX27_USEUART4)
/* in which case UART4 is also used for Bluetooth */
mxc_register_device(&mxc_uart_device3, &uart_pdata[1]);
imx27_add_imx_uart3(&uart_pdata);
#endif
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
platform_device_register(&serial_device);
#endif
#if defined(CONFIG_USB_ULPI)
if (otg_mode_host) {
otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_otg_host, &otg_pdata);
}
usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_usbh2, &usbh2_pdata);
#endif
if (!otg_mode_host)
mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
#ifdef CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD
eukrea_mbimx27_baseboard_init();
#endif
......
arch/arm/mach-mx2/mach-imx27lite.c → arch/arm/mach-imx/mach-imx27lite.c
View file @ d50f58bb
......@@ -12,10 +12,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/platform_device.h>
......@@ -26,10 +22,9 @@
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/board-mx27lite.h>
#include "devices-imx27.h"
#include "devices.h"
static unsigned int mx27lite_pins[] = {
......@@ -59,7 +54,7 @@ static unsigned int mx27lite_pins[] = {
PF23_AIN_FEC_TX_EN,
};
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
......@@ -71,7 +66,7 @@ static void __init mx27lite_init(void)
{
mxc_gpio_setup_multiple_pins(mx27lite_pins, ARRAY_SIZE(mx27lite_pins),
"imx27lite");
mxc_register_device(&mxc_uart_device0, &uart_pdata);
imx27_add_imx_uart0(&uart_pdata);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
......
arch/arm/mach-mx1/mach-mx1ads.c → arch/arm/mach-imx/mach-mx1ads.c
View file @ d50f58bb
......@@ -26,10 +26,10 @@
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx1.h>
#include <mach/irqs.h>
#include "devices-imx1.h"
#include "devices.h"
static int mx1ads_pins[] = {
......@@ -58,12 +58,12 @@ static int mx1ads_pins[] = {
* UARTs platform data
*/
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
static const struct imxuart_platform_data uart0_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static const struct imxuart_platform_data uart1_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
/*
......@@ -75,8 +75,8 @@ static struct physmap_flash_data mx1ads_flash_data = {
};
static struct resource flash_resource = {
.start = IMX_CS0_PHYS,
.end = IMX_CS0_PHYS + SZ_32M - 1,
.start = MX1_CS0_PHYS,
.end = MX1_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
......@@ -98,7 +98,7 @@ static struct pcf857x_platform_data pcf857x_data[] = {
}
};
static struct imxi2c_platform_data mx1ads_i2c_data = {
static const struct imxi2c_platform_data mx1ads_i2c_data __initconst = {
.bitrate = 100000,
};
......@@ -121,8 +121,8 @@ static void __init mx1ads_init(void)
ARRAY_SIZE(mx1ads_pins), "mx1ads");
/* UART */
mxc_register_device(&imx_uart1_device, &uart_pdata[0]);
mxc_register_device(&imx_uart2_device, &uart_pdata[1]);
imx1_add_imx_uart0(&uart0_pdata);
imx1_add_imx_uart1(&uart1_pdata);
/* Physmap flash */
mxc_register_device(&flash_device, &mx1ads_flash_data);
......@@ -131,7 +131,7 @@ static void __init mx1ads_init(void)
i2c_register_board_info(0, mx1ads_i2c_devices,
ARRAY_SIZE(mx1ads_i2c_devices));
mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data);
imx1_add_i2c_imx(&mx1ads_i2c_data);
}
static void __init mx1ads_timer_init(void)
......@@ -145,8 +145,8 @@ struct sys_timer mx1ads_timer = {
MACHINE_START(MX1ADS, "Freescale MX1ADS")
/* Maintainer: Sascha Hauer, Pengutronix */
.phys_io = IMX_IO_PHYS,
.io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
.phys_io = MX1_IO_BASE_ADDR,
.io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = MX1_PHYS_OFFSET + 0x100,
.map_io = mx1_map_io,
.init_irq = mx1_init_irq,
......@@ -155,8 +155,8 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS")
MACHINE_END
MACHINE_START(MXLADS, "Freescale MXLADS")
.phys_io = IMX_IO_PHYS,
.io_pg_offst = (IMX_IO_BASE >> 18) & 0xfffc,
.phys_io = MX1_IO_BASE_ADDR,
.io_pg_offst = (MX1_IO_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = MX1_PHYS_OFFSET + 0x100,
.map_io = mx1_map_io,
.init_irq = mx1_init_irq,
......
arch/arm/mach-mx2/mach-mx21ads.c → arch/arm/mach-imx/mach-mx21ads.c
View file @ d50f58bb
......@@ -12,10 +12,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/platform_device.h>
......@@ -28,15 +24,49 @@
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/imx-uart.h>
#include <mach/imxfb.h>
#include <mach/iomux-mx21.h>
#include <mach/mxc_nand.h>
#include <mach/mmc.h>
#include <mach/board-mx21ads.h>
#include "devices-imx21.h"
#include "devices.h"
/*
* Memory-mapped I/O on MX21ADS base board
*/
#define MX21ADS_MMIO_BASE_ADDR 0xf5000000
#define MX21ADS_MMIO_SIZE SZ_16M
#define MX21ADS_REG_ADDR(offset) (void __force __iomem *) \
(MX21ADS_MMIO_BASE_ADDR + (offset))
#define MX21ADS_CS8900A_IRQ IRQ_GPIOE(11)
#define MX21ADS_CS8900A_IOBASE_REG MX21ADS_REG_ADDR(0x000000)
#define MX21ADS_ST16C255_IOBASE_REG MX21ADS_REG_ADDR(0x200000)
#define MX21ADS_VERSION_REG MX21ADS_REG_ADDR(0x400000)
#define MX21ADS_IO_REG MX21ADS_REG_ADDR(0x800000)
/* MX21ADS_IO_REG bit definitions */
#define MX21ADS_IO_SD_WP 0x0001 /* read */
#define MX21ADS_IO_TP6 0x0001 /* write */
#define MX21ADS_IO_SW_SEL 0x0002 /* read */
#define MX21ADS_IO_TP7 0x0002 /* write */
#define MX21ADS_IO_RESET_E_UART 0x0004
#define MX21ADS_IO_RESET_BASE 0x0008
#define MX21ADS_IO_CSI_CTL2 0x0010
#define MX21ADS_IO_CSI_CTL1 0x0020
#define MX21ADS_IO_CSI_CTL0 0x0040
#define MX21ADS_IO_UART1_EN 0x0080
#define MX21ADS_IO_UART4_EN 0x0100
#define MX21ADS_IO_LCDON 0x0200
#define MX21ADS_IO_IRDA_EN 0x0400
#define MX21ADS_IO_IRDA_FIR_SEL 0x0800
#define MX21ADS_IO_IRDA_MD0_B 0x1000
#define MX21ADS_IO_IRDA_MD1 0x2000
#define MX21ADS_IO_LED4_ON 0x4000
#define MX21ADS_IO_LED3_ON 0x8000
static unsigned int mx21ads_pins[] = {
/* CS8900A */
......@@ -133,14 +163,13 @@ static struct platform_device mx21ads_nor_mtd_device = {
.resource = &mx21ads_flash_resource,
};
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata_rts __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct imxuart_platform_data uart_norts_pdata = {
static const struct imxuart_platform_data uart_pdata_norts __initconst = {
};
static int mx21ads_fb_init(struct platform_device *pdev)
{
u16 tmp;
......@@ -227,7 +256,8 @@ static struct imxmmc_platform_data mx21ads_sdhc_pdata = {
.exit = mx21ads_sdhc_exit,
};
static struct mxc_nand_platform_data mx21ads_nand_board_info = {
static const struct mxc_nand_platform_data
mx21ads_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -263,12 +293,12 @@ static void __init mx21ads_board_init(void)
mxc_gpio_setup_multiple_pins(mx21ads_pins, ARRAY_SIZE(mx21ads_pins),
"mx21ads");
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_uart_device2, &uart_norts_pdata);
mxc_register_device(&mxc_uart_device3, &uart_pdata);
imx21_add_imx_uart0(&uart_pdata_rts);
imx21_add_imx_uart2(&uart_pdata_norts);
imx21_add_imx_uart3(&uart_pdata_rts);
mxc_register_device(&mxc_fb_device, &mx21ads_fb_data);
mxc_register_device(&mxc_sdhc_device0, &mx21ads_sdhc_pdata);
mxc_register_device(&imx21_nand_device, &mx21ads_nand_board_info);
imx21_add_mxc_nand(&mx21ads_nand_board_info);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
......
arch/arm/mach-mx2/mach-mx27_3ds.c → arch/arm/mach-imx/mach-mx27_3ds.c
View file @ d50f58bb
......@@ -12,23 +12,25 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
/*
* This machine is known as:
* - i.MX27 3-Stack Development System
* - i.MX27 Platform Development Kit (i.MX27 PDK)
*/
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <linux/input/matrix_keypad.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/board-mx27pdk.h>
#include "devices-imx27.h"
#include "devices.h"
static unsigned int mx27pdk_pins[] = {
......@@ -58,7 +60,7 @@ static unsigned int mx27pdk_pins[] = {
PF23_AIN_FEC_TX_EN,
};
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
......@@ -66,12 +68,34 @@ static struct platform_device *platform_devices[] __initdata = {
&mxc_fec_device,
};
/*
* Matrix keyboard
*/
static const uint32_t mx27_3ds_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_DOWN),
KEY(1, 0, KEY_RIGHT),
KEY(1, 1, KEY_LEFT),
KEY(1, 2, KEY_ENTER),
KEY(2, 0, KEY_F6),
KEY(2, 1, KEY_F8),
KEY(2, 2, KEY_F9),
KEY(2, 3, KEY_F10),
};
static struct matrix_keymap_data mx27_3ds_keymap_data = {
.keymap = mx27_3ds_keymap,
.keymap_size = ARRAY_SIZE(mx27_3ds_keymap),
};
static void __init mx27pdk_init(void)
{
mxc_gpio_setup_multiple_pins(mx27pdk_pins, ARRAY_SIZE(mx27pdk_pins),
"mx27pdk");
mxc_register_device(&mxc_uart_device0, &uart_pdata);
imx27_add_imx_uart0(&uart_pdata);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
mxc_register_device(&imx_kpp_device, &mx27_3ds_keymap_data);
}
static void __init mx27pdk_timer_init(void)
......
arch/arm/mach-mx2/mach-mx27ads.c → arch/arm/mach-imx/mach-mx27ads.c
View file @ d50f58bb
......@@ -12,10 +12,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/platform_device.h>
......@@ -32,16 +28,44 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/gpio.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/board-mx27ads.h>
#include <mach/mxc_nand.h>
#include <mach/i2c.h>
#include <mach/imxfb.h>
#include <mach/mmc.h>
#include "devices-imx27.h"
#include "devices.h"
/*
* Base address of PBC controller, CS4
*/
#define PBC_BASE_ADDRESS 0xf4300000
#define PBC_REG_ADDR(offset) (void __force __iomem *) \
(PBC_BASE_ADDRESS + (offset))
/* When the PBC address connection is fixed in h/w, defined as 1 */
#define PBC_ADDR_SH 0
/* Offsets for the PBC Controller register */
/*
* PBC Board version register offset
*/
#define PBC_VERSION_REG PBC_REG_ADDR(0x00000 >> PBC_ADDR_SH)
/*
* PBC Board control register 1 set address.
*/
#define PBC_BCTRL1_SET_REG PBC_REG_ADDR(0x00008 >> PBC_ADDR_SH)
/*
* PBC Board control register 1 clear address.
*/
#define PBC_BCTRL1_CLEAR_REG PBC_REG_ADDR(0x0000C >> PBC_ADDR_SH)
/* PBC Board Control Register 1 bit definitions */
#define PBC_BCTRL1_LCDON 0x0800 /* Enable the LCD */
/* to determine the correct external crystal reference */
#define CKIH_27MHZ_BIT_SET (1 << 3)
static unsigned int mx27ads_pins[] = {
/* UART0 */
PE12_PF_UART1_TXD,
......@@ -141,7 +165,8 @@ static unsigned int mx27ads_pins[] = {
PB9_PF_SD2_CLK,
};
static struct mxc_nand_platform_data mx27ads_nand_board_info = {
static const struct mxc_nand_platform_data
mx27ads_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -168,7 +193,7 @@ static struct platform_device mx27ads_nor_mtd_device = {
.resource = &mx27ads_flash_resource,
};
static struct imxi2c_platform_data mx27ads_i2c_data = {
static const struct imxi2c_platform_data mx27ads_i2c1_data __initconst = {
.bitrate = 100000,
};
......@@ -263,20 +288,8 @@ static struct platform_device *platform_devices[] __initdata = {
&mxc_w1_master_device,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static void __init mx27ads_board_init(void)
......@@ -284,18 +297,18 @@ static void __init mx27ads_board_init(void)
mxc_gpio_setup_multiple_pins(mx27ads_pins, ARRAY_SIZE(mx27ads_pins),
"mx27ads");
mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
mxc_register_device(&mxc_uart_device3, &uart_pdata[3]);
mxc_register_device(&mxc_uart_device4, &uart_pdata[4]);
mxc_register_device(&mxc_uart_device5, &uart_pdata[5]);
mxc_register_device(&imx27_nand_device, &mx27ads_nand_board_info);
imx27_add_imx_uart0(&uart_pdata);
imx27_add_imx_uart1(&uart_pdata);
imx27_add_imx_uart2(&uart_pdata);
imx27_add_imx_uart3(&uart_pdata);
imx27_add_imx_uart4(&uart_pdata);
imx27_add_imx_uart5(&uart_pdata);
imx27_add_mxc_nand(&mx27ads_nand_board_info);
/* only the i2c master 1 is used on this CPU card */
i2c_register_board_info(1, mx27ads_i2c_devices,
ARRAY_SIZE(mx27ads_i2c_devices));
mxc_register_device(&mxc_i2c_device1, &mx27ads_i2c_data);
imx27_add_i2c_imx1(&mx27ads_i2c1_data);
mxc_register_device(&mxc_fb_device, &mx27ads_fb_data);
mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
mxc_register_device(&mxc_sdhc_device1, &sdhc2_pdata);
......@@ -342,4 +355,3 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
.init_machine = mx27ads_board_init,
.timer = &mx27ads_timer,
MACHINE_END
arch/arm/mach-mx2/mach-mxt_td60.c → arch/arm/mach-imx/mach-mxt_td60.c
View file @ d50f58bb
......@@ -12,10 +12,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/platform_device.h>
......@@ -32,14 +28,13 @@
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <linux/gpio.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx27.h>
#include <mach/mxc_nand.h>
#include <mach/i2c.h>
#include <linux/i2c/pca953x.h>
#include <mach/imxfb.h>
#include <mach/mmc.h>
#include "devices-imx27.h"
#include "devices.h"
static unsigned int mxt_td60_pins[] __initdata = {
......@@ -128,12 +123,13 @@ static unsigned int mxt_td60_pins[] __initdata = {
PB9_PF_SD2_CLK,
};
static struct mxc_nand_platform_data mxt_td60_nand_board_info = {
static const struct mxc_nand_platform_data
mxt_td60_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
static struct imxi2c_platform_data mxt_td60_i2c_data = {
static const struct imxi2c_platform_data mxt_td60_i2c0_data __initconst = {
.bitrate = 100000,
};
......@@ -173,7 +169,7 @@ static struct i2c_board_info mxt_td60_i2c_devices[] = {
},
};
static struct imxi2c_platform_data mxt_td60_i2c2_data = {
static const struct imxi2c_platform_data mxt_td60_i2c1_data __initconst = {
.bitrate = 100000,
};
......@@ -239,14 +235,8 @@ static struct platform_device *platform_devices[] __initdata = {
&mxc_fec_device,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static void __init mxt_td60_board_init(void)
......@@ -254,10 +244,10 @@ static void __init mxt_td60_board_init(void)
mxc_gpio_setup_multiple_pins(mxt_td60_pins, ARRAY_SIZE(mxt_td60_pins),
"MXT_TD60");
mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
mxc_register_device(&imx27_nand_device, &mxt_td60_nand_board_info);
imx27_add_imx_uart0(&uart_pdata);
imx27_add_imx_uart1(&uart_pdata);
imx27_add_imx_uart2(&uart_pdata);
imx27_add_mxc_nand(&mxt_td60_nand_board_info);
i2c_register_board_info(0, mxt_td60_i2c_devices,
ARRAY_SIZE(mxt_td60_i2c_devices));
......@@ -265,8 +255,8 @@ static void __init mxt_td60_board_init(void)
i2c_register_board_info(1, mxt_td60_i2c2_devices,
ARRAY_SIZE(mxt_td60_i2c2_devices));
mxc_register_device(&mxc_i2c_device0, &mxt_td60_i2c_data);
mxc_register_device(&mxc_i2c_device1, &mxt_td60_i2c2_data);
imx27_add_i2c_imx0(&mxt_td60_i2c0_data);
imx27_add_i2c_imx1(&mxt_td60_i2c1_data);
mxc_register_device(&mxc_fb_device, &mxt_td60_fb_data);
mxc_register_device(&mxc_sdhc_device0, &sdhc1_pdata);
......
arch/arm/mach-mx2/mach-pca100.c → arch/arm/mach-imx/mach-pca100.c
View file @ d50f58bb
......@@ -36,12 +36,7 @@
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/iomux-mx27.h>
#include <mach/i2c.h>
#include <asm/mach/time.h>
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
#include <mach/spi.h>
#endif
#include <mach/imx-uart.h>
#include <mach/audmux.h>
#include <mach/ssi.h>
#include <mach/mxc_nand.h>
......@@ -49,11 +44,16 @@
#include <mach/mmc.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include <mach/imxfb.h>
#include "devices-imx27.h"
#include "devices.h"
#define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
#define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
#define SPI1_SS0 (GPIO_PORTD + 28)
#define SPI1_SS1 (GPIO_PORTD + 27)
#define SD2_CD (GPIO_PORTC + 29)
static int pca100_pins[] = {
/* UART1 */
......@@ -68,6 +68,7 @@ static int pca100_pins[] = {
PB7_PF_SD2_D3,
PB8_PF_SD2_CMD,
PB9_PF_SD2_CLK,
SD2_CD | GPIO_GPIO | GPIO_IN,
/* FEC */
PD0_AIN_FEC_TXD0,
PD1_AIN_FEC_TXD1,
......@@ -131,13 +132,42 @@ static int pca100_pins[] = {
PD23_AF_USBH2_DATA2,
PD24_AF_USBH2_DATA1,
PD26_AF_USBH2_DATA5,
/* display */
PA5_PF_LSCLK,
PA6_PF_LD0,
PA7_PF_LD1,
PA8_PF_LD2,
PA9_PF_LD3,
PA10_PF_LD4,
PA11_PF_LD5,
PA12_PF_LD6,
PA13_PF_LD7,
PA14_PF_LD8,
PA15_PF_LD9,
PA16_PF_LD10,
PA17_PF_LD11,
PA18_PF_LD12,
PA19_PF_LD13,
PA20_PF_LD14,
PA21_PF_LD15,
PA22_PF_LD16,
PA23_PF_LD17,
PA26_PF_PS,
PA28_PF_HSYNC,
PA29_PF_VSYNC,
PA31_PF_OE_ACD,
/* free GPIO */
GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN, /* GPIO0_IRQ */
GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN, /* GPIO1_IRQ */
GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN, /* GPIO2_IRQ */
};
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data pca100_nand_board_info = {
static const struct mxc_nand_platform_data
pca100_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -148,7 +178,7 @@ static struct platform_device *platform_devices[] __initdata = {
&mxc_wdt,
};
static struct imxi2c_platform_data pca100_i2c_1_data = {
static const struct imxi2c_platform_data pca100_i2c1_data __initconst = {
.bitrate = 100000,
};
......@@ -189,9 +219,9 @@ static struct spi_board_info pca100_spi_board_info[] __initdata = {
},
};
static int pca100_spi_cs[] = {GPIO_PORTD + 28, GPIO_PORTD + 27};
static int pca100_spi_cs[] = {SPI1_SS0, SPI1_SS1};
static struct spi_imx_master pca100_spi_0_data = {
static const struct spi_imx_master pca100_spi0_data __initconst = {
.chipselect = pca100_spi_cs,
.num_chipselect = ARRAY_SIZE(pca100_spi_cs),
};
......@@ -253,6 +283,7 @@ static struct imxmmc_platform_data sdhc_pdata = {
.exit = pca100_sdhc2_exit,
};
#if defined(CONFIG_USB_ULPI)
static int otg_phy_init(struct platform_device *pdev)
{
gpio_set_value(OTG_PHY_CS_GPIO, 0);
......@@ -276,6 +307,7 @@ static struct mxc_usbh_platform_data usbh2_pdata = {
.portsc = MXC_EHCI_MODE_ULPI,
.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif
static struct fsl_usb2_platform_data otg_device_pdata = {
.operating_mode = FSL_USB2_DR_DEVICE,
......@@ -297,6 +329,45 @@ static int __init pca100_otg_mode(char *options)
}
__setup("otg_mode=", pca100_otg_mode);
/* framebuffer info */
static struct imx_fb_videomode pca100_fb_modes[] = {
{
.mode = {
.name = "EMERGING-ETV570G0DHU",
.refresh = 60,
.xres = 640,
.yres = 480,
.pixclock = 39722, /* in ps (25.175 MHz) */
.hsync_len = 30,
.left_margin = 114,
.right_margin = 16,
.vsync_len = 3,
.upper_margin = 32,
.lower_margin = 0,
},
/*
* TFT
* Pixel pol active high
* HSYNC active low
* VSYNC active low
* use HSYNC for ACD count
* line clock disable while idle
* always enable line clock even if no data
*/
.pcr = 0xf0c08080,
.bpp = 16,
},
};
static struct imx_fb_platform_data pca100_fb_data = {
.mode = pca100_fb_modes,
.num_modes = ARRAY_SIZE(pca100_fb_modes),
.pwmr = 0x00A903FF,
.lscr1 = 0x00120300,
.dmacr = 0x00020010,
};
static void __init pca100_init(void)
{
int ret;
......@@ -320,33 +391,24 @@ static void __init pca100_init(void)
mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
mxc_register_device(&mxc_uart_device0, &uart_pdata);
imx27_add_imx_uart0(&uart_pdata);
mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
mxc_register_device(&imx27_nand_device, &pca100_nand_board_info);
imx27_add_mxc_nand(&pca100_nand_board_info);
/* only the i2c master 1 is used on this CPU card */
i2c_register_board_info(1, pca100_i2c_devices,
ARRAY_SIZE(pca100_i2c_devices));
mxc_register_device(&mxc_i2c_device1, &pca100_i2c_1_data);
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_OUT);
/* GPIO0_IRQ */
mxc_gpio_mode(GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN);
/* GPIO1_IRQ */
mxc_gpio_mode(GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN);
/* GPIO2_IRQ */
mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN);
imx27_add_i2c_imx1(&pca100_i2c1_data);
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_IN);
mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_IN);
spi_register_board_info(pca100_spi_board_info,
ARRAY_SIZE(pca100_spi_board_info));
mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
imx27_add_spi_imx0(&pca100_spi_0_data);
#endif
gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
......@@ -372,6 +434,8 @@ static void __init pca100_init(void)
mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
}
mxc_register_device(&mxc_fb_device, &pca100_fb_data);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
......
arch/arm/mach-mx2/mach-pcm038.c → arch/arm/mach-imx/mach-pcm038.c
View file @ d50f58bb
......@@ -35,14 +35,12 @@
#include <mach/board-pcm038.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/iomux-mx27.h>
#include <mach/imx-uart.h>
#include <mach/mxc_nand.h>
#include <mach/spi.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include "devices-imx27.h"
#include "devices.h"
static int pcm038_pins[] = {
......@@ -162,17 +160,12 @@ static struct platform_device pcm038_nor_mtd_device = {
.resource = &pcm038_flash_resource,
};
static struct imxuart_platform_data uart_pdata[] = {
{
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
}, {
.flags = IMXUART_HAVE_RTSCTS,
},
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct mxc_nand_platform_data pcm038_nand_board_info = {
static const struct mxc_nand_platform_data
pcm038_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -192,7 +185,7 @@ static void __init pcm038_init_sram(void)
mx27_setup_weimcs(1, 0x0000d843, 0x22252521, 0x22220a00);
}
static struct imxi2c_platform_data pcm038_i2c_1_data = {
static const struct imxi2c_platform_data pcm038_i2c1_data __initconst = {
.bitrate = 100000,
};
......@@ -215,7 +208,7 @@ static struct i2c_board_info pcm038_i2c_devices[] = {
static int pcm038_spi_cs[] = {GPIO_PORTD + 28};
static struct spi_imx_master pcm038_spi_0_data = {
static const struct spi_imx_master pcm038_spi0_data __initconst = {
.chipselect = pcm038_spi_cs,
.num_chipselect = ARRAY_SIZE(pcm038_spi_cs),
};
......@@ -305,18 +298,18 @@ static void __init pcm038_init(void)
pcm038_init_sram();
mxc_register_device(&mxc_uart_device0, &uart_pdata[0]);
mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);
mxc_register_device(&mxc_uart_device2, &uart_pdata[2]);
imx27_add_imx_uart0(&uart_pdata);
imx27_add_imx_uart1(&uart_pdata);
imx27_add_imx_uart2(&uart_pdata);
mxc_gpio_mode(PE16_AF_OWIRE);
mxc_register_device(&imx27_nand_device, &pcm038_nand_board_info);
imx27_add_mxc_nand(&pcm038_nand_board_info);
/* only the i2c master 1 is used on this CPU card */
i2c_register_board_info(1, pcm038_i2c_devices,
ARRAY_SIZE(pcm038_i2c_devices));
mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data);
imx27_add_i2c_imx1(&pcm038_i2c1_data);
/* PE18 for user-LED D40 */
mxc_gpio_mode(GPIO_PORTE | 18 | GPIO_GPIO | GPIO_OUT);
......@@ -326,7 +319,7 @@ static void __init pcm038_init(void)
/* MC13783 IRQ */
mxc_gpio_mode(GPIO_PORTB | 23 | GPIO_GPIO | GPIO_IN);
mxc_register_device(&mxc_spi_device0, &pcm038_spi_0_data);
imx27_add_spi_imx0(&pcm038_spi0_data);
spi_register_board_info(pcm038_spi_board_info,
ARRAY_SIZE(pcm038_spi_board_info));
......
arch/arm/mach-mx1/mach-scb9328.c → arch/arm/mach-imx/mach-scb9328.c
View file @ d50f58bb
......@@ -22,17 +22,17 @@
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx1.h>
#include "devices-imx1.h"
#include "devices.h"
/*
* This scb9328 has a 32MiB flash
*/
static struct resource flash_resource = {
.start = IMX_CS0_PHYS,
.end = IMX_CS0_PHYS + (32 * 1024 * 1024) - 1,
.start = MX1_CS0_PHYS,
.end = MX1_CS0_PHYS + (32 * 1024 * 1024) - 1,
.flags = IORESOURCE_MEM,
};
......@@ -70,13 +70,13 @@ static struct dm9000_plat_data dm9000_platdata = {
static struct resource dm9000x_resources[] = {
{
.name = "address area",
.start = IMX_CS5_PHYS,
.end = IMX_CS5_PHYS + 1,
.start = MX1_CS5_PHYS,
.end = MX1_CS5_PHYS + 1,
.flags = IORESOURCE_MEM, /* address access */
}, {
.name = "data area",
.start = IMX_CS5_PHYS + 4,
.end = IMX_CS5_PHYS + 5,
.start = MX1_CS5_PHYS + 4,
.end = MX1_CS5_PHYS + 5,
.flags = IORESOURCE_MEM, /* data access */
}, {
.start = IRQ_GPIOC(3),
......@@ -108,14 +108,13 @@ static int uart1_mxc_init(struct platform_device *pdev)
ARRAY_SIZE(mxc_uart1_pins), "UART1");
}
static int uart1_mxc_exit(struct platform_device *pdev)
static void uart1_mxc_exit(struct platform_device *pdev)
{
mxc_gpio_release_multiple_pins(mxc_uart1_pins,
ARRAY_SIZE(mxc_uart1_pins));
return 0;
}
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.init = uart1_mxc_init,
.exit = uart1_mxc_exit,
.flags = IMXUART_HAVE_RTSCTS,
......@@ -131,7 +130,7 @@ static struct platform_device *devices[] __initdata = {
*/
static void __init scb9328_init(void)
{
mxc_register_device(&imx_uart1_device, &uart_pdata);
imx1_add_imx_uart0(&uart_pdata);
printk(KERN_INFO"Scb9328: Adding devices\n");
platform_add_devices(devices, ARRAY_SIZE(devices));
......
arch/arm/mach-mx1/generic.c → arch/arm/mach-imx/mm-imx1.c
View file @ d50f58bb
......@@ -3,7 +3,7 @@
* Created: april 20th, 2004
* Copyright: Synertronixx GmbH
*
* Common code for i.MX machines
* Common code for i.MX1 machines
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
......@@ -14,11 +14,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
......@@ -31,23 +26,25 @@
static struct map_desc imx_io_desc[] __initdata = {
{
.virtual = IMX_IO_BASE,
.pfn = __phys_to_pfn(IMX_IO_PHYS),
.length = IMX_IO_SIZE,
.type = MT_DEVICE
.virtual = MX1_IO_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX1_IO_BASE_ADDR),
.length = MX1_IO_SIZE,
.type = MT_DEVICE
}
};
void __init mx1_map_io(void)
{
mxc_set_cpu_type(MXC_CPU_MX1);
mxc_arch_reset_init(IO_ADDRESS(WDT_BASE_ADDR));
mxc_arch_reset_init(MX1_IO_ADDRESS(MX1_WDT_BASE_ADDR));
iotable_init(imx_io_desc, ARRAY_SIZE(imx_io_desc));
}
int imx1_register_gpios(void);
void __init mx1_init_irq(void)
{
mxc_init_irq(IO_ADDRESS(AVIC_BASE_ADDR));
mxc_init_irq(MX1_IO_ADDRESS(MX1_AVIC_BASE_ADDR));
imx1_register_gpios();
}
arch/arm/mach-mx2/mm-imx21.c → arch/arm/mach-imx/mm-imx21.c
View file @ d50f58bb
/*
* arch/arm/mach-mx2/mm-imx21.c
* arch/arm/mach-imx/mm-imx21.c
*
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
......@@ -77,7 +77,10 @@ void __init mx21_map_io(void)
iotable_init(imx21_io_desc, ARRAY_SIZE(imx21_io_desc));
}
int imx21_register_gpios(void);
void __init mx21_init_irq(void)
{
mxc_init_irq(MX21_IO_ADDRESS(MX21_AVIC_BASE_ADDR));
imx21_register_gpios();
}
arch/arm/mach-mx2/mm-imx27.c → arch/arm/mach-imx/mm-imx27.c
View file @ d50f58bb
/*
* arch/arm/mach-mx2/mm-imx27.c
* arch/arm/mach-imx/mm-imx27.c
*
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
......@@ -77,7 +77,10 @@ void __init mx27_map_io(void)
iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
}
int imx27_register_gpios(void);
void __init mx27_init_irq(void)
{
mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
imx27_register_gpios();
}
arch/arm/mach-imx/pm-imx27.c 0 → 100644
View file @ d50f58bb
/*
* i.MX27 Power Management Routines
*
* Based on Freescale's BSP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License.
*/
#include <linux/kernel.h>
#include <linux/suspend.h>
#include <linux/io.h>
#include <mach/system.h>
#include <mach/mx27.h>
static int mx27_suspend_enter(suspend_state_t state)
{
u32 cscr;
switch (state) {
case PM_SUSPEND_MEM:
/* Clear MPEN and SPEN to disable MPLL/SPLL */
cscr = __raw_readl(MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
cscr &= 0xFFFFFFFC;
__raw_writel(cscr, MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR));
/* Executes WFI */
arch_idle();
break;
default:
return -EINVAL;
}
return 0;
}
static struct platform_suspend_ops mx27_suspend_ops = {
.enter = mx27_suspend_enter,
.valid = suspend_valid_only_mem,
};
static int __init mx27_pm_init(void)
{
suspend_set_ops(&mx27_suspend_ops);
return 0;
}
device_initcall(mx27_pm_init);
arch/arm/mach-mx1/Kconfig deleted 100644 → 0
View file @ 129961ec
if ARCH_MX1
comment "MX1 platforms:"
config MACH_MXLADS
bool
config ARCH_MX1ADS
bool "MX1ADS platform"
select MACH_MXLADS
help
Say Y here if you are using Motorola MX1ADS/MXLADS boards
config MACH_SCB9328
bool "Synertronixx scb9328"
help
Say Y here if you are using a Synertronixx scb9328 board
endif
arch/arm/mach-mx1/Makefile deleted 100644 → 0
View file @ 129961ec
#
# Makefile for the linux kernel.
#
# Object file lists.
EXTRA_CFLAGS += -DIMX_NEEDS_DEPRECATED_SYMBOLS
obj-y += generic.o clock.o devices.o
# Support for CMOS sensor interface
obj-$(CONFIG_MX1_VIDEO) += ksym_mx1.o mx1_camera_fiq.o
# Specific board support
obj-$(CONFIG_ARCH_MX1ADS) += mach-mx1ads.o
obj-$(CONFIG_MACH_SCB9328) += mach-scb9328.o
arch/arm/mach-mx1/Makefile.boot deleted 100644 → 0
View file @ 129961ec
zreladdr-y := 0x08008000
params_phys-y := 0x08000100
initrd_phys-y := 0x08800000
arch/arm/mach-mx1/crm_regs.h deleted 100644 → 0
View file @ 129961ec
/*
* Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
*
* This file may be distributed under the terms of the GNU General
* Public License, version 2.
*/
#ifndef __ARCH_ARM_MACH_MX1_CRM_REGS_H__
#define __ARCH_ARM_MACH_MX1_CRM_REGS_H__
#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR)
#define SCM_BASE IO_ADDRESS(SCM_BASE_ADDR)
/* CCM register addresses */
#define CCM_CSCR (CCM_BASE + 0x0)
#define CCM_MPCTL0 (CCM_BASE + 0x4)
#define CCM_MPCTL1 (CCM_BASE + 0x8)
#define CCM_SPCTL0 (CCM_BASE + 0xC)
#define CCM_SPCTL1 (CCM_BASE + 0x10)
#define CCM_PCDR (CCM_BASE + 0x20)
#define CCM_CSCR_CLKO_OFFSET 29
#define CCM_CSCR_CLKO_MASK (0x7 << 29)
#define CCM_CSCR_USB_OFFSET 26
#define CCM_CSCR_USB_MASK (0x7 << 26)
#define CCM_CSCR_SPLL_RESTART (1 << 22)
#define CCM_CSCR_MPLL_RESTART (1 << 21)
#define CCM_CSCR_OSC_EN_SHIFT 17
#define CCM_CSCR_SYSTEM_SEL (1 << 16)
#define CCM_CSCR_BCLK_OFFSET 10
#define CCM_CSCR_BCLK_MASK (0xF << 10)
#define CCM_CSCR_PRESC (1 << 15)
#define CCM_CSCR_SPEN (1 << 1)
#define CCM_CSCR_MPEN (1 << 0)
#define CCM_PCDR_PCLK3_OFFSET 16
#define CCM_PCDR_PCLK3_MASK (0x7F << 16)
#define CCM_PCDR_PCLK2_OFFSET 4
#define CCM_PCDR_PCLK2_MASK (0xF << 4)
#define CCM_PCDR_PCLK1_OFFSET 0
#define CCM_PCDR_PCLK1_MASK 0xF
/* SCM register addresses */
#define SCM_SIDR (SCM_BASE + 0x0)
#define SCM_FMCR (SCM_BASE + 0x4)
#define SCM_GPCR (SCM_BASE + 0x8)
#define SCM_GCCR (SCM_BASE + 0xC)
#define SCM_GCCR_DMA_CLK_EN_OFFSET 3
#define SCM_GCCR_CSI_CLK_EN_OFFSET 2
#define SCM_GCCR_MMA_CLK_EN_OFFSET 1
#define SCM_GCCR_USBD_CLK_EN_OFFSET 0
#endif /* __ARCH_ARM_MACH_MX2_CRM_REGS_H__ */
arch/arm/mach-mx1/devices.c deleted 100644 → 0
View file @ 129961ec
/*
* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2008 Sascha Hauer, kernel@pengutronix.de
* Copyright (c) 2008 Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
* Copyright (c) 2008 Darius Augulis <darius.augulis@teltonika.lt>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/gpio.h>
#include <mach/irqs.h>
#include <mach/hardware.h>
#include "devices.h"
static struct resource imx_csi_resources[] = {
{
.start = 0x00224000,
.end = 0x00224010,
.flags = IORESOURCE_MEM,
}, {
.start = CSI_INT,
.end = CSI_INT,
.flags = IORESOURCE_IRQ,
},
};
static u64 imx_csi_dmamask = 0xffffffffUL;
struct platform_device imx_csi_device = {
.name = "mx1-camera",
.id = 0, /* This is used to put cameras on this interface */
.dev = {
.dma_mask = &imx_csi_dmamask,
.coherent_dma_mask = 0xffffffff,
},
.resource = imx_csi_resources,
.num_resources = ARRAY_SIZE(imx_csi_resources),
};
static struct resource imx_i2c_resources[] = {
{
.start = 0x00217000,
.end = 0x00217010,
.flags = IORESOURCE_MEM,
}, {
.start = I2C_INT,
.end = I2C_INT,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_i2c_device = {
.name = "imx-i2c",
.id = 0,
.resource = imx_i2c_resources,
.num_resources = ARRAY_SIZE(imx_i2c_resources),
};
static struct resource imx_uart1_resources[] = {
{
.start = UART1_BASE_ADDR,
.end = UART1_BASE_ADDR + 0xD0,
.flags = IORESOURCE_MEM,
}, {
.start = UART1_MINT_RX,
.end = UART1_MINT_RX,
.flags = IORESOURCE_IRQ,
}, {
.start = UART1_MINT_TX,
.end = UART1_MINT_TX,
.flags = IORESOURCE_IRQ,
}, {
.start = UART1_MINT_RTS,
.end = UART1_MINT_RTS,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_uart1_device = {
.name = "imx-uart",
.id = 0,
.num_resources = ARRAY_SIZE(imx_uart1_resources),
.resource = imx_uart1_resources,
};
static struct resource imx_uart2_resources[] = {
{
.start = UART2_BASE_ADDR,
.end = UART2_BASE_ADDR + 0xD0,
.flags = IORESOURCE_MEM,
}, {
.start = UART2_MINT_RX,
.end = UART2_MINT_RX,
.flags = IORESOURCE_IRQ,
}, {
.start = UART2_MINT_TX,
.end = UART2_MINT_TX,
.flags = IORESOURCE_IRQ,
}, {
.start = UART2_MINT_RTS,
.end = UART2_MINT_RTS,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_uart2_device = {
.name = "imx-uart",
.id = 1,
.num_resources = ARRAY_SIZE(imx_uart2_resources),
.resource = imx_uart2_resources,
};
static struct resource imx_rtc_resources[] = {
{
.start = 0x00204000,
.end = 0x00204024,
.flags = IORESOURCE_MEM,
}, {
.start = RTC_INT,
.end = RTC_INT,
.flags = IORESOURCE_IRQ,
}, {
.start = RTC_SAMINT,
.end = RTC_SAMINT,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_rtc_device = {
.name = "rtc-imx",
.id = 0,
.resource = imx_rtc_resources,
.num_resources = ARRAY_SIZE(imx_rtc_resources),
};
static struct resource imx_wdt_resources[] = {
{
.start = 0x00201000,
.end = 0x00201008,
.flags = IORESOURCE_MEM,
}, {
.start = WDT_INT,
.end = WDT_INT,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_wdt_device = {
.name = "imx-wdt",
.id = 0,
.resource = imx_wdt_resources,
.num_resources = ARRAY_SIZE(imx_wdt_resources),
};
static struct resource imx_usb_resources[] = {
{
.start = 0x00212000,
.end = 0x00212148,
.flags = IORESOURCE_MEM,
}, {
.start = USBD_INT0,
.end = USBD_INT0,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT1,
.end = USBD_INT1,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT2,
.end = USBD_INT2,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT3,
.end = USBD_INT3,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT4,
.end = USBD_INT4,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT5,
.end = USBD_INT5,
.flags = IORESOURCE_IRQ,
}, {
.start = USBD_INT6,
.end = USBD_INT6,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_usb_device = {
.name = "imx_udc",
.id = 0,
.num_resources = ARRAY_SIZE(imx_usb_resources),
.resource = imx_usb_resources,
};
/* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = {
{
.chip.label = "gpio-0",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR),
.irq = GPIO_INT_PORTA,
.virtual_irq_start = MXC_GPIO_IRQ_START,
}, {
.chip.label = "gpio-1",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x100),
.irq = GPIO_INT_PORTB,
.virtual_irq_start = MXC_GPIO_IRQ_START + 32,
}, {
.chip.label = "gpio-2",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x200),
.irq = GPIO_INT_PORTC,
.virtual_irq_start = MXC_GPIO_IRQ_START + 64,
}, {
.chip.label = "gpio-3",
.base = (void __iomem *)IO_ADDRESS(GPIO_BASE_ADDR + 0x300),
.irq = GPIO_INT_PORTD,
.virtual_irq_start = MXC_GPIO_IRQ_START + 96,
}
};
int __init mxc_register_gpios(void)
{
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
}
arch/arm/mach-mx1/devices.h deleted 100644 → 0
View file @ 129961ec
extern struct platform_device imx_csi_device;
extern struct platform_device imx_i2c_device;
extern struct platform_device imx_uart1_device;
extern struct platform_device imx_uart2_device;
extern struct platform_device imx_rtc_device;
extern struct platform_device imx_wdt_device;
extern struct platform_device imx_usb_device;
arch/arm/mach-mx2/serial.c deleted 100644 → 0
View file @ 129961ec
/*
* Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
* Copyright 2008 Juergen Beisert, kernel@pengutronix.de
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/serial.h>
#include <mach/hardware.h>
#include <mach/imx-uart.h>
#include "devices.h"
static struct resource uart0[] = {
{
.start = MX2x_UART1_BASE_ADDR,
.end = MX2x_UART1_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX2x_INT_UART1,
.end = MX2x_INT_UART1,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device0 = {
.name = "imx-uart",
.id = 0,
.resource = uart0,
.num_resources = ARRAY_SIZE(uart0),
};
static struct resource uart1[] = {
{
.start = MX2x_UART2_BASE_ADDR,
.end = MX2x_UART2_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX2x_INT_UART2,
.end = MX2x_INT_UART2,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device1 = {
.name = "imx-uart",
.id = 1,
.resource = uart1,
.num_resources = ARRAY_SIZE(uart1),
};
static struct resource uart2[] = {
{
.start = MX2x_UART3_BASE_ADDR,
.end = MX2x_UART3_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX2x_INT_UART3,
.end = MX2x_INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device2 = {
.name = "imx-uart",
.id = 2,
.resource = uart2,
.num_resources = ARRAY_SIZE(uart2),
};
static struct resource uart3[] = {
{
.start = MX2x_UART4_BASE_ADDR,
.end = MX2x_UART4_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX2x_INT_UART4,
.end = MX2x_INT_UART4,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device3 = {
.name = "imx-uart",
.id = 3,
.resource = uart3,
.num_resources = ARRAY_SIZE(uart3),
};
#ifdef CONFIG_MACH_MX27
static struct resource uart4[] = {
{
.start = MX27_UART5_BASE_ADDR,
.end = MX27_UART5_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX27_INT_UART5,
.end = MX27_INT_UART5,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device4 = {
.name = "imx-uart",
.id = 4,
.resource = uart4,
.num_resources = ARRAY_SIZE(uart4),
};
static struct resource uart5[] = {
{
.start = MX27_UART6_BASE_ADDR,
.end = MX27_UART6_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MX27_INT_UART6,
.end = MX27_INT_UART6,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device5 = {
.name = "imx-uart",
.id = 5,
.resource = uart5,
.num_resources = ARRAY_SIZE(uart5),
};
#endif
arch/arm/mach-mx25/Kconfig
View file @ d50f58bb
......@@ -4,5 +4,28 @@ comment "MX25 platforms:"
config MACH_MX25_3DS
bool "Support MX25PDK (3DS) Platform"
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
config MACH_EUKREA_CPUIMX25
bool "Support Eukrea CPUIMX25 Platform"
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
choice
prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX25
default MACH_EUKREA_MBIMXSD25_BASEBOARD
config MACH_EUKREA_MBIMXSD25_BASEBOARD
prompt "Eukrea MBIMXSD development board"
bool
help
This adds board specific devices that can be found on Eukrea's
MBIMXSD evaluation board.
endchoice
endif
arch/arm/mach-mx25/Makefile
View file @ d50f58bb
obj-y := mm.o devices.o
obj-$(CONFIG_ARCH_MX25) += clock.o
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25pdk.o
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX25) += mach-cpuimx25.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd-baseboard.o
arch/arm/mach-mx25/clock.c
View file @ d50f58bb
......@@ -109,6 +109,16 @@ static unsigned long get_rate_uart(struct clk *clk)
return get_rate_per(15);
}
static unsigned long get_rate_ssi2(struct clk *clk)
{
return get_rate_per(14);
}
static unsigned long get_rate_ssi1(struct clk *clk)
{
return get_rate_per(13);
}
static unsigned long get_rate_i2c(struct clk *clk)
{
return get_rate_per(6);
......@@ -129,9 +139,17 @@ static unsigned long get_rate_lcdc(struct clk *clk)
return get_rate_per(7);
}
static unsigned long get_rate_csi(struct clk *clk)
{
return get_rate_per(0);
}
static unsigned long get_rate_otg(struct clk *clk)
{
return 48000000; /* FIXME */
unsigned long cctl = readl(CRM_BASE + CCM_CCTL);
unsigned long rate = get_rate_upll();
return (cctl & (1 << 23)) ? 0 : rate / ((0x3F & (cctl >> 16)) + 1);
}
static int clk_cgcr_enable(struct clk *clk)
......@@ -166,14 +184,40 @@ static void clk_cgcr_disable(struct clk *clk)
.secondary = s, \
}
/*
* Note: the following IPG clock gating bits are wrongly marked "Reserved" in
* the i.MX25 Reference Manual Rev 1, table 15-13. The information below is
* taken from the Freescale released BSP.
*
* bit reg offset clock
*
* 0 CGCR1 0 AUDMUX
* 12 CGCR1 12 ESAI
* 16 CGCR1 16 GPIO1
* 17 CGCR1 17 GPIO2
* 18 CGCR1 18 GPIO3
* 23 CGCR1 23 I2C1
* 24 CGCR1 24 I2C2
* 25 CGCR1 25 I2C3
* 27 CGCR1 27 IOMUXC
* 28 CGCR1 28 KPP
* 30 CGCR1 30 OWIRE
* 36 CGCR2 4 RTIC
* 51 CGCR2 19 WDOG
*/
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
DEFINE_CLOCK(lcdc_ahb_clk, 0, CCM_CGCR0, 24, NULL, NULL, NULL);
DEFINE_CLOCK(lcdc_per_clk, 0, CCM_CGCR0, 7, NULL, NULL, &lcdc_ahb_clk);
DEFINE_CLOCK(csi_ahb_clk, 0, CCM_CGCR0, 18, get_rate_csi, NULL, NULL);
DEFINE_CLOCK(csi_per_clk, 0, CCM_CGCR0, 0, get_rate_csi, NULL, &csi_ahb_clk);
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
......@@ -191,6 +235,13 @@ DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1, 8, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk);
DEFINE_CLOCK(wdt_clk, 0, CCM_CGCR2, 19, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk);
DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk);
DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(can2_clk, 0, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
#define _REGISTER_CLOCK(d, n, c) \
{ \
......@@ -217,7 +268,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("mxc_pwm.1", NULL, pwm2_clk)
_REGISTER_CLOCK("mxc_pwm.2", NULL, pwm3_clk)
_REGISTER_CLOCK("mxc_pwm.3", NULL, pwm4_clk)
_REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk)
_REGISTER_CLOCK("imx-keypad", NULL, kpp_clk)
_REGISTER_CLOCK("mx25-adc", NULL, tsc_clk)
_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
......@@ -225,6 +276,13 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
_REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk)
_REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk)
_REGISTER_CLOCK("imx-wdt.0", NULL, wdt_clk)
_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
_REGISTER_CLOCK("mx2-camera.0", NULL, csi_clk)
_REGISTER_CLOCK(NULL, "audmux", audmux_clk)
_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
};
int __init mx25_clocks_init(void)
......@@ -238,9 +296,13 @@ int __init mx25_clocks_init(void)
__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
__raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
clk_enable(&uart1_clk);
#endif
/* Clock source for lcdc is upll */
__raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7), CRM_BASE + 0x64);
/* Clock source for lcdc and csi is upll */
__raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0),
CRM_BASE + 0x64);
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
......
arch/arm/mach-mx25/devices-imx25.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx25.h>
#include <mach/devices-common.h>
#define imx25_add_flexcan0(pdata) \
imx_add_flexcan(0, MX25_CAN1_BASE_ADDR, SZ_16K, MX25_INT_CAN1, pdata)
#define imx25_add_flexcan1(pdata) \
imx_add_flexcan(1, MX25_CAN2_BASE_ADDR, SZ_16K, MX25_INT_CAN2, pdata)
#define imx25_add_imx_i2c0(pdata) \
imx_add_imx_i2c(0, MX25_I2C1_BASE_ADDR, SZ_16K, MX25_INT_I2C1, pdata)
#define imx25_add_imx_i2c1(pdata) \
imx_add_imx_i2c(1, MX25_I2C2_BASE_ADDR, SZ_16K, MX25_INT_I2C2, pdata)
#define imx25_add_imx_i2c2(pdata) \
imx_add_imx_i2c(2, MX25_I2C3_BASE_ADDR, SZ_16K, MX25_INT_I2C3, pdata)
#define imx25_add_imx_uart0(pdata) \
imx_add_imx_uart_1irq(0, MX25_UART1_BASE_ADDR, SZ_16K, MX25_INT_UART1, pdata)
#define imx25_add_imx_uart1(pdata) \
imx_add_imx_uart_1irq(1, MX25_UART2_BASE_ADDR, SZ_16K, MX25_INT_UART2, pdata)
#define imx25_add_imx_uart2(pdata) \
imx_add_imx_uart_1irq(2, MX25_UART3_BASE_ADDR, SZ_16K, MX25_INT_UART3, pdata)
#define imx25_add_imx_uart3(pdata) \
imx_add_imx_uart_1irq(3, MX25_UART4_BASE_ADDR, SZ_16K, MX25_INT_UART4, pdata)
#define imx25_add_imx_uart4(pdata) \
imx_add_imx_uart_1irq(4, MX25_UART5_BASE_ADDR, SZ_16K, MX25_INT_UART5, pdata)
#define imx25_add_mxc_nand(pdata) \
imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
#define imx25_add_spi_imx0(pdata) \
imx_add_spi_imx(0, MX25_CSPI1_BASE_ADDR, SZ_16K, MX25_INT_CSPI1, pdata)
#define imx25_add_spi_imx1(pdata) \
imx_add_spi_imx(1, MX25_CSPI2_BASE_ADDR, SZ_16K, MX25_INT_CSPI2, pdata)
#define imx25_add_spi_imx2(pdata) \
imx_add_spi_imx(2, MX25_CSPI3_BASE_ADDR, SZ_16K, MX25_INT_CSPI3, pdata)
arch/arm/mach-mx25/devices.c
View file @ d50f58bb
......@@ -22,103 +22,6 @@
#include <mach/mx25.h>
#include <mach/irqs.h>
static struct resource uart0[] = {
{
.start = 0x43f90000,
.end = 0x43f93fff,
.flags = IORESOURCE_MEM,
}, {
.start = 45,
.end = 45,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device0 = {
.name = "imx-uart",
.id = 0,
.resource = uart0,
.num_resources = ARRAY_SIZE(uart0),
};
static struct resource uart1[] = {
{
.start = 0x43f94000,
.end = 0x43f97fff,
.flags = IORESOURCE_MEM,
}, {
.start = 32,
.end = 32,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device1 = {
.name = "imx-uart",
.id = 1,
.resource = uart1,
.num_resources = ARRAY_SIZE(uart1),
};
static struct resource uart2[] = {
{
.start = 0x5000c000,
.end = 0x5000ffff,
.flags = IORESOURCE_MEM,
}, {
.start = 18,
.end = 18,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device2 = {
.name = "imx-uart",
.id = 2,
.resource = uart2,
.num_resources = ARRAY_SIZE(uart2),
};
static struct resource uart3[] = {
{
.start = 0x50008000,
.end = 0x5000bfff,
.flags = IORESOURCE_MEM,
}, {
.start = 5,
.end = 5,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device3 = {
.name = "imx-uart",
.id = 3,
.resource = uart3,
.num_resources = ARRAY_SIZE(uart3),
};
static struct resource uart4[] = {
{
.start = 0x5002c000,
.end = 0x5002ffff,
.flags = IORESOURCE_MEM,
}, {
.start = 40,
.end = 40,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device4 = {
.name = "imx-uart",
.id = 4,
.resource = uart4,
.num_resources = ARRAY_SIZE(uart4),
};
#define MX25_OTG_BASE_ADDR 0x53FF4000
static u64 otg_dmamask = DMA_BIT_MASK(32);
static struct resource mxc_otg_resources[] = {
......@@ -181,63 +84,6 @@ struct platform_device mxc_usbh2 = {
.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
};
static struct resource mxc_spi_resources0[] = {
{
.start = 0x43fa4000,
.end = 0x43fa7fff,
.flags = IORESOURCE_MEM,
}, {
.start = 14,
.end = 14,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device0 = {
.name = "spi_imx",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_spi_resources0),
.resource = mxc_spi_resources0,
};
static struct resource mxc_spi_resources1[] = {
{
.start = 0x50010000,
.end = 0x50013fff,
.flags = IORESOURCE_MEM,
}, {
.start = 13,
.end = 13,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device1 = {
.name = "spi_imx",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_spi_resources1),
.resource = mxc_spi_resources1,
};
static struct resource mxc_spi_resources2[] = {
{
.start = 0x50004000,
.end = 0x50007fff,
.flags = IORESOURCE_MEM,
}, {
.start = 0,
.end = 0,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device2 = {
.name = "spi_imx",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_spi_resources2),
.resource = mxc_spi_resources2,
};
static struct resource mxc_pwm_resources0[] = {
{
.start = 0x53fe0000,
......@@ -333,63 +179,6 @@ struct platform_device mxc_pwm_device3 = {
.resource = mxc_pwm_resources3,
};
static struct resource mxc_i2c_1_resources[] = {
{
.start = 0x43f80000,
.end = 0x43f83fff,
.flags = IORESOURCE_MEM,
}, {
.start = 3,
.end = 3,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device0 = {
.name = "imx-i2c",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_i2c_1_resources),
.resource = mxc_i2c_1_resources,
};
static struct resource mxc_i2c_2_resources[] = {
{
.start = 0x43f98000,
.end = 0x43f9bfff,
.flags = IORESOURCE_MEM,
}, {
.start = 4,
.end = 4,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device1 = {
.name = "imx-i2c",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_i2c_2_resources),
.resource = mxc_i2c_2_resources,
};
static struct resource mxc_i2c_3_resources[] = {
{
.start = 0x43f84000,
.end = 0x43f87fff,
.flags = IORESOURCE_MEM,
}, {
.start = 10,
.end = 10,
.flags = IORESOURCE_IRQ,
}
};
struct platform_device mxc_i2c_device2 = {
.name = "imx-i2c",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_i2c_3_resources),
.resource = mxc_i2c_3_resources,
};
static struct mxc_gpio_port imx_gpio_ports[] = {
{
.chip.label = "gpio-0",
......@@ -414,7 +203,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
}
};
int __init mxc_register_gpios(void)
int __init imx25_register_gpios(void)
{
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
}
......@@ -439,26 +228,6 @@ struct platform_device mx25_fec_device = {
.resource = mx25_fec_resources,
};
static struct resource mxc_nand_resources[] = {
{
.start = MX25_NFC_BASE_ADDR,
.end = MX25_NFC_BASE_ADDR + 0x1fff,
.flags = IORESOURCE_MEM,
},
{
.start = MX25_INT_NANDFC,
.end = MX25_INT_NANDFC,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_nand_device = {
.name = "mxc_nand",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_nand_resources),
.resource = mxc_nand_resources,
};
static struct resource mx25_rtc_resources[] = {
{
.start = MX25_DRYICE_BASE_ADDR,
......@@ -515,3 +284,83 @@ struct platform_device mxc_wdt = {
.num_resources = ARRAY_SIZE(mxc_wdt_resources),
.resource = mxc_wdt_resources,
};
static struct resource mx25_kpp_resources[] = {
{
.start = MX25_KPP_BASE_ADDR,
.end = MX25_KPP_BASE_ADDR + 0xf,
.flags = IORESOURCE_MEM,
},
{
.start = MX25_INT_KPP,
.end = MX25_INT_KPP,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mx25_kpp_device = {
.name = "imx-keypad",
.id = -1,
.num_resources = ARRAY_SIZE(mx25_kpp_resources),
.resource = mx25_kpp_resources,
};
static struct resource imx_ssi_resources0[] = {
{
.start = MX25_SSI1_BASE_ADDR,
.end = MX25_SSI1_BASE_ADDR + 0x3fff,
.flags = IORESOURCE_MEM,
}, {
.start = MX25_INT_SSI1,
.end = MX25_INT_SSI1,
.flags = IORESOURCE_IRQ,
},
};
static struct resource imx_ssi_resources1[] = {
{
.start = MX25_SSI2_BASE_ADDR,
.end = MX25_SSI2_BASE_ADDR + 0x3fff,
.flags = IORESOURCE_MEM
}, {
.start = MX25_INT_SSI2,
.end = MX25_INT_SSI2,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device imx_ssi_device0 = {
.name = "imx-ssi",
.id = 0,
.num_resources = ARRAY_SIZE(imx_ssi_resources0),
.resource = imx_ssi_resources0,
};
struct platform_device imx_ssi_device1 = {
.name = "imx-ssi",
.id = 1,
.num_resources = ARRAY_SIZE(imx_ssi_resources1),
.resource = imx_ssi_resources1,
};
static struct resource mx25_csi_resources[] = {
{
.start = MX25_CSI_BASE_ADDR,
.end = MX25_CSI_BASE_ADDR + 0xfff,
.flags = IORESOURCE_MEM,
},
{
.start = MX25_INT_CSI,
.flags = IORESOURCE_IRQ
},
};
struct platform_device mx25_csi_device = {
.name = "mx2-camera",
.id = 0,
.num_resources = ARRAY_SIZE(mx25_csi_resources),
.resource = mx25_csi_resources,
.dev = {
.coherent_dma_mask = 0xffffffff,
},
};
arch/arm/mach-mx25/devices.h
View file @ d50f58bb
extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_uart_device3;
extern struct platform_device mxc_uart_device4;
extern struct platform_device mxc_otg;
extern struct platform_device otg_udc_device;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;
extern struct platform_device mxc_pwm_device0;
extern struct platform_device mxc_pwm_device1;
extern struct platform_device mxc_pwm_device2;
extern struct platform_device mxc_pwm_device3;
extern struct platform_device mxc_keypad_device;
extern struct platform_device mxc_i2c_device0;
extern struct platform_device mxc_i2c_device1;
extern struct platform_device mxc_i2c_device2;
extern struct platform_device mx25_fec_device;
extern struct platform_device mxc_nand_device;
extern struct platform_device mx25_rtc_device;
extern struct platform_device mx25_fb_device;
extern struct platform_device mxc_wdt;
extern struct platform_device mx25_kpp_device;
extern struct platform_device imx_ssi_device0;
extern struct platform_device imx_ssi_device1;
extern struct platform_device mx25_csi_device;
arch/arm/mach-mx25/eukrea_mbimxsd-baseboard.c 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Eric Benard - eric@eukrea.com
*
* Based on pcm970-baseboard.c which is :
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/gpio.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <video/platform_lcd.h>
#include <mach/hardware.h>
#include <mach/iomux-mx25.h>
#include <mach/common.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/mx25.h>
#include <mach/imx-uart.h>
#include <mach/imxfb.h>
#include <mach/ssi.h>
#include <mach/audmux.h>
#include "devices-imx25.h"
#include "devices.h"
static struct pad_desc eukrea_mbimxsd_pads[] = {
/* LCD */
MX25_PAD_LD0__LD0,
MX25_PAD_LD1__LD1,
MX25_PAD_LD2__LD2,
MX25_PAD_LD3__LD3,
MX25_PAD_LD4__LD4,
MX25_PAD_LD5__LD5,
MX25_PAD_LD6__LD6,
MX25_PAD_LD7__LD7,
MX25_PAD_LD8__LD8,
MX25_PAD_LD9__LD9,
MX25_PAD_LD10__LD10,
MX25_PAD_LD11__LD11,
MX25_PAD_LD12__LD12,
MX25_PAD_LD13__LD13,
MX25_PAD_LD14__LD14,
MX25_PAD_LD15__LD15,
MX25_PAD_GPIO_E__LD16,
MX25_PAD_GPIO_F__LD17,
MX25_PAD_HSYNC__HSYNC,
MX25_PAD_VSYNC__VSYNC,
MX25_PAD_LSCLK__LSCLK,
MX25_PAD_OE_ACD__OE_ACD,
MX25_PAD_CONTRAST__CONTRAST,
/* LCD_PWR */
MX25_PAD_PWM__GPIO_1_26,
/* LED */
MX25_PAD_POWER_FAIL__GPIO_3_19,
/* SWITCH */
MX25_PAD_VSTBY_ACK__GPIO_3_18,
/* UART2 */
MX25_PAD_UART2_RTS__UART2_RTS,
MX25_PAD_UART2_CTS__UART2_CTS,
MX25_PAD_UART2_TXD__UART2_TXD,
MX25_PAD_UART2_RXD__UART2_RXD,
/* SD1 */
MX25_PAD_SD1_CMD__SD1_CMD,
MX25_PAD_SD1_CLK__SD1_CLK,
MX25_PAD_SD1_DATA0__SD1_DATA0,
MX25_PAD_SD1_DATA1__SD1_DATA1,
MX25_PAD_SD1_DATA2__SD1_DATA2,
MX25_PAD_SD1_DATA3__SD1_DATA3,
/* SD1 CD */
MX25_PAD_DE_B__GPIO_2_20,
/* I2S */
MX25_PAD_KPP_COL3__AUD5_TXFS,
MX25_PAD_KPP_COL2__AUD5_TXC,
MX25_PAD_KPP_COL1__AUD5_RXD,
MX25_PAD_KPP_COL0__AUD5_TXD,
};
#define GPIO_LED1 83
#define GPIO_SWITCH1 82
#define GPIO_SD1CD 52
#define GPIO_LCDPWR 26
static struct imx_fb_videomode eukrea_mximxsd_modes[] = {
{
.mode = {
.name = "CMO-QVGA",
.refresh = 60,
.xres = 320,
.yres = 240,
.pixclock = KHZ2PICOS(6500),
.left_margin = 30,
.right_margin = 38,
.upper_margin = 20,
.lower_margin = 3,
.hsync_len = 15,
.vsync_len = 4,
},
.bpp = 16,
.pcr = 0xCAD08B80,
},
};
static struct imx_fb_platform_data eukrea_mximxsd_fb_pdata = {
.mode = eukrea_mximxsd_modes,
.num_modes = ARRAY_SIZE(eukrea_mximxsd_modes),
.pwmr = 0x00A903FF,
.lscr1 = 0x00120300,
.dmacr = 0x00040060,
};
static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
unsigned int power)
{
if (power)
gpio_direction_output(GPIO_LCDPWR, 1);
else
gpio_direction_output(GPIO_LCDPWR, 0);
}
static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
.set_power = eukrea_mbimxsd_lcd_power_set,
};
static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
.name = "platform-lcd",
.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
};
static struct gpio_led eukrea_mbimxsd_leds[] = {
{
.name = "led1",
.default_trigger = "heartbeat",
.active_low = 1,
.gpio = GPIO_LED1,
},
};
static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
.leds = eukrea_mbimxsd_leds,
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
};
static struct platform_device eukrea_mbimxsd_leds_gpio = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &eukrea_mbimxsd_led_info,
},
};
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
{
.gpio = GPIO_SWITCH1,
.code = BTN_0,
.desc = "BP1",
.active_low = 1,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data eukrea_mbimxsd_button_data = {
.buttons = eukrea_mbimxsd_gpio_buttons,
.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
};
static struct platform_device eukrea_mbimxsd_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &eukrea_mbimxsd_button_data,
}
};
static struct platform_device *platform_devices[] __initdata = {
&eukrea_mbimxsd_leds_gpio,
&eukrea_mbimxsd_button_device,
&eukrea_mbimxsd_lcd_powerdev,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
{
I2C_BOARD_INFO("tlv320aic23", 0x1a),
},
};
struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
};
/*
* system init for baseboard usage. Will be called by cpuimx25 init.
*
* Add platform devices present on this baseboard and init
* them from CPU side as far as required to use them later on
*/
void __init eukrea_mbimxsd_baseboard_init(void)
{
if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
ARRAY_SIZE(eukrea_mbimxsd_pads)))
printk(KERN_ERR "error setting mbimxsd pads !\n");
#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
/* SSI unit master I2S codec connected to SSI_AUD5*/
mxc_audmux_v2_configure_port(0,
MXC_AUDMUX_V2_PTCR_SYN |
MXC_AUDMUX_V2_PTCR_TFSDIR |
MXC_AUDMUX_V2_PTCR_TFSEL(4) |
MXC_AUDMUX_V2_PTCR_TCLKDIR |
MXC_AUDMUX_V2_PTCR_TCSEL(4),
MXC_AUDMUX_V2_PDCR_RXDSEL(4)
);
mxc_audmux_v2_configure_port(4,
MXC_AUDMUX_V2_PTCR_SYN,
MXC_AUDMUX_V2_PDCR_RXDSEL(0)
);
#endif
imx25_add_imx_uart1(&uart_pdata);
mxc_register_device(&mx25_fb_device, &eukrea_mximxsd_fb_pdata);
mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata);
gpio_request(GPIO_LED1, "LED1");
gpio_direction_output(GPIO_LED1, 1);
gpio_free(GPIO_LED1);
gpio_request(GPIO_SWITCH1, "SWITCH1");
gpio_direction_input(GPIO_SWITCH1);
gpio_free(GPIO_SWITCH1);
gpio_request(GPIO_LCDPWR, "LCDPWR");
gpio_direction_output(GPIO_LCDPWR, 1);
gpio_free(GPIO_SWITCH1);
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
arch/arm/mach-mx25/mach-cpuimx25.c 0 → 100644
View file @ d50f58bb
/*
* Copyright 2009 Sascha Hauer, <kernel@pengutronix.de>
* Copyright 2010 Eric Bénard - Eukréa Electromatique, <eric@eukrea.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor,
* Boston, MA 02110-1301, USA.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/gpio.h>
#include <linux/fec.h>
#include <linux/platform_device.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/fsl_devices.h>
#include <mach/eukrea-baseboards.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/mx25.h>
#include <mach/mxc_nand.h>
#include <mach/imxfb.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include <mach/iomux-mx25.h>
#include "devices-imx25.h"
#include "devices.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct pad_desc eukrea_cpuimx25_pads[] = {
/* FEC - RMII */
MX25_PAD_FEC_MDC__FEC_MDC,
MX25_PAD_FEC_MDIO__FEC_MDIO,
MX25_PAD_FEC_TDATA0__FEC_TDATA0,
MX25_PAD_FEC_TDATA1__FEC_TDATA1,
MX25_PAD_FEC_TX_EN__FEC_TX_EN,
MX25_PAD_FEC_RDATA0__FEC_RDATA0,
MX25_PAD_FEC_RDATA1__FEC_RDATA1,
MX25_PAD_FEC_RX_DV__FEC_RX_DV,
MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
/* I2C1 */
MX25_PAD_I2C1_CLK__I2C1_CLK,
MX25_PAD_I2C1_DAT__I2C1_DAT,
};
static struct fec_platform_data mx25_fec_pdata = {
.phy = PHY_INTERFACE_MODE_RMII,
};
static const struct mxc_nand_platform_data
eukrea_cpuimx25_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
};
static const struct imxi2c_platform_data
eukrea_cpuimx25_i2c0_data __initconst = {
.bitrate = 100000,
};
static struct i2c_board_info eukrea_cpuimx25_i2c_devices[] = {
{
I2C_BOARD_INFO("pcf8563", 0x51),
},
};
static struct mxc_usbh_platform_data otg_pdata = {
.portsc = MXC_EHCI_MODE_UTMI,
.flags = MXC_EHCI_INTERFACE_DIFF_UNI,
};
static struct mxc_usbh_platform_data usbh2_pdata = {
.portsc = MXC_EHCI_MODE_SERIAL,
.flags = MXC_EHCI_INTERFACE_SINGLE_UNI | MXC_EHCI_INTERNAL_PHY |
MXC_EHCI_IPPUE_DOWN,
};
static struct fsl_usb2_platform_data otg_device_pdata = {
.operating_mode = FSL_USB2_DR_DEVICE,
.phy_mode = FSL_USB2_PHY_UTMI,
};
static int otg_mode_host;
static int __init eukrea_cpuimx25_otg_mode(char *options)
{
if (!strcmp(options, "host"))
otg_mode_host = 1;
else if (!strcmp(options, "device"))
otg_mode_host = 0;
else
pr_info("otg_mode neither \"host\" nor \"device\". "
"Defaulting to device\n");
return 0;
}
__setup("otg_mode=", eukrea_cpuimx25_otg_mode);
static void __init eukrea_cpuimx25_init(void)
{
if (mxc_iomux_v3_setup_multiple_pads(eukrea_cpuimx25_pads,
ARRAY_SIZE(eukrea_cpuimx25_pads)))
printk(KERN_ERR "error setting cpuimx25 pads !\n");
imx25_add_imx_uart0(&uart_pdata);
imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info);
mxc_register_device(&mx25_rtc_device, NULL);
mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices,
ARRAY_SIZE(eukrea_cpuimx25_i2c_devices));
imx25_add_imx_i2c0(&eukrea_cpuimx25_i2c0_data);
#if defined(CONFIG_USB_ULPI)
if (otg_mode_host) {
otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_otg, &otg_pdata);
}
mxc_register_device(&mxc_usbh2, &usbh2_pdata);
#endif
if (!otg_mode_host)
mxc_register_device(&otg_udc_device, &otg_device_pdata);
#ifdef CONFIG_MACH_EUKREA_MBIMXSD_BASEBOARD
eukrea_mbimxsd_baseboard_init();
#endif
}
static void __init eukrea_cpuimx25_timer_init(void)
{
mx25_clocks_init();
}
static struct sys_timer eukrea_cpuimx25_timer = {
.init = eukrea_cpuimx25_timer_init,
};
MACHINE_START(EUKREA_CPUIMX25, "Eukrea CPUIMX25")
/* Maintainer: Eukrea Electromatique */
.phys_io = MX25_AIPS1_BASE_ADDR,
.io_pg_offst = ((MX25_AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
.boot_params = MX25_PHYS_OFFSET + 0x100,
.map_io = mx25_map_io,
.init_irq = mx25_init_irq,
.init_machine = eukrea_cpuimx25_init,
.timer = &eukrea_cpuimx25_timer,
MACHINE_END
arch/arm/mach-mx25/mach-mx25pdk.c → arch/arm/mach-mx25/mach-mx25_3ds.c
View file @ d50f58bb
......@@ -16,6 +16,12 @@
* Boston, MA 02110-1301, USA.
*/
/*
* This machine is known as:
* - i.MX25 3-Stack Development System
* - i.MX25 Platform Development Kit (i.MX25 PDK)
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
......@@ -24,6 +30,7 @@
#include <linux/gpio.h>
#include <linux/fec.h>
#include <linux/platform_device.h>
#include <linux/input/matrix_keypad.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
......@@ -32,14 +39,14 @@
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/mx25.h>
#include <mach/mxc_nand.h>
#include <mach/imxfb.h>
#include "devices.h"
#include <mach/iomux-mx25.h>
static struct imxuart_platform_data uart_pdata = {
#include "devices-imx25.h"
#include "devices.h"
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
......@@ -80,6 +87,16 @@ static struct pad_desc mx25pdk_pads[] = {
MX25_PAD_LSCLK__LSCLK,
MX25_PAD_OE_ACD__OE_ACD,
MX25_PAD_CONTRAST__CONTRAST,
/* Keypad */
MX25_PAD_KPP_ROW0__KPP_ROW0,
MX25_PAD_KPP_ROW1__KPP_ROW1,
MX25_PAD_KPP_ROW2__KPP_ROW2,
MX25_PAD_KPP_ROW3__KPP_ROW3,
MX25_PAD_KPP_COL0__KPP_COL0,
MX25_PAD_KPP_COL1__KPP_COL1,
MX25_PAD_KPP_COL2__KPP_COL2,
MX25_PAD_KPP_COL3__KPP_COL3,
};
static struct fec_platform_data mx25_fec_pdata = {
......@@ -103,7 +120,8 @@ static void __init mx25pdk_fec_reset(void)
gpio_set_value(FEC_RESET_B_GPIO, 1);
}
static struct mxc_nand_platform_data mx25pdk_nand_board_info = {
static const struct mxc_nand_platform_data
mx25pdk_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
.flash_bbt = 1,
......@@ -137,19 +155,45 @@ static struct imx_fb_platform_data mx25pdk_fb_pdata = {
.dmacr = 0x00020010,
};
static const uint32_t mx25pdk_keymap[] = {
KEY(0, 0, KEY_UP),
KEY(0, 1, KEY_DOWN),
KEY(0, 2, KEY_VOLUMEDOWN),
KEY(0, 3, KEY_HOME),
KEY(1, 0, KEY_RIGHT),
KEY(1, 1, KEY_LEFT),
KEY(1, 2, KEY_ENTER),
KEY(1, 3, KEY_VOLUMEUP),
KEY(2, 0, KEY_F6),
KEY(2, 1, KEY_F8),
KEY(2, 2, KEY_F9),
KEY(2, 3, KEY_F10),
KEY(3, 0, KEY_F1),
KEY(3, 1, KEY_F2),
KEY(3, 2, KEY_F3),
KEY(3, 3, KEY_POWER),
};
static struct matrix_keymap_data mx25pdk_keymap_data = {
.keymap = mx25pdk_keymap,
.keymap_size = ARRAY_SIZE(mx25pdk_keymap),
};
static void __init mx25pdk_init(void)
{
mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
ARRAY_SIZE(mx25pdk_pads));
mxc_register_device(&mxc_uart_device0, &uart_pdata);
imx25_add_imx_uart0(&uart_pdata);
mxc_register_device(&mxc_usbh2, NULL);
mxc_register_device(&mxc_nand_device, &mx25pdk_nand_board_info);
imx25_add_mxc_nand(&mx25pdk_nand_board_info);
mxc_register_device(&mx25_rtc_device, NULL);
mxc_register_device(&mx25_fb_device, &mx25pdk_fb_pdata);
mxc_register_device(&mxc_wdt, NULL);
mx25pdk_fec_reset();
mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
mxc_register_device(&mx25_kpp_device, &mx25pdk_keymap_data);
}
static void __init mx25pdk_timer_init(void)
......
arch/arm/mach-mx25/mm.c
View file @ d50f58bb
......@@ -14,10 +14,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/mm.h>
......@@ -69,8 +65,11 @@ void __init mx25_map_io(void)
iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc));
}
int imx25_register_gpios(void);
void __init mx25_init_irq(void)
{
mxc_init_irq((void __iomem *)MX25_AVIC_BASE_ADDR_VIRT);
imx25_register_gpios();
}
arch/arm/mach-mx3/Kconfig
View file @ d50f58bb
......@@ -15,6 +15,8 @@ comment "MX3 platforms:"
config MACH_MX31ADS
bool "Support MX31ADS platforms"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
default y
help
Include support for MX31ADS platform. This includes specific
......@@ -34,6 +36,9 @@ config MACH_MX31ADS_WM1133_EV1
config MACH_PCM037
bool "Support Phytec pcm037 (i.MX31) platforms"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
help
Include support for Phytec pcm037 platform. This includes
......@@ -42,6 +47,7 @@ config MACH_PCM037
config MACH_PCM037_EET
bool "Support pcm037 EET board extensions"
depends on MACH_PCM037
select IMX_HAVE_PLATFORM_SPI_IMX
help
Add support for PCM037 EET baseboard extensions. If you are using the
OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
......@@ -51,6 +57,9 @@ config MACH_MX31LITE
bool "Support MX31 LITEKIT (LogicPD)"
select ARCH_MX31
select MXC_ULPI if USB_ULPI
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
help
Include support for MX31 LITEKIT platform. This includes specific
configurations for the board and its peripherals.
......@@ -58,6 +67,10 @@ config MACH_MX31LITE
config MACH_MX31_3DS
bool "Support MX31PDK (3DS)"
select ARCH_MX31
select MXC_DEBUG_BOARD
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_SPI_IMX
help
Include support for MX31PDK (3DS) platform. This includes specific
configurations for the board and its peripherals.
......@@ -74,6 +87,9 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT
config MACH_MX31MOBOARD
bool "Support mx31moboard platforms (EPFL Mobots group)"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_ULPI if USB_ULPI
help
Include support for mx31moboard platform. This includes specific
......@@ -82,6 +98,8 @@ config MACH_MX31MOBOARD
config MACH_MX31LILLY
bool "Support MX31 LILLY-1131 platforms (INCO startec)"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_ULPI if USB_ULPI
help
Include support for mx31 based LILLY1131 modules. This includes
......@@ -90,6 +108,7 @@ config MACH_MX31LILLY
config MACH_QONG
bool "Support Dave/DENX QongEVB-LITE platform"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_UART
help
Include support for Dave/DENX QongEVB-LITE platform. This includes
specific configurations for the board and its peripherals.
......@@ -97,6 +116,10 @@ config MACH_QONG
config MACH_PCM043
bool "Support Phytec pcm043 (i.MX35) platforms"
select ARCH_MX35
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select IMX_HAVE_PLATFORM_FLEXCAN
select MXC_ULPI if USB_ULPI
help
Include support for Phytec pcm043 platform. This includes
......@@ -105,6 +128,9 @@ config MACH_PCM043
config MACH_ARMADILLO5X0
bool "Support Atmark Armadillo-500 Development Base Board"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
help
Include support for Atmark Armadillo-500 platform. This includes
......@@ -113,6 +139,7 @@ config MACH_ARMADILLO5X0
config MACH_MX35_3DS
bool "Support MX35PDK platform"
select ARCH_MX35
select IMX_HAVE_PLATFORM_IMX_UART
default n
help
Include support for MX35PDK platform. This includes specific
......@@ -121,8 +148,34 @@ config MACH_MX35_3DS
config MACH_KZM_ARM11_01
bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
select ARCH_MX31
select IMX_HAVE_PLATFORM_IMX_UART
help
Include support for KZM-ARM11-01. This includes specific
configurations for the board and its peripherals.
config MACH_EUKREA_CPUIMX35
bool "Support Eukrea CPUIMX35 Platform"
select ARCH_MX35
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_IMX_I2C
select IMX_HAVE_PLATFORM_MXC_NAND
select MXC_ULPI if USB_ULPI
help
Include support for Eukrea CPUIMX35 platform. This includes
specific configurations for the board and its peripherals.
choice
prompt "Baseboard"
depends on MACH_EUKREA_CPUIMX35
default MACH_EUKREA_MBIMXSD35_BASEBOARD
config MACH_EUKREA_MBIMXSD35_BASEBOARD
prompt "Eukrea MBIMXSD development board"
bool
help
This adds board specific devices that can be found on Eukrea's
MBIMXSD evaluation board.
endchoice
endif
arch/arm/mach-mx3/Makefile
View file @ d50f58bb
......@@ -22,5 +22,7 @@ obj-$(CONFIG_MACH_MX31MOBOARD) += mach-mx31moboard.o mx31moboard-devboard.o \
obj-$(CONFIG_MACH_QONG) += mach-qong.o
obj-$(CONFIG_MACH_PCM043) += mach-pcm043.o
obj-$(CONFIG_MACH_ARMADILLO5X0) += mach-armadillo5x0.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35pdk.o
obj-$(CONFIG_MACH_MX35_3DS) += mach-mx35_3ds.o
obj-$(CONFIG_MACH_KZM_ARM11_01) += mach-kzm_arm11_01.o
obj-$(CONFIG_MACH_EUKREA_CPUIMX35) += mach-cpuimx35.o
obj-$(CONFIG_MACH_EUKREA_MBIMXSD35_BASEBOARD) += eukrea_mbimxsd-baseboard.o
arch/arm/mach-mx3/clock-imx35.c
View file @ d50f58bb
......@@ -359,7 +359,7 @@ DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL);
DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL);
DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL);
DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL);
DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, NULL, NULL);
DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, get_rate_ahb, NULL);
DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL);
DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL);
DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL);
......@@ -428,8 +428,8 @@ static struct clk nfc_clk = {
static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "asrc", asrc_clk)
_REGISTER_CLOCK(NULL, "ata", ata_clk)
_REGISTER_CLOCK(NULL, "can", can1_clk)
_REGISTER_CLOCK(NULL, "can", can2_clk)
_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
_REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk)
_REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk)
_REGISTER_CLOCK(NULL, "ect", ect_clk)
......
arch/arm/mach-mx3/devices-imx31.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx31.h>
#include <mach/devices-common.h>
#define imx31_add_imx_i2c0(pdata) \
imx_add_imx_i2c(0, MX31_I2C1_BASE_ADDR, SZ_4K, MX31_INT_I2C1, pdata)
#define imx31_add_imx_i2c1(pdata) \
imx_add_imx_i2c(1, MX31_I2C2_BASE_ADDR, SZ_4K, MX31_INT_I2C2, pdata)
#define imx31_add_imx_i2c2(pdata) \
imx_add_imx_i2c(2, MX31_I2C3_BASE_ADDR, SZ_4K, MX31_INT_I2C3, pdata)
#define imx31_add_imx_uart0(pdata) \
imx_add_imx_uart_1irq(0, MX31_UART1_BASE_ADDR, SZ_16K, MX31_INT_UART1, pdata)
#define imx31_add_imx_uart1(pdata) \
imx_add_imx_uart_1irq(1, MX31_UART2_BASE_ADDR, SZ_16K, MX31_INT_UART2, pdata)
#define imx31_add_imx_uart2(pdata) \
imx_add_imx_uart_1irq(2, MX31_UART3_BASE_ADDR, SZ_16K, MX31_INT_UART3, pdata)
#define imx31_add_imx_uart3(pdata) \
imx_add_imx_uart_1irq(3, MX31_UART4_BASE_ADDR, SZ_16K, MX31_INT_UART4, pdata)
#define imx31_add_imx_uart4(pdata) \
imx_add_imx_uart_1irq(4, MX31_UART5_BASE_ADDR, SZ_16K, MX31_INT_UART5, pdata)
#define imx31_add_mxc_nand(pdata) \
imx_add_mxc_nand_v1(MX31_NFC_BASE_ADDR, MX31_INT_NANDFC, pdata)
#define imx31_add_spi_imx0(pdata) \
imx_add_spi_imx(0, MX31_CSPI1_BASE_ADDR, SZ_4K, MX31_INT_CSPI1, pdata)
#define imx31_add_spi_imx1(pdata) \
imx_add_spi_imx(1, MX31_CSPI2_BASE_ADDR, SZ_4K, MX31_INT_CSPI2, pdata)
#define imx31_add_spi_imx2(pdata) \
imx_add_spi_imx(2, MX31_CSPI3_BASE_ADDR, SZ_4K, MX31_INT_CSPI3, pdata)
arch/arm/mach-mx3/devices-imx35.h 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Pengutronix
* Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/mx35.h>
#include <mach/devices-common.h>
#define imx35_add_flexcan0(pdata) \
imx_add_flexcan(0, MX35_CAN1_BASE_ADDR, SZ_16K, MX35_INT_CAN1, pdata)
#define imx35_add_flexcan1(pdata) \
imx_add_flexcan(1, MX35_CAN2_BASE_ADDR, SZ_16K, MX35_INT_CAN2, pdata)
#define imx35_add_imx_i2c0(pdata) \
imx_add_imx_i2c(0, MX35_I2C1_BASE_ADDR, SZ_4K, MX35_INT_I2C1, pdata)
#define imx35_add_imx_i2c1(pdata) \
imx_add_imx_i2c(1, MX35_I2C2_BASE_ADDR, SZ_4K, MX35_INT_I2C2, pdata)
#define imx35_add_imx_i2c2(pdata) \
imx_add_imx_i2c(2, MX35_I2C3_BASE_ADDR, SZ_4K, MX35_INT_I2C3, pdata)
#define imx35_add_imx_uart0(pdata) \
imx_add_imx_uart_1irq(0, MX35_UART1_BASE_ADDR, SZ_16K, MX35_INT_UART1, pdata)
#define imx35_add_imx_uart1(pdata) \
imx_add_imx_uart_1irq(1, MX35_UART2_BASE_ADDR, SZ_16K, MX35_INT_UART2, pdata)
#define imx35_add_imx_uart2(pdata) \
imx_add_imx_uart_1irq(2, MX35_UART3_BASE_ADDR, SZ_16K, MX35_INT_UART3, pdata)
#define imx35_add_mxc_nand(pdata) \
imx_add_mxc_nand_v21(MX35_NFC_BASE_ADDR, MX35_INT_NANDFC, pdata)
#define imx35_add_spi_imx0(pdata) \
imx_add_spi_imx(0, MX35_CSPI1_BASE_ADDR, SZ_4K, MX35_INT_CSPI1, pdata)
#define imx35_add_spi_imx1(pdata) \
imx_add_spi_imx(1, MX35_CSPI2_BASE_ADDR, SZ_4K, MX35_INT_CSPI2, pdata)
arch/arm/mach-mx3/devices.c
View file @ d50f58bb
......@@ -25,108 +25,10 @@
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/mx3_camera.h>
#include "devices.h"
static struct resource uart0[] = {
{
.start = UART1_BASE_ADDR,
.end = UART1_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_UART1,
.end = MXC_INT_UART1,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device0 = {
.name = "imx-uart",
.id = 0,
.resource = uart0,
.num_resources = ARRAY_SIZE(uart0),
};
static struct resource uart1[] = {
{
.start = UART2_BASE_ADDR,
.end = UART2_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_UART2,
.end = MXC_INT_UART2,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device1 = {
.name = "imx-uart",
.id = 1,
.resource = uart1,
.num_resources = ARRAY_SIZE(uart1),
};
static struct resource uart2[] = {
{
.start = UART3_BASE_ADDR,
.end = UART3_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_UART3,
.end = MXC_INT_UART3,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device2 = {
.name = "imx-uart",
.id = 2,
.resource = uart2,
.num_resources = ARRAY_SIZE(uart2),
};
#ifdef CONFIG_ARCH_MX31
static struct resource uart3[] = {
{
.start = UART4_BASE_ADDR,
.end = UART4_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_UART4,
.end = MXC_INT_UART4,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device3 = {
.name = "imx-uart",
.id = 3,
.resource = uart3,
.num_resources = ARRAY_SIZE(uart3),
};
static struct resource uart4[] = {
{
.start = UART5_BASE_ADDR,
.end = UART5_BASE_ADDR + 0x0B5,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_UART5,
.end = MXC_INT_UART5,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_uart_device4 = {
.name = "imx-uart",
.id = 4,
.resource = uart4,
.num_resources = ARRAY_SIZE(uart4),
};
#endif /* CONFIG_ARCH_MX31 */
/* GPIO port description */
static struct mxc_gpio_port imx_gpio_ports[] = {
{
......@@ -147,7 +49,7 @@ static struct mxc_gpio_port imx_gpio_ports[] = {
}
};
int __init mxc_register_gpios(void)
int __init imx3x_register_gpios(void)
{
return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
}
......@@ -167,82 +69,6 @@ struct platform_device mxc_w1_master_device = {
.resource = mxc_w1_master_resources,
};
static struct resource mxc_nand_resources[] = {
{
.start = 0, /* runtime dependent */
.end = 0,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_NANDFC,
.end = MXC_INT_NANDFC,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_nand_device = {
.name = "mxc_nand",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_nand_resources),
.resource = mxc_nand_resources,
};
static struct resource mxc_i2c0_resources[] = {
{
.start = I2C_BASE_ADDR,
.end = I2C_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_I2C,
.end = MXC_INT_I2C,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_i2c_device0 = {
.name = "imx-i2c",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_i2c0_resources),
.resource = mxc_i2c0_resources,
};
static struct resource mxc_i2c1_resources[] = {
{
.start = I2C2_BASE_ADDR,
.end = I2C2_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_I2C2,
.end = MXC_INT_I2C2,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_i2c_device1 = {
.name = "imx-i2c",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_i2c1_resources),
.resource = mxc_i2c1_resources,
};
static struct resource mxc_i2c2_resources[] = {
{
.start = I2C3_BASE_ADDR,
.end = I2C3_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_I2C3,
.end = MXC_INT_I2C3,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_i2c_device2 = {
.name = "imx-i2c",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_i2c2_resources),
.resource = mxc_i2c2_resources,
};
#ifdef CONFIG_ARCH_MX31
static struct resource mxcsdhc0_resources[] = {
{
......@@ -455,68 +281,7 @@ struct platform_device mxc_usbh2 = {
.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
};
/*
* SPI master controller
* 3 channels
*/
static struct resource mxc_spi_0_resources[] = {
{
.start = CSPI1_BASE_ADDR,
.end = CSPI1_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI1,
.end = MXC_INT_CSPI1,
.flags = IORESOURCE_IRQ,
},
};
static struct resource mxc_spi_1_resources[] = {
{
.start = CSPI2_BASE_ADDR,
.end = CSPI2_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI2,
.end = MXC_INT_CSPI2,
.flags = IORESOURCE_IRQ,
},
};
static struct resource mxc_spi_2_resources[] = {
{
.start = CSPI3_BASE_ADDR,
.end = CSPI3_BASE_ADDR + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MXC_INT_CSPI3,
.end = MXC_INT_CSPI3,
.flags = IORESOURCE_IRQ,
},
};
struct platform_device mxc_spi_device0 = {
.name = "spi_imx",
.id = 0,
.num_resources = ARRAY_SIZE(mxc_spi_0_resources),
.resource = mxc_spi_0_resources,
};
struct platform_device mxc_spi_device1 = {
.name = "spi_imx",
.id = 1,
.num_resources = ARRAY_SIZE(mxc_spi_1_resources),
.resource = mxc_spi_1_resources,
};
struct platform_device mxc_spi_device2 = {
.name = "spi_imx",
.id = 2,
.num_resources = ARRAY_SIZE(mxc_spi_2_resources),
.resource = mxc_spi_2_resources,
};
#ifdef CONFIG_ARCH_MX35
#if defined(CONFIG_ARCH_MX35)
static struct resource mxc_fec_resources[] = {
{
.start = MXC_FEC_BASE_ADDR,
......@@ -628,16 +393,15 @@ struct platform_device imx_kpp_device = {
static int __init mx3_devices_init(void)
{
#if defined(CONFIG_ARCH_MX31)
if (cpu_is_mx31()) {
mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
mxc_register_device(&mxc_rnga_device, NULL);
}
#endif
#if defined(CONFIG_ARCH_MX35)
if (cpu_is_mx35()) {
mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0x1fff;
otg_resources[0].start = MX35_OTG_BASE_ADDR;
otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
otg_resources[1].start = MXC_INT_USBOTG;
......@@ -653,6 +417,7 @@ static int __init mx3_devices_init(void)
imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
}
#endif
return 0;
}
......
arch/arm/mach-mx3/devices.h
View file @ d50f58bb
extern struct platform_device mxc_uart_device0;
extern struct platform_device mxc_uart_device1;
extern struct platform_device mxc_uart_device2;
extern struct platform_device mxc_uart_device3;
extern struct platform_device mxc_uart_device4;
extern struct platform_device mxc_w1_master_device;
extern struct platform_device mxc_nand_device;
extern struct platform_device mxc_i2c_device0;
extern struct platform_device mxc_i2c_device1;
extern struct platform_device mxc_i2c_device2;
extern struct platform_device mx3_ipu;
extern struct platform_device mx3_fb;
extern struct platform_device mx3_camera;
......@@ -20,9 +10,6 @@ extern struct platform_device mxc_otg_host;
extern struct platform_device mxc_usbh1;
extern struct platform_device mxc_usbh2;
extern struct platform_device mxc_rnga_device;
extern struct platform_device mxc_spi_device0;
extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;
extern struct platform_device imx_ssi_device0;
extern struct platform_device imx_ssi_device1;
extern struct platform_device imx_ssi_device1;
......
arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c 0 → 100644
View file @ d50f58bb
/*
* Copyright (C) 2010 Eric Benard - eric@eukrea.com
*
* Based on pcm970-baseboard.c which is :
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/types.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/interrupt.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <video/platform_lcd.h>
#include <linux/i2c.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx35.h>
#include <mach/ipu.h>
#include <mach/mx3fb.h>
#include <mach/audmux.h>
#include <mach/ssi.h>
#include "devices-imx35.h"
#include "devices.h"
static const struct fb_videomode fb_modedb[] = {
{
.name = "CMO_QVGA",
.refresh = 60,
.xres = 320,
.yres = 240,
.pixclock = KHZ2PICOS(6500),
.left_margin = 68,
.right_margin = 20,
.upper_margin = 15,
.lower_margin = 4,
.hsync_len = 30,
.vsync_len = 3,
.sync = 0,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
static struct ipu_platform_data mx3_ipu_data = {
.irq_base = MXC_IPU_IRQ_START,
};
static struct mx3fb_platform_data mx3fb_pdata = {
.dma_dev = &mx3_ipu.dev,
.name = "CMO_QVGA",
.mode = fb_modedb,
.num_modes = ARRAY_SIZE(fb_modedb),
};
static struct pad_desc eukrea_mbimxsd_pads[] = {
/* LCD */
MX35_PAD_LD0__IPU_DISPB_DAT_0,
MX35_PAD_LD1__IPU_DISPB_DAT_1,
MX35_PAD_LD2__IPU_DISPB_DAT_2,
MX35_PAD_LD3__IPU_DISPB_DAT_3,
MX35_PAD_LD4__IPU_DISPB_DAT_4,
MX35_PAD_LD5__IPU_DISPB_DAT_5,
MX35_PAD_LD6__IPU_DISPB_DAT_6,
MX35_PAD_LD7__IPU_DISPB_DAT_7,
MX35_PAD_LD8__IPU_DISPB_DAT_8,
MX35_PAD_LD9__IPU_DISPB_DAT_9,
MX35_PAD_LD10__IPU_DISPB_DAT_10,
MX35_PAD_LD11__IPU_DISPB_DAT_11,
MX35_PAD_LD12__IPU_DISPB_DAT_12,
MX35_PAD_LD13__IPU_DISPB_DAT_13,
MX35_PAD_LD14__IPU_DISPB_DAT_14,
MX35_PAD_LD15__IPU_DISPB_DAT_15,
MX35_PAD_LD16__IPU_DISPB_DAT_16,
MX35_PAD_LD17__IPU_DISPB_DAT_17,
MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC,
MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK,
MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY,
MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC,
/* Backlight */
MX35_PAD_CONTRAST__IPU_DISPB_CONTR,
/* LCD_PWR */
MX35_PAD_D3_CLS__GPIO1_4,
/* LED */
MX35_PAD_LD23__GPIO3_29,
/* SWITCH */
MX35_PAD_LD19__GPIO3_25,
/* UART2 */
MX35_PAD_CTS2__UART2_CTS,
MX35_PAD_RTS2__UART2_RTS,
MX35_PAD_TXD2__UART2_TXD_MUX,
MX35_PAD_RXD2__UART2_RXD_MUX,
/* I2S */
MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS,
MX35_PAD_STXD4__AUDMUX_AUD4_TXD,
MX35_PAD_SRXD4__AUDMUX_AUD4_RXD,
MX35_PAD_SCK4__AUDMUX_AUD4_TXC,
};
#define GPIO_LED1 (2 * 32 + 29)
#define GPIO_SWITCH1 (2 * 32 + 25)
#define GPIO_LCDPWR (4)
static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd,
unsigned int power)
{
if (power)
gpio_direction_output(GPIO_LCDPWR, 1);
else
gpio_direction_output(GPIO_LCDPWR, 0);
}
static struct plat_lcd_data eukrea_mbimxsd_lcd_power_data = {
.set_power = eukrea_mbimxsd_lcd_power_set,
};
static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
.name = "platform-lcd",
.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
};
static struct gpio_led eukrea_mbimxsd_leds[] = {
{
.name = "led1",
.default_trigger = "heartbeat",
.active_low = 1,
.gpio = GPIO_LED1,
},
};
static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
.leds = eukrea_mbimxsd_leds,
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
};
static struct platform_device eukrea_mbimxsd_leds_gpio = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &eukrea_mbimxsd_led_info,
},
};
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
{
.gpio = GPIO_SWITCH1,
.code = BTN_0,
.desc = "BP1",
.active_low = 1,
.wakeup = 1,
},
};
static struct gpio_keys_platform_data eukrea_mbimxsd_button_data = {
.buttons = eukrea_mbimxsd_gpio_buttons,
.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
};
static struct platform_device eukrea_mbimxsd_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &eukrea_mbimxsd_button_data,
}
};
static struct platform_device *platform_devices[] __initdata = {
&eukrea_mbimxsd_leds_gpio,
&eukrea_mbimxsd_button_device,
&eukrea_mbimxsd_lcd_powerdev,
};
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct i2c_board_info eukrea_mbimxsd_i2c_devices[] = {
{
I2C_BOARD_INFO("tlv320aic23", 0x1a),
},
};
struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata = {
.flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE,
};
/*
* system init for baseboard usage. Will be called by cpuimx35 init.
*
* Add platform devices present on this baseboard and init
* them from CPU side as far as required to use them later on
*/
void __init eukrea_mbimxsd_baseboard_init(void)
{
if (mxc_iomux_v3_setup_multiple_pads(eukrea_mbimxsd_pads,
ARRAY_SIZE(eukrea_mbimxsd_pads)))
printk(KERN_ERR "error setting mbimxsd pads !\n");
#if defined(CONFIG_SND_SOC_EUKREA_TLV320)
/* SSI unit master I2S codec connected to SSI_AUD4 */
mxc_audmux_v2_configure_port(0,
MXC_AUDMUX_V2_PTCR_SYN |
MXC_AUDMUX_V2_PTCR_TFSDIR |
MXC_AUDMUX_V2_PTCR_TFSEL(3) |
MXC_AUDMUX_V2_PTCR_TCLKDIR |
MXC_AUDMUX_V2_PTCR_TCSEL(3),
MXC_AUDMUX_V2_PDCR_RXDSEL(3)
);
mxc_audmux_v2_configure_port(3,
MXC_AUDMUX_V2_PTCR_SYN,
MXC_AUDMUX_V2_PDCR_RXDSEL(0)
);
#endif
imx35_add_imx_uart1(&uart_pdata);
mxc_register_device(&mx3_ipu, &mx3_ipu_data);
mxc_register_device(&mx3_fb, &mx3fb_pdata);
mxc_register_device(&imx_ssi_device0, &eukrea_mbimxsd_ssi_pdata);
gpio_request(GPIO_LED1, "LED1");
gpio_direction_output(GPIO_LED1, 1);
gpio_free(GPIO_LED1);
gpio_request(GPIO_SWITCH1, "SWITCH1");
gpio_direction_input(GPIO_SWITCH1);
gpio_free(GPIO_SWITCH1);
gpio_request(GPIO_LCDPWR, "LCDPWR");
gpio_direction_output(GPIO_LCDPWR, 1);
gpio_free(GPIO_SWITCH1);
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
}
arch/arm/mach-mx3/mach-armadillo5x0.c
View file @ d50f58bb
......@@ -48,16 +48,14 @@
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include <mach/board-armadillo5x0.h>
#include <mach/mmc.h>
#include <mach/ipu.h>
#include <mach/mx3fb.h>
#include <mach/mxc_nand.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include "devices-imx31.h"
#include "devices.h"
#include "crm_regs.h"
......@@ -301,7 +299,8 @@ static struct platform_device armadillo5x0_button_device = {
/*
* NAND Flash
*/
static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = {
static const struct mxc_nand_platform_data
armadillo5x0_nand_board_info __initconst = {
.width = 1,
.hw_ecc = 1,
};
......@@ -493,13 +492,12 @@ static struct platform_device armadillo5x0_smc911x_device = {
};
/* UART device data */
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static struct platform_device *devices[] __initdata = {
&armadillo5x0_smc911x_device,
&mxc_i2c_device1,
&armadillo5x0_button_device,
};
......@@ -512,10 +510,11 @@ static void __init armadillo5x0_init(void)
ARRAY_SIZE(armadillo5x0_pins), "armadillo5x0");
platform_add_devices(devices, ARRAY_SIZE(devices));
imx31_add_imx_i2c1(NULL);
/* Register UART */
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_uart_device1, &uart_pdata);
imx31_add_imx_uart0(&uart_pdata);
imx31_add_imx_uart1(&uart_pdata);
/* SMSC9118 IRQ pin */
gpio_direction_input(MX31_PIN_GPIO1_0);
......@@ -532,7 +531,7 @@ static void __init armadillo5x0_init(void)
&armadillo5x0_nor_flash_pdata);
/* Register NAND Flash */
mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata);
imx31_add_mxc_nand(&armadillo5x0_nand_board_info);
/* set NAND page size to 2k if not configured via boot mode pins */
__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
......
arch/arm/mach-mx3/mach-cpuimx35.c 0 → 100644
View file @ d50f58bb
This diff is collapsed.
arch/arm/mach-mx3/mach-kzm_arm11_01.c
View file @ d50f58bb
......@@ -16,10 +16,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/gpio.h>
......@@ -37,13 +33,12 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/board-kzmarm11.h>
#include <mach/clock.h>
#include <mach/common.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include <mach/memory.h>
#include "devices-imx31.h"
#include "devices.h"
#define KZM_ARM11_IO_ADDRESS(x) ( \
......@@ -51,6 +46,23 @@
IMX_IO_ADDRESS(x, MX31_CS5) ?: \
MX31_IO_ADDRESS(x))
/*
* KZM-ARM11-01 Board Control Registers on FPGA
*/
#define KZM_ARM11_CTL1 (MX31_CS4_BASE_ADDR + 0x1000)
#define KZM_ARM11_CTL2 (MX31_CS4_BASE_ADDR + 0x1001)
#define KZM_ARM11_RSW1 (MX31_CS4_BASE_ADDR + 0x1002)
#define KZM_ARM11_BACK_LIGHT (MX31_CS4_BASE_ADDR + 0x1004)
#define KZM_ARM11_FPGA_REV (MX31_CS4_BASE_ADDR + 0x1008)
#define KZM_ARM11_7SEG_LED (MX31_CS4_BASE_ADDR + 0x1010)
#define KZM_ARM11_LEDS (MX31_CS4_BASE_ADDR + 0x1020)
#define KZM_ARM11_DIPSW2 (MX31_CS4_BASE_ADDR + 0x1003)
/*
* External UART for touch panel on FPGA
*/
#define KZM_ARM11_16550 (MX31_CS4_BASE_ADDR + 0x1050)
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
/*
* KZM-ARM11-01 has an external UART on FPGA
......@@ -173,15 +185,14 @@ static inline int kzm_init_smsc9118(void)
#endif
#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
static void __init kzm_init_imx_uart(void)
{
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_uart_device1, &uart_pdata);
imx31_add_imx_uart0(&uart_pdata);
imx31_add_imx_uart1(&uart_pdata);
}
#else
static inline void kzm_init_imx_uart(void)
......
arch/arm/mach-mx3/mach-mx31_3ds.c
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arch/arm/mach-mx3/mach-mx31ads.c
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......@@ -12,10 +12,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/types.h>
......@@ -33,8 +29,6 @@
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/board-mx31ads.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1
......@@ -43,14 +37,45 @@
#include <linux/mfd/wm8350/pmic.h>
#endif
#include "devices-imx31.h"
#include "devices.h"
/*!
* @file mx31ads.c
*
* @brief This file contains the board-specific initialization routines.
*
* @ingroup System
/* Base address of PBC controller */
#define PBC_BASE_ADDRESS MX31_CS4_BASE_ADDR_VIRT
/* Offsets for the PBC Controller register */
/* PBC Board interrupt status register */
#define PBC_INTSTATUS 0x000016
/* PBC Board interrupt current status register */
#define PBC_INTCURR_STATUS 0x000018
/* PBC Interrupt mask register set address */
#define PBC_INTMASK_SET 0x00001A
/* PBC Interrupt mask register clear address */
#define PBC_INTMASK_CLEAR 0x00001C
/* External UART A */
#define PBC_SC16C652_UARTA 0x010000
/* External UART B */
#define PBC_SC16C652_UARTB 0x010010
#define PBC_INTSTATUS_REG (PBC_INTSTATUS + PBC_BASE_ADDRESS)
#define PBC_INTMASK_SET_REG (PBC_INTMASK_SET + PBC_BASE_ADDRESS)
#define PBC_INTMASK_CLEAR_REG (PBC_INTMASK_CLEAR + PBC_BASE_ADDRESS)
#define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_4)
#define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START)
#define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE)
#define EXPIO_INT_XUART_INTA (MXC_EXP_IO_BASE + 10)
#define EXPIO_INT_XUART_INTB (MXC_EXP_IO_BASE + 11)
#define MXC_MAX_EXP_IO_LINES 16
/*
* This file contains the board-specific initialization routines.
*/
#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
......@@ -98,7 +123,7 @@ static inline int mxc_init_extuart(void)
#endif
#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
static struct imxuart_platform_data uart_pdata = {
static const struct imxuart_platform_data uart_pdata __initconst = {
.flags = IMXUART_HAVE_RTSCTS,
};
......@@ -112,7 +137,7 @@ static unsigned int uart_pins[] = {
static inline void mxc_init_imx_uart(void)
{
mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0");
mxc_register_device(&mxc_uart_device0, &uart_pdata);
imx31_add_imx_uart0(&uart_pdata);
}
#else /* !SERIAL_IMX */
static inline void mxc_init_imx_uart(void)
......@@ -475,7 +500,7 @@ static void mxc_init_i2c(void)
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1));
mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1));
mxc_register_device(&mxc_i2c_device1, NULL);
imx31_add_imx_i2c1(NULL);
}
#else
static void mxc_init_i2c(void)
......
arch/arm/mach-mx3/mach-mx31lilly.c
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......@@ -10,10 +10,6 @@
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/delay.h>
......
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