Commit d9022091 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'mtk-dts64-for-v6.9' of...

Merge tag 'mtk-dts64-for-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek ARM64 DeviceTree updates for v6.9

This adds support for the following new machines:
 - MT7981B: Xiaomi AX3000T
 - MT7986A: Acelink EW-7886CAX
 - MT7988A: BananaPi BPI-R4
 - MT8186 Chromebooks: Tentacruel, Tentacool, Steelix, Rusty, Magneton
 - MT8395/MT8195: Radxa NIO 12L

Also adds more support for the MediaTek MT8186 SoC's Video and JPEG
encoders and for MT7988 clocks, enables wakeup support for the CrOS
EC on SPI in all MediaTek Chromebooks, performs some cleanups and
includes some spare fixes.

* tag 'mtk-dts64-for-v6.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (51 commits)
  arm64: dts: mt8195-cherry-tomato: change watchdog reset boot flow
  arm64: dts: mt7986: add port@5 as CPU port
  arm64: dts: mt7622: add port@5 as CPU port
  arm64: dts: mediatek: Replace deprecated extcon-usb-gpio id-gpio/vbus-gpio properties
  arm64: dts: mediatek: replace underscores in node names
  arm64: dts: mediatek: mt8186: Add missing xhci clock to usb controllers
  arm64: dts: mediatek: mt8186: Add missing clocks to ssusb power domains
  arm64: dts: mediatek: mt7622: add missing "device_type" to memory nodes
  arm64: dts: mediatek: mt7986: reorder nodes
  arm64: dts: mediatek: mt7986: reorder properties
  arm64: dts: mediatek: Add Acelink EW-7886CAX
  dt-bindings: arm64: dts: mediatek: Add Acelink EW-7886CAX access point
  dt-bindings: vendor-prefixes: add acelink
  arm64: dts: mediatek: Introduce the MT8395 Radxa NIO 12L board
  dt-bindings: arm64: mediatek: Add MT8395 Radxa NIO 12L board compatible
  arm64: dts: mediatek: mt8186: Add video decoder device nodes
  arm64: dts: mediatek: mt8195: Add MTU3 nodes and correctly describe USB
  arm64: dts: mediatek: Add MT8186 Magneton Chromebooks
  arm64: dts: mediatek: Add MT8186 Steelix platform based Rusty
  arm64: dts: mediatek: Introduce MT8186 Steelix
  ...

Link: https://lore.kernel.org/r/20240219131230.157792-1-angelogioacchino.delregno@collabora.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 60dfd940 ef569d5d
......@@ -17,6 +17,7 @@ properties:
const: '/'
compatible:
oneOf:
# Sort by SoC (last) compatible, then board compatible
- items:
- enum:
- mediatek,mt2701-evb
......@@ -84,6 +85,11 @@ properties:
- const: mediatek,mt7629
- items:
- enum:
- xiaomi,ax3000t
- const: mediatek,mt7981b
- items:
- enum:
- acelink,ew-7886cax
- bananapi,bpi-r3
- mediatek,mt7986a-rfb
- const: mediatek,mt7986a
......@@ -91,6 +97,10 @@ properties:
- enum:
- mediatek,mt7986b-rfb
- const: mediatek,mt7986b
- items:
- enum:
- bananapi,bpi-r4
- const: mediatek,mt7988a
- items:
- enum:
- mediatek,mt8127-moose
......@@ -129,75 +139,10 @@ properties:
- enum:
- mediatek,mt8173-evb
- const: mediatek,mt8173
- items:
- enum:
- mediatek,mt8183-evb
- const: mediatek,mt8183
- description: Google Hayato rev5
items:
- const: google,hayato-rev5-sku2
- const: google,hayato-sku2
- const: google,hayato
- const: mediatek,mt8192
- description: Google Hayato
items:
- const: google,hayato-rev1
- const: google,hayato
- const: mediatek,mt8192
- description: Google Spherion rev4 (Acer Chromebook 514)
items:
- const: google,spherion-rev4
- const: google,spherion
- const: mediatek,mt8192
- description: Google Spherion (Acer Chromebook 514)
items:
- const: google,spherion-rev3
- const: google,spherion-rev2
- const: google,spherion-rev1
- const: google,spherion-rev0
- const: google,spherion
- const: mediatek,mt8192
- description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H)
items:
- enum:
- google,tomato-rev2
- google,tomato-rev1
- const: google,tomato
- const: mediatek,mt8195
- description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H)
items:
- const: google,tomato-rev4
- const: google,tomato-rev3
- const: google,tomato
- const: mediatek,mt8195
- items:
- enum:
- mediatek,mt8186-evb
- const: mediatek,mt8186
- items:
- enum:
- mediatek,mt8188-evb
- const: mediatek,mt8188
- items:
- enum:
- mediatek,mt8192-evb
- const: mediatek,mt8192
- items:
- enum:
- mediatek,mt8195-demo
- mediatek,mt8195-evb
- const: mediatek,mt8195
- description: Google Burnet (HP Chromebook x360 11MK G3 EE)
items:
- const: google,burnet
- const: mediatek,mt8183
- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
items:
- enum:
- google,krane-sku0
- google,krane-sku176
- const: google,krane
- const: mediatek,mt8183
- description: Google Cozmo (Acer Chromebook 314)
items:
- const: google,cozmo
......@@ -255,6 +200,13 @@ properties:
- google,kodama-sku32
- const: google,kodama
- const: mediatek,mt8183
- description: Google Krane (Lenovo IdeaPad Duet, 10e,...)
items:
- enum:
- google,krane-sku0
- google,krane-sku176
- const: google,krane
- const: mediatek,mt8183
- description: Google Makomo (Lenovo 100e Chromebook 2nd Gen MTK 2)
items:
- enum:
......@@ -276,10 +228,125 @@ properties:
- google,willow-sku1
- const: google,willow
- const: mediatek,mt8183
- items:
- enum:
- mediatek,mt8183-evb
- const: mediatek,mt8183
- items:
- enum:
- mediatek,mt8183-pumpkin
- const: mediatek,mt8183
- description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868))
items:
- const: google,steelix-sku393219
- const: google,steelix-sku393216
- const: google,steelix
- const: mediatek,mt8186
- description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868))
items:
- const: google,steelix-sku393220
- const: google,steelix-sku393217
- const: google,steelix
- const: mediatek,mt8186
- description: Google Magneton (Lenovo IdeaPad Slim 3 Chromebook (14M868))
items:
- const: google,steelix-sku393221
- const: google,steelix-sku393218
- const: google,steelix
- const: mediatek,mt8186
- description: Google Rusty (Lenovo 100e Chromebook Gen 4)
items:
- const: google,steelix-sku196609
- const: google,steelix-sku196608
- const: google,steelix
- const: mediatek,mt8186
- description: Google Steelix (Lenovo 300e Yoga Chromebook Gen 4)
items:
- enum:
- google,steelix-sku131072
- google,steelix-sku131073
- const: google,steelix
- const: mediatek,mt8186
- description: Google Tentacruel (ASUS Chromebook CM14 Flip CM1402F)
items:
- const: google,tentacruel-sku262147
- const: google,tentacruel-sku262146
- const: google,tentacruel-sku262145
- const: google,tentacruel-sku262144
- const: google,tentacruel
- const: mediatek,mt8186
- description: Google Tentacruel (ASUS Chromebook CM14 Flip CM1402F)
items:
- const: google,tentacruel-sku262151
- const: google,tentacruel-sku262150
- const: google,tentacruel-sku262149
- const: google,tentacruel-sku262148
- const: google,tentacruel
- const: mediatek,mt8186
- description: Google Tentacool (ASUS Chromebook CM14 CM1402C)
items:
- const: google,tentacruel-sku327681
- const: google,tentacruel
- const: mediatek,mt8186
- description: Google Tentacool (ASUS Chromebook CM14 CM1402C)
items:
- const: google,tentacruel-sku327683
- const: google,tentacruel
- const: mediatek,mt8186
- items:
- enum:
- mediatek,mt8186-evb
- const: mediatek,mt8186
- items:
- enum:
- mediatek,mt8188-evb
- const: mediatek,mt8188
- description: Google Hayato
items:
- const: google,hayato-rev1
- const: google,hayato
- const: mediatek,mt8192
- description: Google Hayato rev5
items:
- const: google,hayato-rev5-sku2
- const: google,hayato-sku2
- const: google,hayato
- const: mediatek,mt8192
- description: Google Spherion (Acer Chromebook 514)
items:
- const: google,spherion-rev3
- const: google,spherion-rev2
- const: google,spherion-rev1
- const: google,spherion-rev0
- const: google,spherion
- const: mediatek,mt8192
- description: Google Spherion rev4 (Acer Chromebook 514)
items:
- const: google,spherion-rev4
- const: google,spherion
- const: mediatek,mt8192
- items:
- enum:
- mediatek,mt8192-evb
- const: mediatek,mt8192
- description: Acer Tomato (Acer Chromebook Spin 513 CP513-2H)
items:
- enum:
- google,tomato-rev2
- google,tomato-rev1
- const: google,tomato
- const: mediatek,mt8195
- description: Acer Tomato rev3 - 4 (Acer Chromebook Spin 513 CP513-2H)
items:
- const: google,tomato-rev4
- const: google,tomato-rev3
- const: google,tomato
- const: mediatek,mt8195
- items:
- enum:
- mediatek,mt8195-demo
- mediatek,mt8195-evb
- const: mediatek,mt8195
- items:
- enum:
- mediatek,mt8365-evk
......@@ -287,6 +354,7 @@ properties:
- items:
- enum:
- mediatek,mt8395-evk
- radxa,nio-12l
- const: mediatek,mt8395
- const: mediatek,mt8195
- items:
......
......@@ -16,14 +16,18 @@ description: |+
properties:
compatible:
enum:
- mediatek,mt8173-vcodec-enc-vp8
- mediatek,mt8173-vcodec-enc
- mediatek,mt8183-vcodec-enc
- mediatek,mt8188-vcodec-enc
- mediatek,mt8192-vcodec-enc
- mediatek,mt8195-vcodec-enc
oneOf:
- items:
- enum:
- mediatek,mt8173-vcodec-enc-vp8
- mediatek,mt8173-vcodec-enc
- mediatek,mt8183-vcodec-enc
- mediatek,mt8188-vcodec-enc
- mediatek,mt8192-vcodec-enc
- mediatek,mt8195-vcodec-enc
- items:
- const: mediatek,mt8186-vcodec-enc
- const: mediatek,mt8183-vcodec-enc
reg:
maxItems: 1
......@@ -109,10 +113,7 @@ allOf:
properties:
compatible:
enum:
- mediatek,mt8173-vcodec-enc
- mediatek,mt8188-vcodec-enc
- mediatek,mt8192-vcodec-enc
- mediatek,mt8195-vcodec-enc
- mediatek,mt8173-vcodec-enc-vp8
then:
properties:
......@@ -122,8 +123,8 @@ allOf:
maxItems: 1
clock-names:
items:
- const: venc_sel
else: # for vp8 hw encoder
- const: venc_lt_sel
else:
properties:
clock:
items:
......@@ -131,7 +132,7 @@ allOf:
maxItems: 1
clock-names:
items:
- const: venc_lt_sel
- const: venc_sel
additionalProperties: false
......
......@@ -38,7 +38,8 @@ properties:
maxItems: 1
iommus:
maxItems: 2
minItems: 2
maxItems: 4
description: |
Points to the respective IOMMU block with master port as argument, see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
......
......@@ -39,6 +39,8 @@ patternProperties:
description: ShenZhen Asia Better Technology Ltd.
"^acbel,.*":
description: Acbel Polytech Inc.
"^acelink,.*":
description: Acelink Technology Co., Ltd.
"^acer,.*":
description: Acer Inc.
"^acme,.*":
......
......@@ -8,6 +8,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt6797-x20-dev.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-rfb1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7622-bananapi-bpi-r64.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7981b-xiaomi-ax3000t.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-acelink-ew-7886cax.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-emmc.dtbo
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nand.dtbo
......@@ -15,6 +17,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-nor.dtbo
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-bananapi-bpi-r3-sd.dtbo
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986a-rfb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7986b-rfb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt7988a-bananapi-bpi-r4.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8167-pumpkin.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana.dtb
......@@ -49,6 +52,16 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-pumpkin.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393216.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393217.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-magneton-sku393218.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-rusty-sku196608.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-steelix-sku131072.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-steelix-sku131073.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacool-sku327681.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacool-sku327683.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacruel-sku262144.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-corsola-tentacruel-sku262148.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8186-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8188-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-asurada-hayato-r1.dtb
......@@ -63,4 +76,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-demo.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8195-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8365-evk.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-genio-1200-evk.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8395-radxa-nio-12l.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8516-pumpkin.dtb
......@@ -43,12 +43,12 @@ cpus_fixed_vproc1: regulator-vproc-buck1 {
extcon_usb: extcon_iddig {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>;
id-gpios = <&pio 12 GPIO_ACTIVE_HIGH>;
};
extcon_usb1: extcon_iddig1 {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>;
id-gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
};
usb_p0_vbus: regulator-usb-p0-vbus {
......
......@@ -261,7 +261,7 @@ pericfg: syscon@10003000 {
#clock-cells = <1>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
syscfg_pctl_a: syscon@10005000 {
compatible = "mediatek,mt2712-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
......
......@@ -117,7 +117,7 @@ topckgen: topckgen@10000000 {
#clock-cells = <1>;
};
infrasys: infracfg_ao@10001000 {
infrasys: syscon@10001000 {
compatible = "mediatek,mt6797-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
......@@ -452,19 +452,19 @@ mmsys: syscon@14000000 {
#clock-cells = <1>;
};
imgsys: imgsys_config@15000000 {
imgsys: syscon@15000000 {
compatible = "mediatek,mt6797-imgsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
};
vdecsys: vdec_gcon@16000000 {
vdecsys: syscon@16000000 {
compatible = "mediatek,mt6797-vdecsys", "syscon";
reg = <0 0x16000000 0 0x10000>;
#clock-cells = <1>;
};
vencsys: venc_gcon@17000000 {
vencsys: syscon@17000000 {
compatible = "mediatek,mt6797-vencsys", "syscon";
reg = <0 0x17000000 0 0x1000>;
#clock-cells = <1>;
......
......@@ -75,6 +75,7 @@ led-1 {
memory@40000000 {
reg = <0 0x40000000 0 0x40000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
......@@ -185,6 +186,18 @@ port@4 {
label = "lan3";
};
port@5 {
reg = <5>;
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
......
......@@ -57,6 +57,7 @@ key-wps {
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
reg_1p8v: regulator-1p8v {
......@@ -117,6 +118,18 @@ fixed-link {
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -155,6 +168,18 @@ port@4 {
label = "wan";
};
port@5 {
reg = <5>;
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
......
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include "mt7981b.dtsi"
/ {
compatible = "xiaomi,ax3000t", "mediatek,mt7981b";
model = "Xiaomi AX3000T";
memory@40000000 {
reg = <0 0x40000000 0 0x10000000>;
device_type = "memory";
};
};
// SPDX-License-Identifier: GPL-2.0-only OR MIT
#include <dt-bindings/clock/mediatek,mt7981-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "mediatek,mt7981b";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a53";
reg = <0x0>;
device_type = "cpu";
enable-method = "psci";
};
cpu@1 {
compatible = "arm,cortex-a53";
reg = <0x1>;
device_type = "cpu";
enable-method = "psci";
};
};
oscillator-40m {
compatible = "fixed-clock";
clock-frequency = <40000000>;
clock-output-names = "clkxtal";
#clock-cells = <0>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc {
compatible = "simple-bus";
ranges;
#address-cells = <2>;
#size-cells = <2>;
gic: interrupt-controller@c000000 {
compatible = "arm,gic-v3";
reg = <0 0x0c000000 0 0x40000>, /* GICD */
<0 0x0c080000 0 0x200000>; /* GICR */
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
};
infracfg: clock-controller@10001000 {
compatible = "mediatek,mt7981-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1001b000 {
compatible = "mediatek,mt7981-topckgen", "syscon";
reg = <0 0x1001b000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1001e000 {
compatible = "mediatek,mt7981-apmixedsys";
reg = <0 0x1001e000 0 0x1000>;
#clock-cells = <1>;
};
pwm@10048000 {
compatible = "mediatek,mt7981-pwm";
reg = <0 0x10048000 0 0x1000>;
clocks = <&infracfg CLK_INFRA_PWM_STA>,
<&infracfg CLK_INFRA_PWM_HCK>,
<&infracfg CLK_INFRA_PWM1_CK>,
<&infracfg CLK_INFRA_PWM2_CK>,
<&infracfg CLK_INFRA_PWM3_CK>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3";
#pwm-cells = <2>;
};
clock-controller@15000000 {
compatible = "mediatek,mt7981-ethsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
/ {
compatible = "acelink,ew-7886cax", "mediatek,mt7986a";
model = "Acelink EW-7886CAX";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@40000000 {
reg = <0 0x40000000 0 0x20000000>;
device_type = "memory";
};
keys {
compatible = "gpio-keys";
key-restart {
label = "Reset";
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&pio 18 GPIO_ACTIVE_HIGH>;
};
led-1 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
};
led-2 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_BLUE>;
gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
};
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
nvmem-cells = <&macaddr>;
nvmem-cell-names = "mac-address";
};
mdio-bus {
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-delay-us = <50000>;
reset-post-delay-us = <20000>;
#address-cells = <1>;
#size-cells = <0>;
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
};
};
};
&pcie_phy {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <52000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x100000>;
label = "bootloader";
read-only;
};
partition@100000 {
reg = <0x100000 0x80000>;
label = "u-boot-env";
};
partition@180000 {
compatible = "nvmem-cells";
reg = <0x180000 0x200000>;
label = "factory";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr: macaddr@4 {
reg = <0x4 0x6>;
};
};
};
partition@380000 {
reg = <0x380000 0x200000>;
label = "fip";
};
partition@580000 {
reg = <0x580000 0x4000000>;
label = "ubi";
};
};
};
};
&trng {
status = "okay";
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
nvmem-cells = <&eeprom>;
nvmem-cell-names = "eeprom";
status = "okay";
};
......@@ -15,7 +15,7 @@ fragment@0 {
__overlay__ {
#address-cells = <1>;
#size-cells = <0>;
spi_nand: spi_nand@0 {
spi_nand: flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <10000000>;
......
......@@ -43,7 +43,7 @@ fan: pwm-fan {
#cooling-cells = <2>;
/* cooling level (0, 1, 2) - pwm inverted */
cooling-levels = <255 96 0>;
pwms = <&pwm 0 10000 0>;
pwms = <&pwm 0 10000>;
status = "okay";
};
......
......@@ -65,6 +65,18 @@ fixed-link {
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -237,12 +249,13 @@ &spi0 {
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
status = "okay";
spi_nand: spi_nand@0 {
spi_nand: flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <10000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
......@@ -287,6 +300,18 @@ port@4 {
label = "lan4";
};
port@5 {
reg = <5>;
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
......
This diff is collapsed.
......@@ -45,6 +45,18 @@ fixed-link {
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
......@@ -83,6 +95,18 @@ port@4 {
label = "lan4";
};
port@5 {
reg = <5>;
ethernet = <&gmac1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
port@6 {
reg = <6>;
label = "cpu";
......@@ -152,12 +176,13 @@ &spi0 {
pinctrl-0 = <&spi_flash_pins>;
cs-gpios = <0>, <0>;
status = "okay";
spi_nand: spi_nand@0 {
spi_nand: flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <10000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
};
};
......
// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include "mt7988a.dtsi"
/ {
compatible = "bananapi,bpi-r4", "mediatek,mt7988a";
model = "Banana Pi BPI-R4";
chassis-type = "embedded";
};
// SPDX-License-Identifier: GPL-2.0-only OR MIT
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
compatible = "mediatek,mt7988a";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a73";
reg = <0x0>;
device_type = "cpu";
enable-method = "psci";
};
cpu@1 {
compatible = "arm,cortex-a73";
reg = <0x1>;
device_type = "cpu";
enable-method = "psci";
};
cpu@2 {
compatible = "arm,cortex-a73";
reg = <0x2>;
device_type = "cpu";
enable-method = "psci";
};
cpu@3 {
compatible = "arm,cortex-a73";
reg = <0x3>;
device_type = "cpu";
enable-method = "psci";
};
};
oscillator-40m {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
};
pmu {
compatible = "arm,cortex-a73-pmu";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
soc {
compatible = "simple-bus";
ranges;
#address-cells = <2>;
#size-cells = <2>;
gic: interrupt-controller@c000000 {
compatible = "arm,gic-v3";
reg = <0 0x0c000000 0 0x40000>, /* GICD */
<0 0x0c080000 0 0x200000>, /* GICR */
<0 0x0c400000 0 0x2000>, /* GICC */
<0 0x0c410000 0 0x1000>, /* GICH */
<0 0x0c420000 0 0x2000>; /* GICV */
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <3>;
};
clock-controller@10001000 {
compatible = "mediatek,mt7988-infracfg", "syscon";
reg = <0 0x10001000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@1001b000 {
compatible = "mediatek,mt7988-topckgen", "syscon";
reg = <0 0x1001b000 0 0x1000>;
#clock-cells = <1>;
};
watchdog: watchdog@1001c000 {
compatible = "mediatek,mt7988-wdt";
reg = <0 0x1001c000 0 0x1000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
clock-controller@1001e000 {
compatible = "mediatek,mt7988-apmixedsys";
reg = <0 0x1001e000 0 0x1000>;
#clock-cells = <1>;
};
clock-controller@11f40000 {
compatible = "mediatek,mt7988-xfi-pll";
reg = <0 0x11f40000 0 0x1000>;
resets = <&watchdog 16>;
#clock-cells = <1>;
};
clock-controller@15000000 {
compatible = "mediatek,mt7988-ethsys", "syscon";
reg = <0 0x15000000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
clock-controller@15031000 {
compatible = "mediatek,mt7988-ethwarp";
reg = <0 0x15031000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};
......@@ -14,7 +14,7 @@ / {
&cpu_thermal {
trips {
cpu_crit: cpu_crit0 {
cpu_crit: cpu-crit0 {
temperature = <100000>;
type = "critical";
};
......
......@@ -1135,7 +1135,7 @@ rtc: mt6397rtc {
compatible = "mediatek,mt6397-rtc";
};
syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
syscfg_pctl_pmic: syscon@c000 {
compatible = "mediatek,mt6397-pctl-pmic-syscfg",
"syscon";
reg = <0 0x0000c000 0 0x0108>;
......@@ -1155,6 +1155,7 @@ cros_ec: ec@0 {
spi-max-frequency = <12000000>;
interrupts-extended = <&pio 0 IRQ_TYPE_LEVEL_LOW>;
google,cros-ec-spi-msg-delay = <500>;
wakeup-source;
i2c_tunnel: i2c-tunnel0 {
compatible = "google,cros-ec-i2c-tunnel";
......
......@@ -41,7 +41,7 @@ hdmi_connector_in: endpoint {
extcon_usb: extcon_iddig {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
};
usb_p1_vbus: regulator-usb-p1 {
......
......@@ -222,14 +222,14 @@ CPU_SLEEP_0: cpu-sleep-0 {
};
};
pmu_a53 {
pmu-a53 {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 9 IRQ_TYPE_LEVEL_LOW>;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
pmu_a72 {
pmu-a72 {
compatible = "arm,cortex-a72-pmu";
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 13 IRQ_TYPE_LEVEL_LOW>;
......@@ -286,7 +286,7 @@ target: trip-point1 {
type = "passive";
};
cpu_crit: cpu_crit0 {
cpu_crit: cpu-crit0 {
temperature = <115000>;
hysteresis = <2000>;
type = "critical";
......@@ -318,7 +318,7 @@ reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
vpu_dma_reserved: vpu_dma_mem_region@b7000000 {
vpu_dma_reserved: vpu-dma-mem@b7000000 {
compatible = "shared-dma-pool";
reg = <0 0xb7000000 0 0x500000>;
alignment = <0x1000>;
......@@ -366,7 +366,7 @@ pericfg: power-controller@10003000 {
#reset-cells = <1>;
};
syscfg_pctl_a: syscfg_pctl_a@10005000 {
syscfg_pctl_a: syscon@10005000 {
compatible = "mediatek,mt8173-pctl-a-syscfg", "syscon";
reg = <0 0x10005000 0 0x1000>;
};
......@@ -590,6 +590,15 @@ efuse: efuse@10206000 {
reg = <0 0x10206000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
socinfo-data1@40 {
reg = <0x040 0x4>;
};
socinfo-data2@44 {
reg = <0x044 0x4>;
};
thermal_calibration: calib@528 {
reg = <0x528 0xc>;
};
......
......@@ -360,6 +360,10 @@ pen_eject {
};
&cros_ec {
cbas {
compatible = "google,cros-cbas";
};
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
......
......@@ -339,6 +339,10 @@ touch_pin_reset: pin_reset {
};
&cros_ec {
cbas {
compatible = "google,cros-cbas";
};
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
......
......@@ -343,6 +343,10 @@ rst_pin {
};
&cros_ec {
cbas {
compatible = "google,cros-cbas";
};
keyboard-controller {
compatible = "google,cros-ec-keyb-switches";
};
......
......@@ -924,6 +924,7 @@ cros_ec: cros-ec@0 {
interrupts-extended = <&pio 151 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ec_ap_int_odl>;
wakeup-source;
i2c_tunnel: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
......@@ -937,10 +938,6 @@ usbc_extcon: extcon0 {
google,usb-port-id = <0>;
};
cbas {
compatible = "google,cros-cbas";
};
typec {
compatible = "google,cros-ec-typec";
#address-cells = <1>;
......
......@@ -33,7 +33,7 @@ reserved-memory {
#size-cells = <2>;
ranges;
scp_mem_reserved: scp_mem_region@50000000 {
scp_mem_reserved: scp-mem@50000000 {
compatible = "shared-dma-pool";
reg = <0 0x50000000 0 0x2900000>;
no-map;
......
......@@ -1585,6 +1585,15 @@ efuse: efuse@11f10000 {
reg = <0 0x11f10000 0 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
socinfo-data1@4c {
reg = <0x04c 0x4>;
};
socinfo-data2@60 {
reg = <0x060 0x4>;
};
thermal_calibration: calib@180 {
reg = <0x180 0xc>;
};
......@@ -1955,7 +1964,7 @@ larb4: larb@17010000 {
power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
};
venc_jpg: venc_jpg@17030000 {
venc_jpg: jpeg-encoder@17030000 {
compatible = "mediatek,mt8183-jpgenc", "mediatek,mtk-jpgenc";
reg = <0 0x17030000 0 0x1000>;
interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_LOW>;
......
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
i2c4 = &i2c4;
};
};
&dsi_out {
remote-endpoint = <&ps8640_in>;
};
&i2c0 {
clock-frequency = <400000>;
edp-bridge@8 {
compatible = "parade,ps8640";
reg = <0x8>;
pinctrl-names = "default";
pinctrl-0 = <&ps8640_pins>;
powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>;
reset-gpios = <&pio 98 GPIO_ACTIVE_LOW>;
vdd12-supply = <&mt6366_vrf12_reg>;
vdd33-supply = <&mt6366_vcn33_reg>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
ps8640_in: endpoint {
remote-endpoint = <&dsi_out>;
};
};
port@1 {
reg = <1>;
ps8640_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
aux-bus {
panel {
compatible = "edp-panel";
power-supply = <&pp3300_disp_x>;
backlight = <&backlight_lcd0>;
port {
panel_in: endpoint {
remote-endpoint = <&ps8640_out>;
};
};
};
};
};
};
&i2c1 {
i2c-scl-internal-delay-ns = <10000>;
touchscreen: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
post-power-on-delay-ms = <10>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_s3>;
};
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins>;
clock-frequency = <400000>;
status = "okay";
proximity@28 {
compatible = "semtech,sx9324";
reg = <0x28>;
#io-channel-cells = <1>;
interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sar_sensor_pins>;
vdd-supply = <&mt6366_vio18_reg>;
svdd-supply = <&mt6366_vio18_reg>;
};
};
&pio {
i2c4_pins: i2c4-pins {
pins-bus {
pinmux = <PINMUX_GPIO136__FUNC_SDA4>,
<PINMUX_GPIO135__FUNC_SCL4>;
bias-disable;
drive-strength = <4>;
input-enable;
};
};
ps8640_pins: ps8640-pins {
pins-pwrdn-rst {
pinmux = <PINMUX_GPIO96__FUNC_GPIO96>,
<PINMUX_GPIO98__FUNC_GPIO98>;
output-low;
};
};
sar_sensor_pins: sar-sensor-pins {
pins-irq {
pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
input-enable;
bias-pull-up;
};
};
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Magneton board";
compatible = "google,steelix-sku393219", "google,steelix-sku393216",
"google,steelix", "mediatek,mt8186";
chassis-type = "laptop";
};
&gpio_keys {
status = "disabled";
};
&i2c1 {
touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
vdd-supply = <&pp3300_s3>;
post-power-on-delay-ms = <350>;
hid-descr-addr = <0x0001>;
};
};
&touchscreen {
status = "disabled";
};
&usb_c1 {
status = "disabled";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Magneton board";
compatible = "google,steelix-sku393220", "google,steelix-sku393217",
"google,steelix", "mediatek,mt8186";
chassis-type = "laptop";
};
&gpio_keys {
status = "disabled";
};
&i2c1 {
touchscreen@40 {
compatible = "hid-over-i2c";
reg = <0x40>;
interrupts-extended = <&pio 12 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
vdd-supply = <&pp3300_s3>;
post-power-on-delay-ms = <450>;
hid-descr-addr = <0x0001>;
};
};
&touchscreen {
status = "disabled";
};
&usb_c1 {
status = "disabled";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Magneton board";
compatible = "google,steelix-sku393221", "google,steelix-sku393218",
"google,steelix", "mediatek,mt8186";
chassis-type = "laptop";
};
&gpio_keys {
status = "disabled";
};
&touchscreen {
status = "disabled";
};
&usb_c1 {
status = "disabled";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Rusty board";
compatible = "google,steelix-sku196609", "google,steelix-sku196608",
"google,steelix", "mediatek,mt8186";
chassis-type = "laptop";
};
&gpio_keys {
status = "disabled";
};
&i2c1 {
status = "disabled";
};
&touchscreen {
status = "disabled";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Steelix board";
compatible = "google,steelix-sku131072", "google,steelix",
"mediatek,mt8186";
chassis-type = "convertible";
};
&mt6366codec {
mediatek,dmic-mode = <0>; /* two-wire */
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-steelix.dtsi"
/ {
model = "Google Steelix board";
compatible = "google,steelix-sku131073", "google,steelix",
"mediatek,mt8186";
chassis-type = "convertible";
};
&mt6366codec {
mediatek,dmic-mode = <1>; /* one-wire */
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/{
pp1000_edpbrdg: regulator-pp1000-edpbrdg {
compatible = "regulator-fixed";
regulator-name = "pp1000_edpbrdg";
pinctrl-names = "default";
pinctrl-0 = <&en_pp1000_edpbrdg>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 29 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_z2>;
};
pp1800_edpbrdg_dx: regulator-pp1800-edpbrdg-dx {
compatible = "regulator-fixed";
regulator-name = "pp1800_edpbrdg_dx";
pinctrl-names = "default";
pinctrl-0 = <&en_pp1800_edpbrdg>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
vin-supply = <&mt6366_vio18_reg>;
};
pp3300_edp_dx: regulator-pp3300-edp-dx {
compatible = "regulator-fixed";
regulator-name = "pp3300_edp_dx";
pinctrl-names = "default";
pinctrl-0 = <&en_pp3300_edpbrdg>;
enable-active-high;
regulator-boot-on;
gpio = <&pio 31 GPIO_ACTIVE_HIGH>;
vin-supply = <&pp3300_z2>;
};
};
&dsi_out {
remote-endpoint = <&anx7625_in>;
};
&i2c0 {
clock-frequency = <400000>;
anx_bridge: anx7625@58 {
compatible = "analogix,anx7625";
reg = <0x58>;
pinctrl-names = "default";
pinctrl-0 = <&anx7625_pins>;
enable-gpios = <&pio 96 GPIO_ACTIVE_HIGH>;
reset-gpios = <&pio 98 GPIO_ACTIVE_HIGH>;
vdd10-supply = <&pp1000_edpbrdg>;
vdd18-supply = <&pp1800_edpbrdg_dx>;
vdd33-supply = <&pp3300_edp_dx>;
analogix,lane0-swing = /bits/ 8 <0x70 0x30>;
analogix,lane1-swing = /bits/ 8 <0x70 0x30>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
anx7625_in: endpoint {
remote-endpoint = <&dsi_out>;
data-lanes = <0 1 2 3>;
};
};
port@1 {
reg = <1>;
anx7625_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
aux-bus {
panel: panel {
compatible = "edp-panel";
power-supply = <&pp3300_disp_x>;
backlight = <&backlight_lcd0>;
port {
panel_in: endpoint {
remote-endpoint = <&anx7625_out>;
};
};
};
};
};
};
&i2c1 {
touchscreen: touchscreen@5d {
compatible = "goodix,gt7375p";
reg = <0x5d>;
interrupts-extended = <&pio 12 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&touchscreen_pins>;
reset-gpios = <&pio 60 GPIO_ACTIVE_LOW>;
vdd-supply = <&pp3300_s3>;
goodix,no-reset-during-suspend;
};
};
&i2c2 {
i2c-scl-internal-delay-ns = <22000>;
/* second source component */
trackpad@2c {
compatible = "hid-over-i2c";
reg = <0x2c>;
hid-descr-addr = <0x20>;
interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&pp3300_s3>;
wakeup-source;
};
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x01, 0x04, KEY_MICMUTE)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
&pio {
anx7625_pins: anx7625-pins {
pins-int {
pinmux = <PINMUX_GPIO9__FUNC_GPIO9>;
input-enable;
bias-disable;
};
pins-reset {
pinmux = <PINMUX_GPIO98__FUNC_GPIO98>;
output-low;
};
pins-power-en {
pinmux = <PINMUX_GPIO96__FUNC_GPIO96>;
output-low;
};
};
en_pp1000_edpbrdg: pp1000-edpbrdg-en-pins {
pins-vreg-en {
pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
output-low;
};
};
en_pp1800_edpbrdg: pp1800-edpbrdg-en-pins {
pins-vreg-en {
pinmux = <PINMUX_GPIO30__FUNC_GPIO30>;
output-low;
};
};
en_pp3300_edpbrdg: pp3300-edpbrdg-en-pins {
pins-vreg-en {
pinmux = <PINMUX_GPIO31__FUNC_GPIO31>;
output-low;
};
};
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-krabby.dtsi"
/ {
model = "Google Tentacool board";
compatible = "google,tentacruel-sku327681", "google,tentacruel", "mediatek,mt8186";
chassis-type = "laptop";
};
/* Tentacool omits the pen. */
&gpio_keys {
status = "disabled";
};
/* Tentacool omits the touchscreen; nothing else is on i2c1. */
&i2c1 {
status = "disabled";
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
/* Tentacool omits the touchscreen. */
&touchscreen {
status = "disabled";
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2023 Google LLC
*/
#include "mt8186-corsola-tentacool-sku327681.dts"
/ {
compatible = "google,tentacruel-sku327683", "google,tentacruel", "mediatek,mt8186";
};
/* This variant replaces only the trackpad controller. */
&i2c2 {
/delete-node/ trackpad@15;
trackpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_s3>;
wakeup-source;
};
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2022 Google LLC
*/
/dts-v1/;
#include "mt8186-corsola-krabby.dtsi"
/ {
model = "Google Tentacruel board";
compatible = "google,tentacruel-sku262147", "google,tentacruel-sku262146",
"google,tentacruel-sku262145", "google,tentacruel-sku262144",
"google,tentacruel", "mediatek,mt8186";
chassis-type = "convertible";
};
&keyboard_controller {
function-row-physmap = <
MATRIX_KEY(0x00, 0x02, 0) /* T1 */
MATRIX_KEY(0x03, 0x02, 0) /* T2 */
MATRIX_KEY(0x02, 0x02, 0) /* T3 */
MATRIX_KEY(0x01, 0x02, 0) /* T4 */
MATRIX_KEY(0x03, 0x04, 0) /* T5 */
MATRIX_KEY(0x02, 0x04, 0) /* T6 */
MATRIX_KEY(0x01, 0x04, 0) /* T7 */
MATRIX_KEY(0x02, 0x09, 0) /* T8 */
MATRIX_KEY(0x01, 0x09, 0) /* T9 */
MATRIX_KEY(0x00, 0x04, 0) /* T10 */
>;
linux,keymap = <
MATRIX_KEY(0x00, 0x02, KEY_BACK)
MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
MATRIX_KEY(0x01, 0x02, KEY_SCALE)
MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
MATRIX_KEY(0x02, 0x09, KEY_MUTE)
MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
CROS_STD_MAIN_KEYMAP
>;
};
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2023 Google LLC
*/
#include "mt8186-corsola-tentacruel-sku262144.dts"
/ {
compatible = "google,tentacruel-sku262151", "google,tentacruel-sku262150",
"google,tentacruel-sku262149", "google,tentacruel-sku262148",
"google,tentacruel", "mediatek,mt8186";
};
/* This variant replaces only the trackpad controller. */
&i2c2 {
/delete-node/ trackpad@15;
trackpad@15 {
compatible = "hid-over-i2c";
reg = <0x15>;
interrupts-extended = <&pio 11 IRQ_TYPE_LEVEL_LOW>;
hid-descr-addr = <0x0001>;
vdd-supply = <&pp3300_s3>;
wakeup-source;
};
};
This diff is collapsed.
......@@ -931,11 +931,17 @@ power-domain@MT8186_POWER_DOMAIN_CSIRX_TOP {
power-domain@MT8186_POWER_DOMAIN_SSUSB {
reg = <MT8186_POWER_DOMAIN_SSUSB>;
clocks = <&topckgen CLK_TOP_USB_TOP>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>;
clock-names = "sys_ck", "ref_ck";
#power-domain-cells = <0>;
};
power-domain@MT8186_POWER_DOMAIN_SSUSB_P1 {
reg = <MT8186_POWER_DOMAIN_SSUSB_P1>;
clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>;
clock-names = "sys_ck", "ref_ck";
#power-domain-cells = <0>;
};
......@@ -1061,7 +1067,7 @@ power-domain@MT8186_POWER_DOMAIN_VENC {
reg = <MT8186_POWER_DOMAIN_VENC>;
clocks = <&topckgen CLK_TOP_VENC>,
<&vencsys CLK_VENC_CKE1_VENC>;
clock-names = "venc0", "larb";
clock-names = "venc0", "subsys-larb";
mediatek,infracfg = <&infracfg_ao>;
#power-domain-cells = <0>;
};
......@@ -1530,8 +1536,9 @@ ssusb0: usb@11201000 {
clocks = <&topckgen CLK_TOP_USB_TOP>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_REF>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_HCLK>,
<&infracfg_ao CLK_INFRA_AO_ICUSB>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
<&infracfg_ao CLK_INFRA_AO_ICUSB>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port0 PHY_TYPE_USB2>;
power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB>;
......@@ -1595,8 +1602,9 @@ ssusb1: usb@11281000 {
clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_SYS>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_REF>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_HCLK>,
<&clk26m>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck";
<&clk26m>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_TOP_P1_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
interrupts = <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port1 PHY_TYPE_USB2>, <&u3port1 PHY_TYPE_USB3>;
power-domains = <&spm MT8186_POWER_DOMAIN_SSUSB_P1>;
......@@ -1672,6 +1680,10 @@ gpu_speedbin: gpu-speedbin@59c {
reg = <0x59c 0x4>;
bits = <0 3>;
};
socinfo-data1@7a0 {
reg = <0x7a0 0x4>;
};
};
mipi_tx0: dsi-phy@11cc0000 {
......@@ -1959,6 +1971,43 @@ larb11: smi@1582e000 {
power-domains = <&spm MT8186_POWER_DOMAIN_IMG2>;
};
video_decoder: video-decoder@16000000 {
compatible = "mediatek,mt8186-vcodec-dec";
reg = <0 0x16000000 0 0x1000>;
ranges;
#address-cells = <2>;
#size-cells = <2>;
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
iommus = <&iommu_mm IOMMU_PORT_L4_HW_VDEC_MC_EXT>;
mediatek,scp = <&scp>;
vcodec_core: video-codec@16025000 {
compatible = "mediatek,mtk-vcodec-core";
reg = <0 0x16025000 0 0x1000>;
interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 0>;
iommus = <&iommu_mm IOMMU_PORT_L4_HW_VDEC_MC_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_UFO_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_PP_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_PRED_RD_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_PRED_WR_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_PPWRAP_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_TILE_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_VLD_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_VLD2_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_AVC_MV_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_UFO_ENC_EXT>,
<&iommu_mm IOMMU_PORT_L4_HW_VDEC_RG_CTRL_DMA_EXT>;
clocks = <&topckgen CLK_TOP_VDEC>,
<&vdecsys CLK_VDEC_CKEN>,
<&vdecsys CLK_VDEC_LARB1_CKEN>,
<&topckgen CLK_TOP_UNIVPLL_D3>;
clock-names = "vdec-sel", "vdec-soc-vdec", "vdec", "vdec-top";
assigned-clocks = <&topckgen CLK_TOP_VDEC>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;
power-domains = <&spm MT8186_POWER_DOMAIN_VDEC>;
};
};
larb4: smi@1602e000 {
compatible = "mediatek,mt8186-smi-larb";
reg = <0 0x1602e000 0 0x1000>;
......@@ -1993,6 +2042,40 @@ larb7: smi@17010000 {
power-domains = <&spm MT8186_POWER_DOMAIN_VENC>;
};
venc: video-encoder@17020000 {
compatible = "mediatek,mt8186-vcodec-enc", "mediatek,mt8183-vcodec-enc";
reg = <0 0x17020000 0 0x2000>;
interrupts = <GIC_SPI 243 IRQ_TYPE_LEVEL_HIGH 0>;
iommus = <&iommu_mm IOMMU_PORT_L7_VENC_RCPU>,
<&iommu_mm IOMMU_PORT_L7_VENC_REC>,
<&iommu_mm IOMMU_PORT_L7_VENC_BSDMA>,
<&iommu_mm IOMMU_PORT_L7_VENC_SV_COMV>,
<&iommu_mm IOMMU_PORT_L7_VENC_RD_COMV>,
<&iommu_mm IOMMU_PORT_L7_VENC_CUR_LUMA>,
<&iommu_mm IOMMU_PORT_L7_VENC_CUR_CHROMA>,
<&iommu_mm IOMMU_PORT_L7_VENC_REF_LUMA>,
<&iommu_mm IOMMU_PORT_L7_VENC_REF_CHROMA>;
clocks = <&vencsys CLK_VENC_CKE1_VENC>;
clock-names = "venc_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D3>;
power-domains = <&spm MT8186_POWER_DOMAIN_VENC>;
mediatek,scp = <&scp>;
};
jpgenc: jpeg-encoder@17030000 {
compatible = "mediatek,mt8186-jpgenc", "mediatek,mtk-jpgenc";
reg = <0 0x17030000 0 0x10000>;
interrupts = <GIC_SPI 245 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&vencsys CLK_VENC_CKE2_JPGENC>;
clock-names = "jpgenc";
iommus = <&iommu_mm IOMMU_PORT_L7_JPGENC_Y_RDMA>,
<&iommu_mm IOMMU_PORT_L7_JPGENC_C_RDMA>,
<&iommu_mm IOMMU_PORT_L7_JPGENC_Q_TABLE>,
<&iommu_mm IOMMU_PORT_L7_JPGENC_BSDMA>;
power-domains = <&spm MT8186_POWER_DOMAIN_VENC>;
};
camsys: clock-controller@1a000000 {
compatible = "mediatek,mt8186-camsys";
reg = <0 0x1a000000 0 0x1000>;
......
......@@ -1332,14 +1332,11 @@ cros_ec: ec@0 {
spi-max-frequency = <3000000>;
pinctrl-names = "default";
pinctrl-0 = <&cros_ec_int>;
wakeup-source;
#address-cells = <1>;
#size-cells = <0>;
base_detection: cbas {
compatible = "google,cros-cbas";
};
cros_ec_pwm: pwm {
compatible = "google,cros-ec-pwm";
#pwm-cells = <1>;
......
......@@ -1164,6 +1164,14 @@ efuse: efuse@11c10000 {
#address-cells = <1>;
#size-cells = <1>;
socinfo-data1@44 {
reg = <0x044 0x4>;
};
socinfo-data2@50 {
reg = <0x050 0x4>;
};
lvts_e_data1: data1@1c0 {
reg = <0x1c0 0x58>;
};
......@@ -1814,7 +1822,7 @@ vcodec_enc: vcodec@17020000 {
mediatek,scp = <&scp>;
power-domains = <&spm MT8192_POWER_DOMAIN_VENC>;
clocks = <&vencsys CLK_VENC_SET1_VENC>;
clock-names = "venc-set1";
clock-names = "venc_sel";
assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D4>;
};
......
......@@ -23,3 +23,7 @@ &sound {
&ts_10 {
status = "okay";
};
&watchdog {
/delete-property/ mediatek,disable-extrst;
};
......@@ -43,3 +43,7 @@ &sound {
&ts_10 {
status = "okay";
};
&watchdog {
/delete-property/ mediatek,disable-extrst;
};
......@@ -44,3 +44,7 @@ &sound {
&ts_10 {
status = "okay";
};
&watchdog {
/delete-property/ mediatek,disable-extrst;
};
......@@ -1149,6 +1149,7 @@ cros_ec: ec@0 {
pinctrl-names = "default";
pinctrl-0 = <&cros_ec_int>;
spi-max-frequency = <3000000>;
wakeup-source;
keyboard-backlight {
compatible = "google,cros-kbd-led-backlight";
......@@ -1291,11 +1292,32 @@ &uart0 {
status = "okay";
};
/*
* For the USB Type-C ports the role and alternate modes switching is
* done by the EC so we set dr_mode to host to avoid interfering.
*/
&ssusb0 {
dr_mode = "host";
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb2 {
dr_mode = "host";
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb3 {
dr_mode = "host";
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&xhci0 {
status = "okay";
rx-fifo-depth = <3072>;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
};
......@@ -1309,8 +1331,6 @@ &xhci1 {
&xhci2 {
status = "okay";
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
};
......@@ -1319,7 +1339,6 @@ &xhci3 {
/* MT7921's USB Bluetooth has issues with USB2 LPM */
usb2-lpm-disable;
vusb33-supply = <&mt6359_vusb_ldo_reg>;
vbus-supply = <&usb_vbus>;
};
......
......@@ -529,8 +529,22 @@ &u3phy3 {
status = "okay";
};
&xhci0 {
&ssusb0 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb2 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb3 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&xhci0 {
vbus-supply = <&otg_vbus_regulator>;
status = "okay";
};
......@@ -541,11 +555,9 @@ &xhci1 {
};
&xhci2 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&xhci3 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
......@@ -160,6 +160,18 @@ &uart0 {
status = "okay";
};
&ssusb0 {
status = "okay";
};
&ssusb2 {
status = "okay";
};
&ssusb3 {
status = "okay";
};
&xhci0 {
status = "okay";
};
......
......@@ -1347,29 +1347,40 @@ queue3 {
};
};
xhci0: usb@11200000 {
compatible = "mediatek,mt8195-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x1000>,
<0 0x11203e00 0 0x0100>;
ssusb0: usb@11201000 {
compatible = "mediatek,mt8195-mtu3", "mediatek,mtu3";
reg = <0 0x11201000 0 0x2dff>, <0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port0 PHY_TYPE_USB2>,
<&u3port0 PHY_TYPE_USB3>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP>,
<&topckgen CLK_TOP_SSUSB_XHCI>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
ranges = <0 0 0 0x11200000 0 0x3f00>;
#address-cells = <2>;
#size-cells = <2>;
interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB>,
<&topckgen CLK_TOP_SSUSB_REF>,
<&apmixedsys CLK_APMIXED_USB1PLL>,
<&clk26m>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
"xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 103>;
clock-names = "sys_ck", "ref_ck", "mcu_ck";
phys = <&u2port0 PHY_TYPE_USB2>, <&u3port0 PHY_TYPE_USB3>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg 0x400 103>;
status = "disabled";
xhci0: usb@0 {
compatible = "mediatek,mt8195-xhci", "mediatek,mtk-xhci";
reg = <0 0 0 0x1000>;
reg-names = "mac";
interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP>,
<&topckgen CLK_TOP_SSUSB_XHCI>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&infracfg_ao CLK_INFRA_AO_SSUSB>,
<&topckgen CLK_TOP_SSUSB_REF>,
<&apmixedsys CLK_APMIXED_USB1PLL>,
<&clk26m>,
<&infracfg_ao CLK_INFRA_AO_SSUSB_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck";
status = "disabled";
};
};
mmc0: mmc@11230000 {
......@@ -1450,52 +1461,68 @@ xhci1: usb@11290000 {
status = "disabled";
};
xhci2: usb@112a0000 {
compatible = "mediatek,mt8195-xhci",
"mediatek,mtk-xhci";
reg = <0 0x112a0000 0 0x1000>,
<0 0x112a3e00 0 0x0100>;
ssusb2: usb@112a1000 {
compatible = "mediatek,mt8195-mtu3", "mediatek,mtu3";
reg = <0 0x112a1000 0 0x2dff>, <0 0x112a3e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port2 PHY_TYPE_USB2>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP_2P>,
<&topckgen CLK_TOP_SSUSB_XHCI_2P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
ranges = <0 0 0 0x112a0000 0 0x3f00>;
#address-cells = <2>;
#size-cells = <2>;
interrupts = <GIC_SPI 532 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP_2P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_2P_BUS>,
<&topckgen CLK_TOP_SSUSB_P2_REF>,
<&clk26m>,
<&clk26m>,
<&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
"xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 105>;
clock-names = "sys_ck", "ref_ck", "mcu_ck";
phys = <&u2port2 PHY_TYPE_USB2>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg 0x400 105>;
status = "disabled";
xhci2: usb@0 {
compatible = "mediatek,mt8195-xhci", "mediatek,mtk-xhci";
reg = <0 0 0 0x1000>;
reg-names = "mac";
interrupts = <GIC_SPI 533 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_2P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>;
clock-names = "sys_ck";
status = "disabled";
};
};
xhci3: usb@112b0000 {
compatible = "mediatek,mt8195-xhci",
"mediatek,mtk-xhci";
reg = <0 0x112b0000 0 0x1000>,
<0 0x112b3e00 0 0x0100>;
ssusb3: usb@112b1000 {
compatible = "mediatek,mt8195-mtu3", "mediatek,mtu3";
reg = <0 0x112b1000 0 0x2dff>, <0 0x112b3e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
phys = <&u2port3 PHY_TYPE_USB2>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP_3P>,
<&topckgen CLK_TOP_SSUSB_XHCI_3P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>,
<&topckgen CLK_TOP_UNIVPLL_D5_D4>;
ranges = <0 0 0 0x112b0000 0 0x3f00>;
#address-cells = <2>;
#size-cells = <2>;
interrupts = <GIC_SPI 535 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&topckgen CLK_TOP_USB_TOP_3P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_3P_BUS>,
<&topckgen CLK_TOP_SSUSB_P3_REF>,
<&clk26m>,
<&clk26m>,
<&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>;
clock-names = "sys_ck", "ref_ck", "mcu_ck", "dma_ck",
"xhci_ck";
mediatek,syscon-wakeup = <&pericfg 0x400 106>;
clock-names = "sys_ck", "ref_ck", "mcu_ck";
phys = <&u2port3 PHY_TYPE_USB2>;
wakeup-source;
mediatek,syscon-wakeup = <&pericfg 0x400 106>;
status = "disabled";
xhci3: usb@0 {
compatible = "mediatek,mt8195-xhci", "mediatek,mtk-xhci";
reg = <0 0 0 0x1000>;
reg-names = "mac";
interrupts = <GIC_SPI 536 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&topckgen CLK_TOP_SSUSB_XHCI_3P>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D5_D4>;
clocks = <&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>;
clock-names = "sys_ck";
status = "disabled";
};
};
pcie0: pcie@112f0000 {
......@@ -1701,6 +1728,9 @@ lvts_efuse_data2: lvts2-calib@1d0 {
svs_calib_data: svs-calib@580 {
reg = <0x580 0x64>;
};
socinfo-data1@7a0 {
reg = <0x7a0 0x4>;
};
};
u3phy2: t-phy@11c40000 {
......
......@@ -880,6 +880,21 @@ &ufsphy {
status = "disabled";
};
&ssusb0 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb2 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&ssusb3 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&xhci0 {
status = "okay";
};
......@@ -890,11 +905,9 @@ &xhci1 {
};
&xhci2 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
&xhci3 {
vusb33-supply = <&mt6359_vusb_ldo_reg>;
status = "okay";
};
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