Commit d98930f5 authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher

drm/amdgpu: enable BIF clock gating for rn

Enable BIF light sleep clock gating.
Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent ef0e7d08
...@@ -1165,7 +1165,8 @@ static int soc15_common_early_init(void *handle) ...@@ -1165,7 +1165,8 @@ static int soc15_common_early_init(void *handle)
AMD_CG_SUPPORT_MC_MGCG | AMD_CG_SUPPORT_MC_MGCG |
AMD_CG_SUPPORT_MC_LS | AMD_CG_SUPPORT_MC_LS |
AMD_CG_SUPPORT_SDMA_MGCG | AMD_CG_SUPPORT_SDMA_MGCG |
AMD_CG_SUPPORT_SDMA_LS; AMD_CG_SUPPORT_SDMA_LS |
AMD_CG_SUPPORT_BIF_LS;
adev->pg_flags = 0; adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x91; adev->external_rev_id = adev->rev_id + 0x91;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment