Commit da06a8d7 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "A series of fixes (and in some cases, some cleanups):

  Via Tony Lindgren:
   - A collection of OMAP regression fixes, in particular because
     firmware no longer sets up all pin states before starting the
     kernel.
   - cpufreq fixes for OMAP (Rafael is on vacation and this was
     pre-agreed).
   - A longer series of misc regression fixes and cleanups, warning
     removals, etc for OMAP

  From Arnd Bergmann:
   - A series of warning fixes for various platforms (defconfig builds)

  Misc:
   - A couple of tegra fixes, one for i.MX, some vt8500 fixes, etc."

* tag 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (73 commits)
  ARM: pxa: armcore: fix PCI PIO warnings
  ARM: integrator: use __iomem pointers for MMIO, part 2
  ARM: assabet: fix bogus warning in get_assabet_scr (again)
  ARM: shmobile: mark shmobile_init_late as __init
  ARM: integrator_cp: fix build failure
  ARM: OMAP4/AM335x: hwmod: fix disable_module regression in hardreset handling
  ARM: OMAP3: fix workaround for EMU clockdomain
  arm/omap: Replace board_ref_clock with enum values
  ARM: OMAP2+: remove duplicated include from board-omap3stalker.c
  arch/arm/plat-omap/omap-pm-noop.c: Remove unecessary semicolon
  arch/arm/mach-omap2: Remove unecessary semicolon
  arch/arm/mach-omap1/devices.c: Remove unecessary semicolon
  ARM/dts: omap5-evm: pinmux configuration for audio
  ARM/dts: Add pinctrl driver entries for omap5
  ARM/dts: omap4-panda: pinmux configuration for audio
  ARM/dts: omap4-sdp: pinmux configuration for audio
  ARM/dts: omap5-evm: Disable unused McBSP3
  ARM/dts: omap4-sdp: Disable unused McBSP3
  ARM/dts: omap4-panda: Disable unused audio IPs
  ARM: OMAP: board-omap4panda: Pin mux configuration for audio needs
  ...
parents 49999ab2 6bd5dbda
...@@ -7,7 +7,7 @@ as "armctrl" in the SoC documentation, hence naming of this binding. ...@@ -7,7 +7,7 @@ as "armctrl" in the SoC documentation, hence naming of this binding.
Required properties: Required properties:
- compatible : should be "brcm,bcm2835-armctrl-ic.txt" - compatible : should be "brcm,bcm2835-armctrl-ic"
- reg : Specifies base physical address and size of the registers. - reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller - interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an - #interrupt-cells : Specifies the number of cells needed to encode an
......
...@@ -7,7 +7,7 @@ free running counter values, and generates an interrupt. ...@@ -7,7 +7,7 @@ free running counter values, and generates an interrupt.
Required properties: Required properties:
- compatible : should be "brcm,bcm2835-system-timer.txt" - compatible : should be "brcm,bcm2835-system-timer"
- reg : Specifies base physical address and size of the registers. - reg : Specifies base physical address and size of the registers.
- interrupts : A list of 4 interrupt sinks; one per timer channel. - interrupts : A list of 4 interrupt sinks; one per timer channel.
- clock-frequency : The frequency of the clock that drives the counter, in Hz. - clock-frequency : The frequency of the clock that drives the counter, in Hz.
......
...@@ -494,7 +494,6 @@ config ARCH_IOP32X ...@@ -494,7 +494,6 @@ config ARCH_IOP32X
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_MACH_GPIO_H select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
select NEED_RET_TO_USER select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
...@@ -508,7 +507,6 @@ config ARCH_IOP33X ...@@ -508,7 +507,6 @@ config ARCH_IOP33X
depends on MMU depends on MMU
select CPU_XSCALE select CPU_XSCALE
select NEED_MACH_GPIO_H select NEED_MACH_GPIO_H
select NEED_MACH_IO_H
select NEED_RET_TO_USER select NEED_RET_TO_USER
select PLAT_IOP select PLAT_IOP
select PCI select PCI
...@@ -1772,6 +1770,7 @@ source "mm/Kconfig" ...@@ -1772,6 +1770,7 @@ source "mm/Kconfig"
config FORCE_MAX_ZONEORDER config FORCE_MAX_ZONEORDER
int "Maximum zone order" if ARCH_SHMOBILE int "Maximum zone order" if ARCH_SHMOBILE
range 11 64 if ARCH_SHMOBILE range 11 64 if ARCH_SHMOBILE
default "12" if SOC_AM33XX
default "9" if SA1111 default "9" if SA1111
default "11" default "11"
help help
......
...@@ -25,14 +25,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \ ...@@ -25,14 +25,6 @@ dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
exynos4210-trats.dtb \ exynos4210-trats.dtb \
exynos5250-smdk5250.dtb exynos5250-smdk5250.dtb
dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb dtb-$(CONFIG_ARCH_HIGHBANK) += highbank.dtb
dtb-$(CONFIG_ARCH_IMX5) += imx51-babbage.dtb \
imx53-ard.dtb \
imx53-evk.dtb \
imx53-qsb.dtb \
imx53-smd.dtb
dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb
dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb
dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \ dtb-$(CONFIG_ARCH_KIRKWOOD) += kirkwood-dns320.dtb \
kirkwood-dns325.dtb \ kirkwood-dns325.dtb \
...@@ -76,7 +68,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ ...@@ -76,7 +68,9 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
omap4-pandaES.dtb \ omap4-pandaES.dtb \
omap4-var_som.dtb \ omap4-var_som.dtb \
omap4-sdp.dtb \ omap4-sdp.dtb \
omap5-evm.dtb omap5-evm.dtb \
am335x-evm.dtb \
am335x-bone.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb dtb-$(CONFIG_ARCH_PRIMA2) += prima2-evb.dtb
dtb-$(CONFIG_ARCH_U8500) += snowball.dtb dtb-$(CONFIG_ARCH_U8500) += snowball.dtb
dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
...@@ -104,5 +98,8 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \ ...@@ -104,5 +98,8 @@ dtb-$(CONFIG_ARCH_VEXPRESS) += vexpress-v2p-ca5s.dtb \
vexpress-v2p-ca15-tc1.dtb \ vexpress-v2p-ca15-tc1.dtb \
vexpress-v2p-ca15_a7.dtb \ vexpress-v2p-ca15_a7.dtb \
xenvm-4.2.dtb xenvm-4.2.dtb
dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
wm8505-ref.dtb \
wm8650-mid.dtb
endif endif
...@@ -59,6 +59,41 @@ sound: sound { ...@@ -59,6 +59,41 @@ sound: sound {
}; };
}; };
&omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6040_pins
&mcpdm_pins
&mcbsp1_pins
>;
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
>;
};
mcpdm_pins: pinmux_mcpdm_pins {
pinctrl-single,pins = <
0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <
0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
>;
};
};
&i2c1 { &i2c1 {
clock-frequency = <400000>; clock-frequency = <400000>;
...@@ -137,3 +172,15 @@ &emif2 { ...@@ -137,3 +172,15 @@ &emif2 {
cs1-used; cs1-used;
device-handle = <&elpida_ECB240ABACN>; device-handle = <&elpida_ECB240ABACN>;
}; };
&mcbsp2 {
status = "disabled";
};
&mcbsp3 {
status = "disabled";
};
&dmic {
status = "disabled";
};
...@@ -117,6 +117,15 @@ sound { ...@@ -117,6 +117,15 @@ sound {
}; };
&omap4_pmx_core { &omap4_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6040_pins
&mcpdm_pins
&dmic_pins
&mcbsp1_pins
&mcbsp2_pins
>;
uart2_pins: pinmux_uart2_pins { uart2_pins: pinmux_uart2_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */
...@@ -141,6 +150,50 @@ uart4_pins: pinmux_uart4_pins { ...@@ -141,6 +150,50 @@ uart4_pins: pinmux_uart4_pins {
0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */
>; >;
}; };
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
>;
};
mcpdm_pins: pinmux_mcpdm_pins {
pinctrl-single,pins = <
0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
>;
};
dmic_pins: pinmux_dmic_pins {
pinctrl-single,pins = <
0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */
0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */
0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */
0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <
0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
pinctrl-single,pins = <
0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */
0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */
0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */
0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
>;
};
}; };
&i2c1 { &i2c1 {
...@@ -349,3 +402,7 @@ &uart4 { ...@@ -349,3 +402,7 @@ &uart4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&uart4_pins>; pinctrl-0 = <&uart4_pins>;
}; };
&mcbsp3 {
status = "disabled";
};
...@@ -27,6 +27,60 @@ vmmcsd_fixed: fixedregulator-mmcsd { ...@@ -27,6 +27,60 @@ vmmcsd_fixed: fixedregulator-mmcsd {
}; };
&omap5_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&twl6040_pins
&mcpdm_pins
&dmic_pins
&mcbsp1_pins
&mcbsp2_pins
>;
twl6040_pins: pinmux_twl6040_pins {
pinctrl-single,pins = <
0x18a 0x6 /* perslimbus2_clock.gpio5_145 OUTPUT | MODE6 */
>;
};
mcpdm_pins: pinmux_mcpdm_pins {
pinctrl-single,pins = <
0x142 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
0x15c 0x108 /* abemcpdm_ul_data.abemcpdm_ul_data INPUT PULLDOWN | MODE0 */
0x15e 0x108 /* abemcpdm_dl_data.abemcpdm_dl_data INPUT PULLDOWN | MODE0 */
0x160 0x118 /* abemcpdm_frame.abemcpdm_frame INPUT PULLUP | MODE0 */
0x162 0x108 /* abemcpdm_lb_clk.abemcpdm_lb_clk INPUT PULLDOWN | MODE0 */
>;
};
dmic_pins: pinmux_dmic_pins {
pinctrl-single,pins = <
0x144 0x100 /* abedmic_din1.abedmic_din1 INPUT | MODE0 */
0x146 0x100 /* abedmic_din2.abedmic_din2 INPUT | MODE0 */
0x148 0x100 /* abedmic_din3.abedmic_din3 INPUT | MODE0 */
0x14a 0 /* abedmic_clk1.abedmic_clk1 OUTPUT | MODE0 */
>;
};
mcbsp1_pins: pinmux_mcbsp1_pins {
pinctrl-single,pins = <
0x14c 0x101 /* abedmic_clk2.abemcbsp1_fsx INPUT | MODE1 */
0x14e 0x9 /* abedmic_clk3.abemcbsp1_dx OUTPUT PULLDOWN | MODE1 */
0x150 0x101 /* abeslimbus1_clock.abemcbsp1_clkx INPUT | MODE0 */
0x152 0x109 /* abeslimbus1_data.abemcbsp1_dr INPUT PULLDOWN | MODE1 */
>;
};
mcbsp2_pins: pinmux_mcbsp2_pins {
pinctrl-single,pins = <
0x154 0x108 /* abemcbsp2_dr.abemcbsp2_dr INPUT PULLDOWN | MODE0 */
0x156 0x8 /* abemcbsp2_dx.abemcbsp2_dx OUTPUT PULLDOWN | MODE0 */
0x158 0x100 /* abemcbsp2_fsx.abemcbsp2_fsx INPUT | MODE0 */
0x15a 0x100 /* abemcbsp2_clkx.abemcbsp2_clkx INPUT | MODE0 */
>;
};
};
&mmc1 { &mmc1 {
vmmc-supply = <&vmmcsd_fixed>; vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>; bus-width = <4>;
...@@ -82,3 +136,7 @@ &keypad { ...@@ -82,3 +136,7 @@ &keypad {
0x020700d9>; /* SEARCH */ 0x020700d9>; /* SEARCH */
linux,input-no-autorepeat; linux,input-no-autorepeat;
}; };
&mcbsp3 {
status = "disabled";
};
...@@ -77,6 +77,23 @@ ocp { ...@@ -77,6 +77,23 @@ ocp {
ranges; ranges;
ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3"; ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";
omap5_pmx_core: pinmux@4a002840 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x4a002840 0x01b6>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
omap5_pmx_wkup: pinmux@4ae0c840 {
compatible = "ti,omap4-padconf", "pinctrl-single";
reg = <0x4ae0c840 0x0038>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <16>;
pinctrl-single,function-mask = <0x7fff>;
};
gic: interrupt-controller@48211000 { gic: interrupt-controller@48211000 {
compatible = "arm,cortex-a15-gic"; compatible = "arm,cortex-a15-gic";
interrupt-controller; interrupt-controller;
......
...@@ -539,7 +539,7 @@ pmc { ...@@ -539,7 +539,7 @@ pmc {
nvidia,invert-interrupt; nvidia,invert-interrupt;
}; };
memory-controller@0x7000f400 { memory-controller@7000f400 {
emc-table@190000 { emc-table@190000 {
reg = <190000>; reg = <190000>;
compatible = "nvidia,tegra20-emc-table"; compatible = "nvidia,tegra20-emc-table";
......
...@@ -170,7 +170,7 @@ pmc { ...@@ -170,7 +170,7 @@ pmc {
reg = <0x7000e400 0x400>; reg = <0x7000e400 0x400>;
}; };
memory-controller@0x7000f000 { memory-controller@7000f000 {
compatible = "nvidia,tegra20-mc"; compatible = "nvidia,tegra20-mc";
reg = <0x7000f000 0x024 reg = <0x7000f000 0x024
0x7000f03c 0x3c4>; 0x7000f03c 0x3c4>;
...@@ -183,7 +183,7 @@ gart { ...@@ -183,7 +183,7 @@ gart {
0x58000000 0x02000000>; /* GART aperture */ 0x58000000 0x02000000>; /* GART aperture */
}; };
memory-controller@0x7000f400 { memory-controller@7000f400 {
compatible = "nvidia,tegra20-emc"; compatible = "nvidia,tegra20-emc";
reg = <0x7000f400 0x200>; reg = <0x7000f400 0x200>;
#address-cells = <1>; #address-cells = <1>;
......
...@@ -284,11 +284,17 @@ int dma_set_coherent_mask(struct device *dev, u64 mask) ...@@ -284,11 +284,17 @@ int dma_set_coherent_mask(struct device *dev, u64 mask)
int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) int __init it8152_pci_setup(int nr, struct pci_sys_data *sys)
{ {
it8152_io.start = IT8152_IO_BASE + 0x12000; /*
it8152_io.end = IT8152_IO_BASE + 0x12000 + 0x100000; * FIXME: use pci_ioremap_io to remap the IO space here and
* move over to the generic io.h implementation.
* This requires solving the same problem for PXA PCMCIA
* support.
*/
it8152_io.start = (unsigned long)IT8152_IO_BASE + 0x12000;
it8152_io.end = (unsigned long)IT8152_IO_BASE + 0x12000 + 0x100000;
sys->mem_offset = 0x10000000; sys->mem_offset = 0x10000000;
sys->io_offset = IT8152_IO_BASE; sys->io_offset = (unsigned long)IT8152_IO_BASE;
if (request_resource(&ioport_resource, &it8152_io)) { if (request_resource(&ioport_resource, &it8152_io)) {
printk(KERN_ERR "PCI: unable to allocate IO region\n"); printk(KERN_ERR "PCI: unable to allocate IO region\n");
......
...@@ -153,7 +153,9 @@ static int at91_pm_verify_clocks(void) ...@@ -153,7 +153,9 @@ static int at91_pm_verify_clocks(void)
} }
} }
#ifdef CONFIG_AT91_PROGRAMMABLE_CLOCKS if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS))
return 1;
/* PCK0..PCK3 must be disabled, or configured to use clk32k */ /* PCK0..PCK3 must be disabled, or configured to use clk32k */
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
u32 css; u32 css;
...@@ -167,7 +169,6 @@ static int at91_pm_verify_clocks(void) ...@@ -167,7 +169,6 @@ static int at91_pm_verify_clocks(void)
return 0; return 0;
} }
} }
#endif
return 1; return 1;
} }
......
...@@ -87,7 +87,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length) ...@@ -87,7 +87,7 @@ void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
iotable_init(desc, 1); iotable_init(desc, 1);
} }
static struct map_desc at91_io_desc __initdata = { static struct map_desc at91_io_desc __initdata __maybe_unused = {
.virtual = (unsigned long)AT91_VA_BASE_SYS, .virtual = (unsigned long)AT91_VA_BASE_SYS,
.pfn = __phys_to_pfn(AT91_BASE_SYS), .pfn = __phys_to_pfn(AT91_BASE_SYS),
.length = SZ_16K, .length = SZ_16K,
......
...@@ -939,7 +939,7 @@ static struct platform_device da850_cpufreq_device = { ...@@ -939,7 +939,7 @@ static struct platform_device da850_cpufreq_device = {
unsigned int da850_max_speed = 300000; unsigned int da850_max_speed = 300000;
int __init da850_register_cpufreq(char *async_clk) int da850_register_cpufreq(char *async_clk)
{ {
int i; int i;
......
...@@ -89,8 +89,6 @@ ...@@ -89,8 +89,6 @@
#define IRQ_NETWINDER_VGA _ISA_IRQ(11) #define IRQ_NETWINDER_VGA _ISA_IRQ(11)
#define IRQ_NETWINDER_SOUND _ISA_IRQ(12) #define IRQ_NETWINDER_SOUND _ISA_IRQ(12)
#undef RTC_IRQ
#define RTC_IRQ IRQ_ISA_RTC_ALARM
#define I8042_KBD_IRQ IRQ_ISA_KEYBOARD #define I8042_KBD_IRQ IRQ_ISA_KEYBOARD
#define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE) #define I8042_AUX_IRQ (machine_is_netwinder() ? IRQ_NETWINDER_PS2MOUSE : IRQ_ISA_PS2MOUSE)
#define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY #define IRQ_FLOPPYDISK IRQ_ISA_FLOPPY
......
...@@ -3,7 +3,7 @@ ...@@ -3,7 +3,7 @@
*/ */
void cm_control(u32, u32); void cm_control(u32, u32);
#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_CTRL) #define CM_CTRL __io_address(INTEGRATOR_HDR_CTRL)
#define CM_CTRL_LED (1 << 0) #define CM_CTRL_LED (1 << 0)
#define CM_CTRL_nMBDET (1 << 1) #define CM_CTRL_nMBDET (1 << 1)
......
...@@ -324,9 +324,9 @@ ...@@ -324,9 +324,9 @@
*/ */
#define PHYS_PCI_V3_BASE 0x62000000 #define PHYS_PCI_V3_BASE 0x62000000
#define PCI_MEMORY_VADDR 0xe8000000 #define PCI_MEMORY_VADDR IOMEM(0xe8000000)
#define PCI_CONFIG_VADDR 0xec000000 #define PCI_CONFIG_VADDR IOMEM(0xec000000)
#define PCI_V3_VADDR 0xed000000 #define PCI_V3_VADDR IOMEM(0xed000000)
/* ------------------------------------------------------------------------ /* ------------------------------------------------------------------------
* Integrator Interrupt Controllers * Integrator Interrupt Controllers
......
...@@ -157,7 +157,7 @@ static struct map_desc ap_io_desc[] __initdata = { ...@@ -157,7 +157,7 @@ static struct map_desc ap_io_desc[] __initdata = {
static void __init ap_map_io(void) static void __init ap_map_io(void)
{ {
iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc)); iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
vga_base = PCI_MEMORY_VADDR; vga_base = (unsigned long)PCI_MEMORY_VADDR;
pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE)); pci_map_io_early(__phys_to_pfn(PHYS_PCI_IO_BASE));
} }
......
...@@ -261,6 +261,8 @@ static void __init intcp_init_early(void) ...@@ -261,6 +261,8 @@ static void __init intcp_init_early(void)
#endif #endif
} }
#ifdef CONFIG_OF
static void __init intcp_timer_init_of(void) static void __init intcp_timer_init_of(void)
{ {
struct device_node *node; struct device_node *node;
...@@ -297,8 +299,6 @@ static struct sys_timer cp_of_timer = { ...@@ -297,8 +299,6 @@ static struct sys_timer cp_of_timer = {
.init = intcp_timer_init_of, .init = intcp_timer_init_of,
}; };
#ifdef CONFIG_OF
static const struct of_device_id fpga_irq_of_match[] __initconst = { static const struct of_device_id fpga_irq_of_match[] __initconst = {
{ .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, }, { .compatible = "arm,versatile-fpga-irq", .data = fpga_irq_of_init, },
{ /* Sentinel */ } { /* Sentinel */ }
......
...@@ -30,7 +30,7 @@ ...@@ -30,7 +30,7 @@
extern int init_atu; extern int init_atu;
static int __init static int __init
iq81340sc_atux_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) iq81340sc_atux_map_irq(const struct pci_dev *dev, u8 idsel, u8 pin)
{ {
WARN_ON(idsel < 1 || idsel > 2); WARN_ON(idsel < 1 || idsel > 2);
......
...@@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs) ...@@ -504,7 +504,7 @@ iop13xx_pci_abort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
/* Scan an IOP13XX PCI bus. nr selects which ATU we use. /* Scan an IOP13XX PCI bus. nr selects which ATU we use.
*/ */
struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *sys) struct pci_bus * __devinit iop13xx_scan_bus(int nr, struct pci_sys_data *sys)
{ {
int which_atu; int which_atu;
struct pci_bus *bus = NULL; struct pci_bus *bus = NULL;
......
...@@ -34,7 +34,8 @@ extern struct bus_type platform_bus_type; ...@@ -34,7 +34,8 @@ extern struct bus_type platform_bus_type;
#define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \ #define __arch_dma_to_virt(dev, x) ({ (void *) (is_lbus_device(dev) ? \
__phys_to_virt(x) : __bus_to_virt(x)); }) __phys_to_virt(x) : __bus_to_virt(x)); })
#define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \ #define __arch_virt_to_dma(dev, x) ({ is_lbus_device(dev) ? \
(dma_addr_t)__virt_to_phys(x) : (dma_addr_t)__virt_to_bus(x); }) (dma_addr_t)__virt_to_phys((unsigned long)x) \
: (dma_addr_t)__virt_to_bus(x); })
#define __arch_pfn_to_dma(dev, pfn) \ #define __arch_pfn_to_dma(dev, pfn) \
({ dma_addr_t __dma = __pfn_to_phys(pfn); \ ({ dma_addr_t __dma = __pfn_to_phys(pfn); \
if (!is_lbus_device(dev)) \ if (!is_lbus_device(dev)) \
......
...@@ -54,7 +54,7 @@ static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, i ...@@ -54,7 +54,7 @@ static void __init __iomem *win_cfg_base(const struct orion_addr_map_cfg *cfg, i
/* /*
* Description of the windows needed by the platform code * Description of the windows needed by the platform code
*/ */
static struct __initdata orion_addr_map_cfg addr_map_cfg = { static struct orion_addr_map_cfg addr_map_cfg __initdata = {
.num_wins = 14, .num_wins = 14,
.remappable_wins = 8, .remappable_wins = 8,
.win_cfg_base = win_cfg_base, .win_cfg_base = win_cfg_base,
......
...@@ -336,7 +336,7 @@ void __init mv78xx0_init_early(void) ...@@ -336,7 +336,7 @@ void __init mv78xx0_init_early(void)
orion_time_set_base(TIMER_VIRT_BASE); orion_time_set_base(TIMER_VIRT_BASE);
} }
static void mv78xx0_timer_init(void) static void __init_refok mv78xx0_timer_init(void)
{ {
orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR, orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
IRQ_MV78XX0_TIMER_1, get_tclk()); IRQ_MV78XX0_TIMER_1, get_tclk());
......
...@@ -231,7 +231,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, ...@@ -231,7 +231,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
omap_mmc_add("mmci-omap", i, base, size, irq, omap_mmc_add("mmci-omap", i, base, size, irq,
rx_req, tx_req, mmc_data[i]); rx_req, tx_req, mmc_data[i]);
}; }
} }
#endif #endif
......
...@@ -830,6 +830,32 @@ static struct omap_board_mux board_mux[] __initdata = { ...@@ -830,6 +830,32 @@ static struct omap_board_mux board_mux[] __initdata = {
/* NIRQ2 for twl6040 */ /* NIRQ2 for twl6040 */
OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 | OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
/* GPIO_127 for twl6040 */
OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
/* McPDM */
OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
/* DMIC */
OMAP4_MUX(ABE_DMIC_CLK1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
OMAP4_MUX(ABE_DMIC_DIN1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
OMAP4_MUX(ABE_DMIC_DIN2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
OMAP4_MUX(ABE_DMIC_DIN3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
/* McBSP1 */
OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
OMAP_PULL_ENA),
OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
/* McBSP2 */
OMAP4_MUX(ABE_MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
OMAP4_MUX(ABE_MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
OMAP_PULL_ENA),
OMAP4_MUX(ABE_MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR }, { .reg_offset = OMAP_MUX_TERMINATOR },
}; };
......
...@@ -218,7 +218,7 @@ void __init board_flash_init(struct flash_partitions partition_info[], ...@@ -218,7 +218,7 @@ void __init board_flash_init(struct flash_partitions partition_info[],
if (onenandcs > GPMC_CS_NUM) if (onenandcs > GPMC_CS_NUM)
onenandcs = cs; onenandcs = cs;
break; break;
}; }
cs++; cs++;
} }
......
...@@ -461,7 +461,7 @@ static void __init beagle_opp_init(void) ...@@ -461,7 +461,7 @@ static void __init beagle_opp_init(void)
mpu_dev = omap_device_get_by_hwmod_name("mpu"); mpu_dev = omap_device_get_by_hwmod_name("mpu");
iva_dev = omap_device_get_by_hwmod_name("iva"); iva_dev = omap_device_get_by_hwmod_name("iva");
if (!mpu_dev || !iva_dev) { if (IS_ERR(mpu_dev) || IS_ERR(iva_dev)) {
pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n",
__func__, mpu_dev, iva_dev); __func__, mpu_dev, iva_dev);
return; return;
......
...@@ -88,11 +88,10 @@ enum { ...@@ -88,11 +88,10 @@ enum {
static u8 omap3_evm_version; static u8 omap3_evm_version;
u8 get_omap3_evm_rev(void) static u8 get_omap3_evm_rev(void)
{ {
return omap3_evm_version; return omap3_evm_version;
} }
EXPORT_SYMBOL(get_omap3_evm_rev);
static void __init omap3_evm_get_revision(void) static void __init omap3_evm_get_revision(void)
{ {
......
...@@ -48,11 +48,6 @@ ...@@ -48,11 +48,6 @@
#include <video/omap-panel-tfp410.h> #include <video/omap-panel-tfp410.h>
#include <linux/platform_data/spi-omap2-mcspi.h> #include <linux/platform_data/spi-omap2-mcspi.h>
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/interrupt.h>
#include <linux/smsc911x.h>
#include <linux/i2c/at24.h>
#include "sdram-micron-mt46h32m32lf-6.h" #include "sdram-micron-mt46h32m32lf-6.h"
#include "mux.h" #include "mux.h"
......
...@@ -247,8 +247,7 @@ static struct platform_device omap_vwlan_device = { ...@@ -247,8 +247,7 @@ static struct platform_device omap_vwlan_device = {
}; };
static struct wl12xx_platform_data omap_panda_wlan_data __initdata = { static struct wl12xx_platform_data omap_panda_wlan_data __initdata = {
/* PANDA ref clock is 38.4 MHz */ .board_ref_clock = WL12XX_REFCLOCK_38, /* 38.4 MHz */
.board_ref_clock = 2,
}; };
static struct twl6040_codec_data twl6040_codec = { static struct twl6040_codec_data twl6040_codec = {
...@@ -388,6 +387,21 @@ static struct omap_board_mux board_mux[] __initdata = { ...@@ -388,6 +387,21 @@ static struct omap_board_mux board_mux[] __initdata = {
/* NIRQ2 for twl6040 */ /* NIRQ2 for twl6040 */
OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 | OMAP4_MUX(SYS_NIRQ2, OMAP_MUX_MODE0 |
OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE), OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE),
/* GPIO_127 for twl6040 */
OMAP4_MUX(HDQ_SIO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
/* McPDM */
OMAP4_MUX(ABE_PDM_UL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_PDM_DL_DATA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_PDM_FRAME, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP),
OMAP4_MUX(ABE_PDM_LB_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_CLKS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
/* McBSP1 */
OMAP4_MUX(ABE_MCBSP1_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
OMAP4_MUX(ABE_MCBSP1_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
OMAP4_MUX(ABE_MCBSP1_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT |
OMAP_PULL_ENA),
OMAP4_MUX(ABE_MCBSP1_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
{ .reg_offset = OMAP_MUX_TERMINATOR }, { .reg_offset = OMAP_MUX_TERMINATOR },
}; };
......
...@@ -748,7 +748,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module = ...@@ -748,7 +748,7 @@ static struct radio_si4713_platform_data rx51_si4713_data __initdata_or_module =
.subdev_board_info = &rx51_si4713_board_info, .subdev_board_info = &rx51_si4713_board_info,
}; };
static struct platform_device rx51_si4713_dev = { static struct platform_device rx51_si4713_dev __initdata_or_module = {
.name = "radio-si4713", .name = "radio-si4713",
.id = -1, .id = -1,
.dev = { .dev = {
......
...@@ -195,8 +195,7 @@ static struct platform_device omap_vwlan_device = { ...@@ -195,8 +195,7 @@ static struct platform_device omap_vwlan_device = {
}; };
static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = { static struct wl12xx_platform_data omap_zoom_wlan_data __initdata = {
/* ZOOM ref clock is 26 MHz */ .board_ref_clock = WL12XX_REFCLOCK_26, /* 26 MHz */
.board_ref_clock = 1,
}; };
static struct omap2_hsmmc_info mmc[] = { static struct omap2_hsmmc_info mmc[] = {
......
...@@ -382,7 +382,7 @@ void omap2_init_clksel_parent(struct clk *clk) ...@@ -382,7 +382,7 @@ void omap2_init_clksel_parent(struct clk *clk)
__clk_get_name(parent) : __clk_get_name(parent) :
"NULL")); "NULL"));
clk_reparent(clk, clks->parent); clk_reparent(clk, clks->parent);
}; }
found = 1; found = 1;
} }
} }
......
...@@ -1035,6 +1035,8 @@ static struct omap_clk am33xx_clks[] = { ...@@ -1035,6 +1035,8 @@ static struct omap_clk am33xx_clks[] = {
CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk, CK_AM33XX), CLK(NULL, "pruss_ocp_gclk", &pruss_ocp_gclk, CK_AM33XX),
CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX), CLK("davinci-mcasp.0", NULL, &mcasp0_fck, CK_AM33XX),
CLK("davinci-mcasp.1", NULL, &mcasp1_fck, CK_AM33XX), CLK("davinci-mcasp.1", NULL, &mcasp1_fck, CK_AM33XX),
CLK(NULL, "mcasp0_fck", &mcasp0_fck, CK_AM33XX),
CLK(NULL, "mcasp1_fck", &mcasp1_fck, CK_AM33XX),
CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX), CLK("NULL", "mmc2_fck", &mmc2_fck, CK_AM33XX),
CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX), CLK(NULL, "mmu_fck", &mmu_fck, CK_AM33XX),
CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX), CLK(NULL, "smartreflex0_fck", &smartreflex0_fck, CK_AM33XX),
......
...@@ -183,17 +183,6 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) ...@@ -183,17 +183,6 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm)
if (!clkdm->clktrctrl_mask) if (!clkdm->clktrctrl_mask)
return 0; return 0;
/*
* The CLKDM_MISSING_IDLE_REPORTING flag documentation has
* more details on the unpleasant problem this is working
* around
*/
if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
_enable_hwsup(clkdm);
return 0;
}
hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask); clkdm->clktrctrl_mask);
...@@ -217,17 +206,6 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) ...@@ -217,17 +206,6 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm)
if (!clkdm->clktrctrl_mask) if (!clkdm->clktrctrl_mask)
return 0; return 0;
/*
* The CLKDM_MISSING_IDLE_REPORTING flag documentation has
* more details on the unpleasant problem this is working
* around
*/
if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
omap3_clkdm_wakeup(clkdm);
return 0;
}
hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask); clkdm->clktrctrl_mask);
...@@ -269,6 +247,17 @@ static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm) ...@@ -269,6 +247,17 @@ static int omap3xxx_clkdm_clk_enable(struct clockdomain *clkdm)
if (!clkdm->clktrctrl_mask) if (!clkdm->clktrctrl_mask)
return 0; return 0;
/*
* The CLKDM_MISSING_IDLE_REPORTING flag documentation has
* more details on the unpleasant problem this is working
* around
*/
if ((clkdm->flags & CLKDM_MISSING_IDLE_REPORTING) &&
(clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)) {
omap3_clkdm_wakeup(clkdm);
return 0;
}
hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask); clkdm->clktrctrl_mask);
...@@ -292,6 +281,17 @@ static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm) ...@@ -292,6 +281,17 @@ static int omap3xxx_clkdm_clk_disable(struct clockdomain *clkdm)
if (!clkdm->clktrctrl_mask) if (!clkdm->clktrctrl_mask)
return 0; return 0;
/*
* The CLKDM_MISSING_IDLE_REPORTING flag documentation has
* more details on the unpleasant problem this is working
* around
*/
if (clkdm->flags & CLKDM_MISSING_IDLE_REPORTING &&
!(clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) {
_enable_hwsup(clkdm);
return 0;
}
hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs, hwsup = omap2_cm_is_clkdm_in_hwsup(clkdm->pwrdm.ptr->prcm_offs,
clkdm->clktrctrl_mask); clkdm->clktrctrl_mask);
......
...@@ -221,7 +221,7 @@ static struct platform_device *create_dss_pdev(const char *pdev_name, ...@@ -221,7 +221,7 @@ static struct platform_device *create_dss_pdev(const char *pdev_name,
ohs[0] = oh; ohs[0] = oh;
od = omap_device_alloc(pdev, ohs, 1, NULL, 0); od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
if (!od) { if (IS_ERR(od)) {
pr_err("Could not alloc omap_device for %s\n", pdev_name); pr_err("Could not alloc omap_device for %s\n", pdev_name);
r = -ENOMEM; r = -ENOMEM;
goto err; goto err;
......
...@@ -838,7 +838,7 @@ static int gpmc_setup_irq(void) ...@@ -838,7 +838,7 @@ static int gpmc_setup_irq(void)
return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL); return request_irq(gpmc_irq, gpmc_handle_irq, 0, "gpmc", NULL);
} }
static __exit int gpmc_free_irq(void) static __devexit int gpmc_free_irq(void)
{ {
int i; int i;
...@@ -944,7 +944,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev) ...@@ -944,7 +944,7 @@ static __devinit int gpmc_probe(struct platform_device *pdev)
return 0; return 0;
} }
static __exit int gpmc_remove(struct platform_device *pdev) static __devexit int gpmc_remove(struct platform_device *pdev)
{ {
gpmc_free_irq(); gpmc_free_irq();
gpmc_mem_exit(); gpmc_mem_exit();
......
...@@ -523,7 +523,7 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo, ...@@ -523,7 +523,7 @@ static void __init omap_hsmmc_init_one(struct omap2_hsmmc_info *hsmmcinfo,
dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id); dev_set_name(&pdev->dev, "%s.%d", pdev->name, pdev->id);
od = omap_device_alloc(pdev, ohs, 1, NULL, 0); od = omap_device_alloc(pdev, ohs, 1, NULL, 0);
if (!od) { if (IS_ERR(od)) {
pr_err("Could not allocate od for %s\n", name); pr_err("Could not allocate od for %s\n", name);
goto put_pdev; goto put_pdev;
} }
......
...@@ -486,7 +486,7 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state) ...@@ -486,7 +486,7 @@ void omap_hwmod_mux(struct omap_hwmod_mux_info *hmux, u8 state)
default: default:
/* Nothing to be done */ /* Nothing to be done */
break; break;
}; }
if (val >= 0) { if (val >= 0) {
omap_mux_write(pad->partition, val, omap_mux_write(pad->partition, val,
......
...@@ -61,8 +61,8 @@ int __init omap_secure_ram_reserve_memblock(void) ...@@ -61,8 +61,8 @@ int __init omap_secure_ram_reserve_memblock(void)
{ {
u32 size = OMAP_SECURE_RAM_STORAGE; u32 size = OMAP_SECURE_RAM_STORAGE;
size = ALIGN(size, SZ_1M); size = ALIGN(size, SECTION_SIZE);
omap_secure_memblock_base = arm_memblock_steal(size, SZ_1M); omap_secure_memblock_base = arm_memblock_steal(size, SECTION_SIZE);
return 0; return 0;
} }
......
...@@ -1697,6 +1697,29 @@ static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) ...@@ -1697,6 +1697,29 @@ static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
return false; return false;
} }
/**
* _are_any_hardreset_lines_asserted - return true if any part of @oh is
* hard-reset
* @oh: struct omap_hwmod *
*
* If any hardreset lines associated with @oh are asserted, then
* return true. Otherwise, if no hardreset lines associated with @oh
* are asserted, or if @oh has no hardreset lines, then return false.
* This function is used to avoid executing some parts of the IP block
* enable/disable sequence if any hardreset line is set.
*/
static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
{
int rst_cnt = 0;
int i;
for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
rst_cnt++;
return (rst_cnt) ? true : false;
}
/** /**
* _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
* @oh: struct omap_hwmod * * @oh: struct omap_hwmod *
...@@ -1715,7 +1738,7 @@ static int _omap4_disable_module(struct omap_hwmod *oh) ...@@ -1715,7 +1738,7 @@ static int _omap4_disable_module(struct omap_hwmod *oh)
* Since integration code might still be doing something, only * Since integration code might still be doing something, only
* disable if all lines are under hardreset. * disable if all lines are under hardreset.
*/ */
if (!_are_all_hardreset_lines_asserted(oh)) if (_are_any_hardreset_lines_asserted(oh))
return 0; return 0;
pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
...@@ -1749,12 +1772,12 @@ static int _am33xx_disable_module(struct omap_hwmod *oh) ...@@ -1749,12 +1772,12 @@ static int _am33xx_disable_module(struct omap_hwmod *oh)
pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
if (_are_any_hardreset_lines_asserted(oh))
return 0;
am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs, am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
oh->prcm.omap4.clkctrl_offs); oh->prcm.omap4.clkctrl_offs);
if (_are_all_hardreset_lines_asserted(oh))
return 0;
v = _am33xx_wait_target_disable(oh); v = _am33xx_wait_target_disable(oh);
if (v) if (v)
pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
......
...@@ -219,7 +219,7 @@ struct omap_hwmod omap2xxx_l4_wkup_hwmod = { ...@@ -219,7 +219,7 @@ struct omap_hwmod omap2xxx_l4_wkup_hwmod = {
/* MPU */ /* MPU */
static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = { static struct omap_hwmod_irq_info omap2xxx_mpu_irqs[] = {
{ .name = "pmu", .irq = 3 }, { .name = "pmu", .irq = 3 + OMAP_INTC_START },
{ .irq = -1 } { .irq = -1 }
}; };
......
...@@ -94,7 +94,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = { ...@@ -94,7 +94,7 @@ static struct omap_hwmod omap3xxx_l4_sec_hwmod = {
/* MPU */ /* MPU */
static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = { static struct omap_hwmod_irq_info omap3xxx_mpu_irqs[] = {
{ .name = "pmu", .irq = 3 }, { .name = "pmu", .irq = 3 + OMAP_INTC_START },
{ .irq = -1 } { .irq = -1 }
}; };
...@@ -3683,6 +3683,7 @@ static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = { ...@@ -3683,6 +3683,7 @@ static struct omap_hwmod_ocp_if *am35xx_hwmod_ocp_ifs[] __initdata = {
&omap3xxx_l4_core__usb_tll_hs, &omap3xxx_l4_core__usb_tll_hs,
&omap3xxx_l4_core__es3plus_mmc1, &omap3xxx_l4_core__es3plus_mmc1,
&omap3xxx_l4_core__es3plus_mmc2, &omap3xxx_l4_core__es3plus_mmc2,
&omap3xxx_l4_core__hdq1w,
&am35xx_mdio__l3, &am35xx_mdio__l3,
&am35xx_l4_core__mdio, &am35xx_l4_core__mdio,
&am35xx_emac__l3, &am35xx_emac__l3,
...@@ -3737,7 +3738,7 @@ int __init omap3xxx_hwmod_init(void) ...@@ -3737,7 +3738,7 @@ int __init omap3xxx_hwmod_init(void)
} else { } else {
WARN(1, "OMAP3 hwmod family init: unknown chip type\n"); WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
return -EINVAL; return -EINVAL;
}; }
r = omap_hwmod_register_links(h); r = omap_hwmod_register_links(h);
if (r < 0) if (r < 0)
...@@ -3754,7 +3755,7 @@ int __init omap3xxx_hwmod_init(void) ...@@ -3754,7 +3755,7 @@ int __init omap3xxx_hwmod_init(void)
rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
rev == OMAP3430_REV_ES3_1_2) { rev == OMAP3430_REV_ES3_1_2) {
h = omap3430es2plus_hwmod_ocp_ifs; h = omap3430es2plus_hwmod_ocp_ifs;
}; }
if (h) { if (h) {
r = omap_hwmod_register_links(h); r = omap_hwmod_register_links(h);
...@@ -3769,7 +3770,7 @@ int __init omap3xxx_hwmod_init(void) ...@@ -3769,7 +3770,7 @@ int __init omap3xxx_hwmod_init(void)
} else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 || } else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
rev == OMAP3430_REV_ES3_1_2) { rev == OMAP3430_REV_ES3_1_2) {
h = omap3430_es3plus_hwmod_ocp_ifs; h = omap3430_es3plus_hwmod_ocp_ifs;
}; }
if (h) if (h)
r = omap_hwmod_register_links(h); r = omap_hwmod_register_links(h);
......
...@@ -18,6 +18,7 @@ ...@@ -18,6 +18,7 @@
*/ */
#include <linux/module.h> #include <linux/module.h>
#include <linux/opp.h> #include <linux/opp.h>
#include <linux/cpu.h>
#include <plat/omap_device.h> #include <plat/omap_device.h>
...@@ -62,13 +63,23 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, ...@@ -62,13 +63,23 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def,
__func__, i); __func__, i);
return -EINVAL; return -EINVAL;
} }
oh = omap_hwmod_lookup(opp_def->hwmod_name);
if (!oh || !oh->od) { if (!strncmp(opp_def->hwmod_name, "mpu", 3)) {
pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n", /*
__func__, opp_def->hwmod_name, i); * All current OMAPs share voltage rail and
continue; * clock source, so CPU0 is used to represent
* the MPU-SS.
*/
dev = get_cpu_device(0);
} else {
oh = omap_hwmod_lookup(opp_def->hwmod_name);
if (!oh || !oh->od) {
pr_debug("%s: no hwmod or odev for %s, [%d] cannot add OPPs.\n",
__func__, opp_def->hwmod_name, i);
continue;
}
dev = &oh->od->pdev->dev;
} }
dev = &oh->od->pdev->dev;
r = opp_add(dev, opp_def->freq, opp_def->u_volt); r = opp_add(dev, opp_def->freq, opp_def->u_volt);
if (r) { if (r) {
......
...@@ -168,7 +168,7 @@ static int pm_dbg_open(struct inode *inode, struct file *file) ...@@ -168,7 +168,7 @@ static int pm_dbg_open(struct inode *inode, struct file *file)
default: default:
return single_open(file, pm_dbg_show_timers, return single_open(file, pm_dbg_show_timers,
&inode->i_private); &inode->i_private);
}; }
} }
static const struct file_operations debug_fops = { static const struct file_operations debug_fops = {
......
...@@ -16,6 +16,7 @@ ...@@ -16,6 +16,7 @@
#include <linux/opp.h> #include <linux/opp.h>
#include <linux/export.h> #include <linux/export.h>
#include <linux/suspend.h> #include <linux/suspend.h>
#include <linux/cpu.h>
#include <asm/system_misc.h> #include <asm/system_misc.h>
...@@ -169,7 +170,15 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, ...@@ -169,7 +170,15 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
goto exit; goto exit;
} }
dev = omap_device_get_by_hwmod_name(oh_name); if (!strncmp(oh_name, "mpu", 3))
/*
* All current OMAPs share voltage rail and clock
* source, so CPU0 is used to represent the MPU-SS.
*/
dev = get_cpu_device(0);
else
dev = omap_device_get_by_hwmod_name(oh_name);
if (IS_ERR(dev)) { if (IS_ERR(dev)) {
pr_err("%s: Unable to get dev pointer for hwmod %s\n", pr_err("%s: Unable to get dev pointer for hwmod %s\n",
__func__, oh_name); __func__, oh_name);
...@@ -177,7 +186,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, ...@@ -177,7 +186,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
} }
voltdm = voltdm_lookup(vdd_name); voltdm = voltdm_lookup(vdd_name);
if (IS_ERR(voltdm)) { if (!voltdm) {
pr_err("%s: unable to get vdd pointer for vdd_%s\n", pr_err("%s: unable to get vdd pointer for vdd_%s\n",
__func__, vdd_name); __func__, vdd_name);
goto exit; goto exit;
......
...@@ -122,7 +122,7 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user) ...@@ -122,7 +122,7 @@ static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
sr_data->senp_mod = 0x1; sr_data->senp_mod = 0x1;
sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name); sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
if (IS_ERR(sr_data->voltdm)) { if (!sr_data->voltdm) {
pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
__func__, sr_dev_attr->sensor_voltdm_name); __func__, sr_dev_attr->sensor_voltdm_name);
goto exit; goto exit;
......
...@@ -378,7 +378,7 @@ static void __init realtime_counter_init(void) ...@@ -378,7 +378,7 @@ static void __init realtime_counter_init(void)
return; return;
} }
sys_clk = clk_get(NULL, "sys_clkin_ck"); sys_clk = clk_get(NULL, "sys_clkin_ck");
if (!sys_clk) { if (IS_ERR(sys_clk)) {
pr_err("%s: failed to get system clock handle\n", __func__); pr_err("%s: failed to get system clock handle\n", __func__);
iounmap(base); iounmap(base);
return; return;
......
...@@ -158,7 +158,7 @@ static struct regulator_init_data omap3_vpll2_idata = { ...@@ -158,7 +158,7 @@ static struct regulator_init_data omap3_vpll2_idata = {
}; };
static struct regulator_consumer_supply omap3_vdd1_supply[] = { static struct regulator_consumer_supply omap3_vdd1_supply[] = {
REGULATOR_SUPPLY("vcc", "mpu.0"), REGULATOR_SUPPLY("vcc", "cpu0"),
}; };
static struct regulator_consumer_supply omap3_vdd2_supply[] = { static struct regulator_consumer_supply omap3_vdd2_supply[] = {
......
...@@ -22,6 +22,7 @@ ...@@ -22,6 +22,7 @@
#include <asm/mach/map.h> #include <asm/mach/map.h>
#include <mach/pxa25x.h> #include <mach/pxa25x.h>
#undef GPIO24_SSP1_SFRM
#include <mach/pxa27x.h> #include <mach/pxa27x.h>
#include <mach/audio.h> #include <mach/audio.h>
#include <linux/platform_data/video-pxafb.h> #include <linux/platform_data/video-pxafb.h>
......
...@@ -105,6 +105,7 @@ static struct pxamci_platform_data palmte2_mci_platform_data = { ...@@ -105,6 +105,7 @@ static struct pxamci_platform_data palmte2_mci_platform_data = {
.gpio_power = GPIO_NR_PALMTE2_SD_POWER, .gpio_power = GPIO_NR_PALMTE2_SD_POWER,
}; };
#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
/****************************************************************************** /******************************************************************************
* GPIO keys * GPIO keys
******************************************************************************/ ******************************************************************************/
...@@ -132,6 +133,7 @@ static struct platform_device palmte2_pxa_keys = { ...@@ -132,6 +133,7 @@ static struct platform_device palmte2_pxa_keys = {
.platform_data = &palmte2_pxa_keys_data, .platform_data = &palmte2_pxa_keys_data,
}, },
}; };
#endif
/****************************************************************************** /******************************************************************************
* Backlight * Backlight
......
...@@ -55,7 +55,6 @@ ...@@ -55,7 +55,6 @@
#ifdef CONFIG_PM #ifdef CONFIG_PM
static int sharpsl_off_charge_battery(void); static int sharpsl_off_charge_battery(void);
static int sharpsl_check_battery_voltage(void); static int sharpsl_check_battery_voltage(void);
static int sharpsl_fatal_check(void);
#endif #endif
static int sharpsl_check_battery_temp(void); static int sharpsl_check_battery_temp(void);
static int sharpsl_ac_check(void); static int sharpsl_ac_check(void);
...@@ -686,53 +685,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state) ...@@ -686,53 +685,6 @@ static int corgi_pxa_pm_enter(suspend_state_t state)
return 0; return 0;
} }
/*
* Check for fatal battery errors
* Fatal returns -1
*/
static int sharpsl_fatal_check(void)
{
int buff[5], temp, i, acin;
dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check entered\n");
/* Check AC-Adapter */
acin = sharpsl_pm.machinfo->read_devdata(SHARPSL_STATUS_ACIN);
if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
sharpsl_pm.machinfo->charge(0);
udelay(100);
sharpsl_pm.machinfo->discharge(1); /* enable discharge */
mdelay(SHARPSL_WAIT_DISCHARGE_ON);
}
if (sharpsl_pm.machinfo->discharge1)
sharpsl_pm.machinfo->discharge1(1);
/* Check battery : check inserting battery ? */
for (i = 0; i < 5; i++) {
buff[i] = sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT);
mdelay(SHARPSL_CHECK_BATTERY_WAIT_TIME_VOLT);
}
if (sharpsl_pm.machinfo->discharge1)
sharpsl_pm.machinfo->discharge1(0);
if (acin && (sharpsl_pm.charge_mode == CHRG_ON)) {
udelay(100);
sharpsl_pm.machinfo->charge(1);
sharpsl_pm.machinfo->discharge(0);
}
temp = get_select_val(buff);
dev_dbg(sharpsl_pm.dev, "sharpsl_fatal_check: acin: %d, discharge voltage: %d, no discharge: %ld\n", acin, temp, sharpsl_pm.machinfo->read_devdata(SHARPSL_BATT_VOLT));
if ((acin && (temp < sharpsl_pm.machinfo->fatal_acin_volt)) ||
(!acin && (temp < sharpsl_pm.machinfo->fatal_noacin_volt)))
return -1;
return 0;
}
static int sharpsl_off_charge_error(void) static int sharpsl_off_charge_error(void)
{ {
dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n"); dev_err(sharpsl_pm.dev, "Offline Charger: Error occurred.\n");
......
...@@ -768,8 +768,7 @@ static unsigned long viper_tpm; ...@@ -768,8 +768,7 @@ static unsigned long viper_tpm;
static int __init viper_tpm_setup(char *str) static int __init viper_tpm_setup(char *str)
{ {
strict_strtoul(str, 10, &viper_tpm); return strict_strtoul(str, 10, &viper_tpm) >= 0;
return 1;
} }
__setup("tpm=", viper_tpm_setup); __setup("tpm=", viper_tpm_setup);
......
...@@ -960,7 +960,9 @@ static int __init ecard_probe(int slot, unsigned irq, card_type_t type) ...@@ -960,7 +960,9 @@ static int __init ecard_probe(int slot, unsigned irq, card_type_t type)
*ecp = ec; *ecp = ec;
slot_to_expcard[slot] = ec; slot_to_expcard[slot] = ec;
device_register(&ec->dev); rc = device_register(&ec->dev);
if (rc)
goto nodev;
return 0; return 0;
......
...@@ -232,7 +232,7 @@ struct irq_chip s3c2416_irq_second = { ...@@ -232,7 +232,7 @@ struct irq_chip s3c2416_irq_second = {
/* IRQ initialisation code */ /* IRQ initialisation code */
static int __init s3c2416_add_sub(unsigned int base, static int s3c2416_add_sub(unsigned int base,
void (*demux)(unsigned int, void (*demux)(unsigned int,
struct irq_desc *), struct irq_desc *),
struct irq_chip *chip, struct irq_chip *chip,
...@@ -251,7 +251,7 @@ static int __init s3c2416_add_sub(unsigned int base, ...@@ -251,7 +251,7 @@ static int __init s3c2416_add_sub(unsigned int base,
return 0; return 0;
} }
static void __init s3c2416_irq_add_second(void) static void s3c2416_irq_add_second(void)
{ {
unsigned long pend; unsigned long pend;
unsigned long last; unsigned long last;
...@@ -287,7 +287,7 @@ static void __init s3c2416_irq_add_second(void) ...@@ -287,7 +287,7 @@ static void __init s3c2416_irq_add_second(void)
} }
} }
static int __init s3c2416_irq_add(struct device *dev, static int s3c2416_irq_add(struct device *dev,
struct subsys_interface *sif) struct subsys_interface *sif)
{ {
printk(KERN_INFO "S3C2416: IRQ Support\n"); printk(KERN_INFO "S3C2416: IRQ Support\n");
......
...@@ -222,7 +222,7 @@ static struct irq_chip s3c2443_irq_cam = { ...@@ -222,7 +222,7 @@ static struct irq_chip s3c2443_irq_cam = {
/* IRQ initialisation code */ /* IRQ initialisation code */
static int __init s3c2443_add_sub(unsigned int base, static int s3c2443_add_sub(unsigned int base,
void (*demux)(unsigned int, void (*demux)(unsigned int,
struct irq_desc *), struct irq_desc *),
struct irq_chip *chip, struct irq_chip *chip,
...@@ -241,7 +241,7 @@ static int __init s3c2443_add_sub(unsigned int base, ...@@ -241,7 +241,7 @@ static int __init s3c2443_add_sub(unsigned int base,
return 0; return 0;
} }
static int __init s3c2443_irq_add(struct device *dev, static int s3c2443_irq_add(struct device *dev,
struct subsys_interface *sif) struct subsys_interface *sif)
{ {
printk("S3C2443: IRQ Support\n"); printk("S3C2443: IRQ Support\n");
......
...@@ -104,7 +104,7 @@ static struct s3c2410_hcd_info usb_simtec_info __initdata = { ...@@ -104,7 +104,7 @@ static struct s3c2410_hcd_info usb_simtec_info __initdata = {
}; };
int usb_simtec_init(void) int __init usb_simtec_init(void)
{ {
int ret; int ret;
......
...@@ -388,7 +388,7 @@ static void __init map_sa1100_gpio_regs( void ) ...@@ -388,7 +388,7 @@ static void __init map_sa1100_gpio_regs( void )
*/ */
static void __init get_assabet_scr(void) static void __init get_assabet_scr(void)
{ {
unsigned long scr, i; unsigned long uninitialized_var(scr), i;
GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */
GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
......
...@@ -41,7 +41,7 @@ static struct hw_pci shark_pci __initdata = { ...@@ -41,7 +41,7 @@ static struct hw_pci shark_pci __initdata = {
static int __init shark_pci_init(void) static int __init shark_pci_init(void)
{ {
if (!machine_is_shark()) if (!machine_is_shark())
return; return -ENODEV;
pcibios_min_io = 0x6000; pcibios_min_io = 0x6000;
pcibios_min_mem = 0x50000000; pcibios_min_mem = 0x50000000;
......
...@@ -100,7 +100,7 @@ static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; } ...@@ -100,7 +100,7 @@ static inline int shmobile_cpu_is_dead(unsigned int cpu) { return 1; }
extern void shmobile_smp_init_cpus(unsigned int ncores); extern void shmobile_smp_init_cpus(unsigned int ncores);
static inline void shmobile_init_late(void) static inline void __init shmobile_init_late(void)
{ {
shmobile_suspend_init(); shmobile_suspend_init();
shmobile_cpuidle_init(); shmobile_cpuidle_init();
......
...@@ -16,7 +16,7 @@ config ARCH_TEGRA_2x_SOC ...@@ -16,7 +16,7 @@ config ARCH_TEGRA_2x_SOC
select ARM_ERRATA_742230 select ARM_ERRATA_742230
select ARM_ERRATA_751472 select ARM_ERRATA_751472
select ARM_ERRATA_754327 select ARM_ERRATA_754327
select ARM_ERRATA_764369 select ARM_ERRATA_764369 if SMP
select PL310_ERRATA_727915 if CACHE_L2X0 select PL310_ERRATA_727915 if CACHE_L2X0
select PL310_ERRATA_769419 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0
select CPU_FREQ_TABLE if CPU_FREQ select CPU_FREQ_TABLE if CPU_FREQ
...@@ -37,7 +37,7 @@ config ARCH_TEGRA_3x_SOC ...@@ -37,7 +37,7 @@ config ARCH_TEGRA_3x_SOC
select ARM_ERRATA_743622 select ARM_ERRATA_743622
select ARM_ERRATA_751472 select ARM_ERRATA_751472
select ARM_ERRATA_754322 select ARM_ERRATA_754322
select ARM_ERRATA_764369 select ARM_ERRATA_764369 if SMP
select PL310_ERRATA_769419 if CACHE_L2X0 select PL310_ERRATA_769419 if CACHE_L2X0
select CPU_FREQ_TABLE if CPU_FREQ select CPU_FREQ_TABLE if CPU_FREQ
help help
...@@ -57,8 +57,6 @@ config TEGRA_AHB ...@@ -57,8 +57,6 @@ config TEGRA_AHB
which controls AHB bus master arbitration and some which controls AHB bus master arbitration and some
perfomance parameters(priority, prefech size). perfomance parameters(priority, prefech size).
comment "Tegra board type"
choice choice
prompt "Default low-level debug console UART" prompt "Default low-level debug console UART"
default TEGRA_DEBUG_UART_NONE default TEGRA_DEBUG_UART_NONE
......
...@@ -5,9 +5,9 @@ config UX500_SOC_COMMON ...@@ -5,9 +5,9 @@ config UX500_SOC_COMMON
default y default y
select ARM_GIC select ARM_GIC
select HAS_MTU select HAS_MTU
select PL310_ERRATA_753970 select PL310_ERRATA_753970 if CACHE_PL310
select ARM_ERRATA_754322 select ARM_ERRATA_754322
select ARM_ERRATA_764369 select ARM_ERRATA_764369 if SMP
select CACHE_L2X0 select CACHE_L2X0
select PINCTRL select PINCTRL
select PINCTRL_NOMADIK select PINCTRL_NOMADIK
......
...@@ -15,15 +15,15 @@ ...@@ -15,15 +15,15 @@
* *
*/ */
#define UART0_PHYS 0xd8200000 #define UART0_PHYS 0xd8200000
#include <asm/io.h> #define UART0_ADDR(x) *(volatile unsigned char *)(UART0_PHYS + x)
static void putc(const char c) static void putc(const char c)
{ {
while (readb(UART0_PHYS + 0x1c) & 0x2) while (UART0_ADDR(0x1c) & 0x2)
/* Tx busy, wait and poll */; /* Tx busy, wait and poll */;
writeb(c, UART0_PHYS); UART0_ADDR(0) = c;
} }
static void flush(void) static void flush(void)
......
...@@ -77,8 +77,11 @@ static void vt8500_power_off(void) ...@@ -77,8 +77,11 @@ static void vt8500_power_off(void)
void __init vt8500_init(void) void __init vt8500_init(void)
{ {
struct device_node *np, *fb; struct device_node *np;
#if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
struct device_node *fb;
void __iomem *gpio_base; void __iomem *gpio_base;
#endif
#ifdef CONFIG_FB_VT8500 #ifdef CONFIG_FB_VT8500
fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb"); fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
......
...@@ -43,11 +43,13 @@ config OMAP_DEBUG_DEVICES ...@@ -43,11 +43,13 @@ config OMAP_DEBUG_DEVICES
config OMAP_DEBUG_LEDS config OMAP_DEBUG_LEDS
def_bool y if NEW_LEDS def_bool y if NEW_LEDS
select LEDS_CLASS
depends on OMAP_DEBUG_DEVICES depends on OMAP_DEBUG_DEVICES
config POWER_AVS_OMAP config POWER_AVS_OMAP
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2" bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
depends on POWER_AVS && (ARCH_OMAP3 || ARCH_OMAP4) && PM depends on POWER_AVS && (ARCH_OMAP3 || ARCH_OMAP4) && PM
select POWER_SUPPLY
help help
Say Y to enable AVS(Adaptive Voltage Scaling) Say Y to enable AVS(Adaptive Voltage Scaling)
support on OMAP containing the version 1 or support on OMAP containing the version 1 or
......
...@@ -52,22 +52,29 @@ static u32 notrace omap_32k_read_sched_clock(void) ...@@ -52,22 +52,29 @@ static u32 notrace omap_32k_read_sched_clock(void)
* nsecs and adds to a monotonically increasing timespec. * nsecs and adds to a monotonically increasing timespec.
*/ */
static struct timespec persistent_ts; static struct timespec persistent_ts;
static cycles_t cycles, last_cycles; static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift; static unsigned int persistent_mult, persistent_shift;
static DEFINE_SPINLOCK(read_persistent_clock_lock);
static void omap_read_persistent_clock(struct timespec *ts) static void omap_read_persistent_clock(struct timespec *ts)
{ {
unsigned long long nsecs; unsigned long long nsecs;
cycles_t delta; cycles_t last_cycles;
struct timespec *tsp = &persistent_ts; unsigned long flags;
spin_lock_irqsave(&read_persistent_clock_lock, flags);
last_cycles = cycles; last_cycles = cycles;
cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0; cycles = sync32k_cnt_reg ? __raw_readl(sync32k_cnt_reg) : 0;
delta = cycles - last_cycles;
nsecs = clocksource_cyc2ns(delta, persistent_mult, persistent_shift); nsecs = clocksource_cyc2ns(cycles - last_cycles,
persistent_mult, persistent_shift);
timespec_add_ns(&persistent_ts, nsecs);
*ts = persistent_ts;
timespec_add_ns(tsp, nsecs); spin_unlock_irqrestore(&read_persistent_clock_lock, flags);
*ts = *tsp;
} }
/** /**
......
...@@ -38,7 +38,7 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t) ...@@ -38,7 +38,7 @@ int omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t)
if (!dev || t < -1) { if (!dev || t < -1) {
WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
return -EINVAL; return -EINVAL;
}; }
if (t == -1) if (t == -1)
pr_debug("OMAP PM: remove max MPU wakeup latency constraint: dev %s\n", pr_debug("OMAP PM: remove max MPU wakeup latency constraint: dev %s\n",
...@@ -67,7 +67,7 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r) ...@@ -67,7 +67,7 @@ int omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r)
agent_id != OCP_TARGET_AGENT)) { agent_id != OCP_TARGET_AGENT)) {
WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
return -EINVAL; return -EINVAL;
}; }
if (r == 0) if (r == 0)
pr_debug("OMAP PM: remove min bus tput constraint: dev %s for agent_id %d\n", pr_debug("OMAP PM: remove min bus tput constraint: dev %s for agent_id %d\n",
...@@ -93,7 +93,7 @@ int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev, ...@@ -93,7 +93,7 @@ int omap_pm_set_max_dev_wakeup_lat(struct device *req_dev, struct device *dev,
if (!req_dev || !dev || t < -1) { if (!req_dev || !dev || t < -1) {
WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
return -EINVAL; return -EINVAL;
}; }
if (t == -1) if (t == -1)
pr_debug("OMAP PM: remove max device latency constraint: dev %s\n", pr_debug("OMAP PM: remove max device latency constraint: dev %s\n",
...@@ -123,7 +123,7 @@ int omap_pm_set_max_sdma_lat(struct device *dev, long t) ...@@ -123,7 +123,7 @@ int omap_pm_set_max_sdma_lat(struct device *dev, long t)
if (!dev || t < -1) { if (!dev || t < -1) {
WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__); WARN(1, "OMAP PM: %s: invalid parameter(s)", __func__);
return -EINVAL; return -EINVAL;
}; }
if (t == -1) if (t == -1)
pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n", pr_debug("OMAP PM: remove max DMA latency constraint: dev %s\n",
......
...@@ -725,7 +725,7 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name, int p ...@@ -725,7 +725,7 @@ struct platform_device __init *omap_device_build_ss(const char *pdev_name, int p
dev_set_name(&pdev->dev, "%s", pdev->name); dev_set_name(&pdev->dev, "%s", pdev->name);
od = omap_device_alloc(pdev, ohs, oh_cnt, pm_lats, pm_lats_cnt); od = omap_device_alloc(pdev, ohs, oh_cnt, pm_lats, pm_lats_cnt);
if (!od) if (IS_ERR(od))
goto odbs_exit1; goto odbs_exit1;
ret = platform_device_add_data(pdev, pdata, pdata_len); ret = platform_device_add_data(pdev, pdata, pdata_len);
......
...@@ -74,21 +74,21 @@ static inline void netwinder_ds1620_reset(void) ...@@ -74,21 +74,21 @@ static inline void netwinder_ds1620_reset(void)
static inline void netwinder_lock(unsigned long *flags) static inline void netwinder_lock(unsigned long *flags)
{ {
spin_lock_irqsave(&nw_gpio_lock, *flags); raw_spin_lock_irqsave(&nw_gpio_lock, *flags);
} }
static inline void netwinder_unlock(unsigned long *flags) static inline void netwinder_unlock(unsigned long *flags)
{ {
spin_unlock_irqrestore(&nw_gpio_lock, *flags); raw_spin_unlock_irqrestore(&nw_gpio_lock, *flags);
} }
static inline void netwinder_set_fan(int i) static inline void netwinder_set_fan(int i)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&nw_gpio_lock, flags); raw_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0); nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
spin_unlock_irqrestore(&nw_gpio_lock, flags); raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
static inline int netwinder_get_fan(void) static inline int netwinder_get_fan(void)
......
...@@ -583,9 +583,9 @@ static void kick_open(void) ...@@ -583,9 +583,9 @@ static void kick_open(void)
* we want to write a bit pattern XXX1 to Xilinx to enable * we want to write a bit pattern XXX1 to Xilinx to enable
* the write gate, which will be open for about the next 2ms. * the write gate, which will be open for about the next 2ms.
*/ */
spin_lock_irqsave(&nw_gpio_lock, flags); raw_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE); nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
spin_unlock_irqrestore(&nw_gpio_lock, flags); raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
/* /*
* let the ISA bus to catch on... * let the ISA bus to catch on...
......
...@@ -30,20 +30,12 @@ ...@@ -30,20 +30,12 @@
#include <asm/smp_plat.h> #include <asm/smp_plat.h>
#include <asm/cpu.h> #include <asm/cpu.h>
#include <plat/clock.h>
#include <plat/omap-pm.h>
#include <plat/common.h>
#include <plat/omap_device.h>
#include <mach/hardware.h>
/* OPP tolerance in percentage */ /* OPP tolerance in percentage */
#define OPP_TOLERANCE 4 #define OPP_TOLERANCE 4
static struct cpufreq_frequency_table *freq_table; static struct cpufreq_frequency_table *freq_table;
static atomic_t freq_table_users = ATOMIC_INIT(0); static atomic_t freq_table_users = ATOMIC_INIT(0);
static struct clk *mpu_clk; static struct clk *mpu_clk;
static char *mpu_clk_name;
static struct device *mpu_dev; static struct device *mpu_dev;
static struct regulator *mpu_reg; static struct regulator *mpu_reg;
...@@ -108,6 +100,14 @@ static int omap_target(struct cpufreq_policy *policy, ...@@ -108,6 +100,14 @@ static int omap_target(struct cpufreq_policy *policy,
} }
freq = freqs.new * 1000; freq = freqs.new * 1000;
ret = clk_round_rate(mpu_clk, freq);
if (IS_ERR_VALUE(ret)) {
dev_warn(mpu_dev,
"CPUfreq: Cannot find matching frequency for %lu\n",
freq);
return ret;
}
freq = ret;
if (mpu_reg) { if (mpu_reg) {
opp = opp_find_freq_ceil(mpu_dev, &freq); opp = opp_find_freq_ceil(mpu_dev, &freq);
...@@ -172,7 +172,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) ...@@ -172,7 +172,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy)
{ {
int result = 0; int result = 0;
mpu_clk = clk_get(NULL, mpu_clk_name); mpu_clk = clk_get(NULL, "cpufreq_ck");
if (IS_ERR(mpu_clk)) if (IS_ERR(mpu_clk))
return PTR_ERR(mpu_clk); return PTR_ERR(mpu_clk);
...@@ -253,22 +253,10 @@ static struct cpufreq_driver omap_driver = { ...@@ -253,22 +253,10 @@ static struct cpufreq_driver omap_driver = {
static int __init omap_cpufreq_init(void) static int __init omap_cpufreq_init(void)
{ {
if (cpu_is_omap24xx()) mpu_dev = get_cpu_device(0);
mpu_clk_name = "virt_prcm_set"; if (!mpu_dev) {
else if (cpu_is_omap34xx())
mpu_clk_name = "dpll1_ck";
else if (cpu_is_omap44xx())
mpu_clk_name = "dpll_mpu_ck";
if (!mpu_clk_name) {
pr_err("%s: unsupported Silicon?\n", __func__);
return -EINVAL;
}
mpu_dev = omap_device_get_by_hwmod_name("mpu");
if (IS_ERR(mpu_dev)) {
pr_warning("%s: unable to get the mpu device\n", __func__); pr_warning("%s: unable to get the mpu device\n", __func__);
return PTR_ERR(mpu_dev); return -EINVAL;
} }
mpu_reg = regulator_get(mpu_dev, "vcc"); mpu_reg = regulator_get(mpu_dev, "vcc");
......
...@@ -27,7 +27,6 @@ ...@@ -27,7 +27,6 @@
#include <asm/gpio.h> #include <asm/gpio.h>
#include <mach/gpio-tegra.h>
#include <linux/platform_data/mmc-sdhci-tegra.h> #include <linux/platform_data/mmc-sdhci-tegra.h>
#include "sdhci-pltfm.h" #include "sdhci-pltfm.h"
......
...@@ -930,7 +930,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) ...@@ -930,7 +930,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
if (!sr_info->base) { if (!sr_info->base) {
dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); dev_err(&pdev->dev, "%s: ioremap fail\n", __func__);
ret = -ENOMEM; ret = -ENOMEM;
goto err_release_region; goto err_free_name;
} }
if (irq) if (irq)
...@@ -969,7 +969,7 @@ static int __init omap_sr_probe(struct platform_device *pdev) ...@@ -969,7 +969,7 @@ static int __init omap_sr_probe(struct platform_device *pdev)
dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n",
__func__); __func__);
ret = PTR_ERR(sr_info->dbg_dir); ret = PTR_ERR(sr_info->dbg_dir);
goto err_free_name; goto err_debugfs;
} }
(void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR,
...@@ -1013,11 +1013,11 @@ static int __init omap_sr_probe(struct platform_device *pdev) ...@@ -1013,11 +1013,11 @@ static int __init omap_sr_probe(struct platform_device *pdev)
err_debugfs: err_debugfs:
debugfs_remove_recursive(sr_info->dbg_dir); debugfs_remove_recursive(sr_info->dbg_dir);
err_free_name:
kfree(sr_info->name);
err_iounmap: err_iounmap:
list_del(&sr_info->node); list_del(&sr_info->node);
iounmap(sr_info->base); iounmap(sr_info->base);
err_free_name:
kfree(sr_info->name);
err_release_region: err_release_region:
release_mem_region(mem->start, resource_size(mem)); release_mem_region(mem->start, resource_size(mem));
err_free_devinfo: err_free_devinfo:
......
...@@ -1482,9 +1482,9 @@ vnc_mute_spkr(wavnc_info *devc) ...@@ -1482,9 +1482,9 @@ vnc_mute_spkr(wavnc_info *devc)
{ {
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&nw_gpio_lock, flags); raw_spin_lock_irqsave(&nw_gpio_lock, flags);
nw_cpld_modify(CPLD_UNMUTE, devc->spkr_mute_state ? 0 : CPLD_UNMUTE); nw_cpld_modify(CPLD_UNMUTE, devc->spkr_mute_state ? 0 : CPLD_UNMUTE);
spin_unlock_irqrestore(&nw_gpio_lock, flags); raw_spin_unlock_irqrestore(&nw_gpio_lock, flags);
} }
static void static void
......
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