Merge samba.org:/scratch/anton/linux-2.5

into samba.org:/scratch/anton/sfr

arch/ppc64/boot/main.c

@@ -12,12 +12,11 @@
 #include "ppc32-types.h"
 #include "zlib.h"
 #include <linux/elf.h>
+#include <linux/string.h>
 #include <asm/processor.h>
 #include <asm/page.h>
 #include <asm/bootinfo.h>
 
-void memmove(void *dst, void *im, int len);
-
 extern void *finddevice(const char *);
 extern int getprop(void *, const char *, void *, int);
 extern void printk(char *fmt, ...);

arch/ppc64/kernel/chrp_setup.c

@@ -72,6 +72,7 @@ extern void init_ras_IRQ(void);
 
 extern void find_and_init_phbs(void);
 extern void pSeries_pcibios_fixup(void);
+extern void pSeries_pcibios_fixup_bus(struct pci_bus *bus);
 extern void iSeries_pcibios_fixup(void);
 
 extern void pSeries_get_rtc_time(struct rtc_time *rtc_time);
@@ -245,6 +246,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
 
  	#ifndef CONFIG_PPC_ISERIES
  		ppc_md.pcibios_fixup = pSeries_pcibios_fixup;
+ 		ppc_md.pcibios_fixup_bus = pSeries_pcibios_fixup_bus;
  	#else 
  		ppc_md.pcibios_fixup = NULL;
  		// ppc_md.pcibios_fixup = iSeries_pcibios_fixup;

arch/ppc64/kernel/eeh.c

@@ -26,6 +26,7 @@
 #include <linux/pci.h>
 #include <linux/proc_fs.h>
 #include <linux/bootmem.h>
+#include <linux/mm.h>
 #include <asm/paca.h>
 #include <asm/processor.h>
 #include <asm/naca.h>

arch/ppc64/kernel/entry.S

@@ -344,8 +344,8 @@ irq_recheck:
 recheck:
 	mfmsr	r10		/* Get current interrupt state */
 	li	r4,0
-	ori	r4,r4,MSR_EE|MSR_RI
-	andc	r10,r10,r4	/* clear MSR_EE and MSR_RI */
+	ori	r4,r4,MSR_EE
+	andc	r10,r10,r4	/* clear MSR_EE */
 	mtmsrd	r10,1		/* Update machine state */
 
 #ifdef CONFIG_PPC_ISERIES
@@ -396,7 +396,7 @@ restore:
 	mfmsr	r0
 	li	r2, MSR_RI
 	andc	r0,r0,r2
-	mtmsrd	r0
+	mtmsrd	r0,1
 
 	ld	r0,_MSR(r1)
 	mtspr	SRR1,r0
@@ -422,7 +422,7 @@ restore:
 /* Note: this must change if we start using the  TIF_NOTIFY_RESUME bit */
 do_work:
 	/* Enable interrupts */
-	ori	r10,r10,MSR_EE|MSR_RI
+	ori	r10,r10,MSR_EE
 	mtmsrd	r10,1
 
 	andi.	r0,r3,_TIF_NEED_RESCHED

arch/ppc64/kernel/head.S

@@ -562,7 +562,7 @@ fast_exception_return:
 	mfmsr	r20
 	li	r21, MSR_RI
 	andc	r20,r20,r21
-	mtmsrd	r20
+	mtmsrd	r20,1
 
 	mtspr   SRR1,r23
 	mtspr   SRR0,r22
@@ -989,7 +989,7 @@ _GLOBAL(do_stab_bolted)
 	mfmsr	r22
 	li	r23, MSR_RI
 	andc	r22,r22,r23
-	mtmsrd	r22
+	mtmsrd	r22,1
 
 	ld	r22,EX_SRR0(r21)	/* Get SRR0 from exc. frame */
 	ld	r23,EX_SRR1(r21)	/* Get SRR1 from exc. frame */
@@ -1094,7 +1094,7 @@ SLB_NUM_ENTRIES = 64
 	mfmsr	r22
 	li	r23, MSR_RI
 	andc	r22,r22,r23
-	mtmsrd	r22
+	mtmsrd	r22,1
 
 	ld	r22,EX_SRR0(r21)	/* Get SRR0 from exc. frame */
 	ld	r23,EX_SRR1(r21)	/* Get SRR1 from exc. frame */

arch/ppc64/kernel/irq.c

@@ -394,81 +394,6 @@ handle_irq_event(int irq, struct pt_regs *regs, struct irqaction *action)
 	local_irq_disable();
 }
 
-#ifdef CONFIG_SMP
-extern unsigned long irq_affinity [NR_IRQS];
-
-typedef struct {
-	unsigned long cpu;
-	unsigned long timestamp;
-} ____cacheline_aligned irq_balance_t;
-
-static irq_balance_t irq_balance[NR_IRQS] __cacheline_aligned
-			= { [ 0 ... NR_IRQS-1 ] = { 0, 0 } };
-
-#define IDLE_ENOUGH(cpu,now) \
-		(idle_cpu(cpu) && ((now) - irq_stat[(cpu)].idle_timestamp > 1))
-
-#define IRQ_ALLOWED(cpu,allowed_mask) \
-		((1UL << cpu) & (allowed_mask))
-
-#define IRQ_BALANCE_INTERVAL (HZ/50)
-
-static unsigned long move(unsigned long curr_cpu, unsigned long allowed_mask,
-			  unsigned long now, int direction)
-{
-	int search_idle = 1;
-	int cpu = curr_cpu;
-
-	goto inside;
-
-	do {
-		if (unlikely(cpu == curr_cpu))
-			search_idle = 0;
-inside:
-		if (direction == 1) {
-			cpu++;
-			if (cpu >= NR_CPUS)
-				cpu = 0;
-		} else {
-			cpu--;
-			if (cpu == -1)
-				cpu = NR_CPUS-1;
-		}
-	} while (!cpu_online(cpu) || !IRQ_ALLOWED(cpu,allowed_mask) ||
-			(search_idle && !IDLE_ENOUGH(cpu,now)));
-
-	return cpu;
-}
-
-static inline void balance_irq(int irq)
-{
-	irq_balance_t *entry = irq_balance + irq;
-	unsigned long now = jiffies;
-
-	if (unlikely(time_after(now, entry->timestamp + IRQ_BALANCE_INTERVAL))) {
-		unsigned long allowed_mask;
-		unsigned int new_cpu;
-		unsigned long random_number;
-
-		if (!irq_desc[irq].handler->set_affinity)
-			return;
-
-		random_number = mftb();
-		random_number &= 1;
-
-		allowed_mask = cpu_online_map & irq_affinity[irq];
-		entry->timestamp = now;
-		new_cpu = move(entry->cpu, allowed_mask, now, random_number);
-		if (entry->cpu != new_cpu) {
-			entry->cpu = new_cpu;
-			irq_desc[irq].handler->set_affinity(irq, 1UL << new_cpu);
-		}
-	}
-}
-#else
-#define balance_irq(irq) do { } while (0)
-#endif
-
 /*
  * Eventually, this should take an array of interrupts and an array size
  * so it can dispatch multiple interrupts.
@@ -480,10 +405,6 @@ void ppc_irq_dispatch_handler(struct pt_regs *regs, int irq)
 	int cpu = smp_processor_id();
 	irq_desc_t *desc = irq_desc + irq;
 
-	/* XXX This causes bad performance and lockups on XICS - Anton */
-	if (naca->interrupt_controller == IC_OPEN_PIC)
-		balance_irq(irq);
-
 	kstat_cpu(cpu).irqs[irq]++;
 	spin_lock(&desc->lock);
 	ack_irq(irq);	

arch/ppc64/kernel/pci.c

@@ -49,7 +49,6 @@ static void fixup_windbond_82c105(struct pci_dev* dev);
 void fixup_resources(struct pci_dev* dev);
 
 void   iSeries_pcibios_init(void);
-void   pSeries_pcibios_init(void);
 
 struct pci_controller* hose_head;
 struct pci_controller** hose_tail = &hose_head;
@@ -363,16 +362,33 @@ pcibios_assign_resources(void)
  * Allocate pci_controller(phb) initialized common variables. 
  */
 struct pci_controller * __init
-pci_alloc_pci_controller(char *model, enum phb_types controller_type)
+pci_alloc_pci_controller(enum phb_types controller_type)
 {
         struct pci_controller *hose;
-        PPCDBG(PPCDBG_PHBINIT, "PCI: Allocate pci_controller for %s\n",model);
+	char *model;
+
         hose = (struct pci_controller *)alloc_bootmem(sizeof(struct pci_controller));
         if(hose == NULL) {
                 printk(KERN_ERR "PCI: Allocate pci_controller failed.\n");
                 return NULL;
         }
         memset(hose, 0, sizeof(struct pci_controller));
+
+	switch(controller_type) {
+	case phb_type_python:
+		model = "PHB PY";
+		break;
+	case phb_type_speedwagon:
+		model = "PHB SW";
+		break;
+	case phb_type_winnipeg:
+		model = "PHB WP";
+		break;
+	default:
+		model = "PHB UK";
+		break;
+	}
+
         if(strlen(model) < 8)
 		strcpy(hose->what,model);
         else
@@ -393,9 +409,7 @@ pcibios_init(void)
 	struct pci_bus *bus;
 	int next_busno;
 
-#ifndef CONFIG_PPC_ISERIES
-	pSeries_pcibios_init();
-#else
+#ifdef CONFIG_PPC_ISERIES
 	iSeries_pcibios_init(); 
 #endif
 
@@ -450,54 +464,7 @@ subsys_initcall(pcibios_init);
 
 void __init pcibios_fixup_bus(struct pci_bus *bus)
 {
-#ifndef CONFIG_PPC_ISERIES
-	struct pci_controller *phb = PCI_GET_PHB_PTR(bus);
-	struct resource *res;
-	int i;
-
-	if (bus->parent == NULL) {
-		/* This is a host bridge - fill in its resources */
-		phb->bus = bus;
-		bus->resource[0] = res = &phb->io_resource;
-		if (!res->flags)
-			BUG();	/* No I/O resource for this PHB? */
-
-		for (i = 0; i < 3; ++i) {
-			res = &phb->mem_resources[i];
-			if (!res->flags) {
-				if (i == 0)
-					BUG();	/* No memory resource for this PHB? */
-			}
-			bus->resource[i+1] = res;
-		}
-	} else {
-		/* This is a subordinate bridge */
-		pci_read_bridge_bases(bus);
-
-		for (i = 0; i < 4; ++i) {
-			if ((res = bus->resource[i]) == NULL)
-				continue;
-			if (!res->flags)
-				continue;
-			if (res == pci_find_parent_resource(bus->self, res)) {
-				/* Transparent resource -- don't try to "fix" it. */
-				continue;
-			}
-			if (res->flags & IORESOURCE_IO) {
-				unsigned long offset = (unsigned long)phb->io_base_virt - pci_io_base;
-				res->start += offset;
-				res->end += offset;
-			} else if (phb->pci_mem_offset
-				   && (res->flags & IORESOURCE_MEM)) {
-				if (res->start < phb->pci_mem_offset) {
-					res->start += phb->pci_mem_offset;
-					res->end += phb->pci_mem_offset;
-				}
-			}
-		}
-	}
-#endif	
-	if ( ppc_md.pcibios_fixup_bus )
+	if (ppc_md.pcibios_fixup_bus)
 		ppc_md.pcibios_fixup_bus(bus);
 }
 

arch/ppc64/kernel/pci.h

@@ -14,7 +14,7 @@
 
 extern unsigned long isa_io_base;
 
-extern struct pci_controller* pci_alloc_pci_controller(char *model, enum phb_types controller_type);
+extern struct pci_controller* pci_alloc_pci_controller(enum phb_types controller_type);
 extern struct pci_controller* pci_find_hose_for_OF_device(struct device_node* node);
 
 extern struct pci_controller* hose_head;

arch/ppc64/kernel/prom.c

@@ -2040,11 +2040,11 @@ prom_bi_rec_verify(struct bi_record *bi_recs)
 	if ( bi_recs == NULL || bi_recs->tag != BI_FIRST )
 		return NULL;
 
-	last = (struct bi_record *)bi_recs->data[0];
+	last = (struct bi_record *)(long)bi_recs->data[0];
 	if ( last == NULL || last->tag != BI_LAST )
 		return NULL;
 
-	first = (struct bi_record *)last->data[0];
+	first = (struct bi_record *)(long)last->data[0];
 	if ( first == NULL || first != bi_recs )
 		return NULL;
 

include/asm-ppc64/pci-bridge.h

@@ -20,7 +20,8 @@ enum phb_types {
 	phb_type_unknown    = 0x0,
 	phb_type_hypervisor = 0x1,
 	phb_type_python     = 0x10,
-	phb_type_speedwagon = 0x11
+	phb_type_speedwagon = 0x11,
+	phb_type_winnipeg   = 0x12
 };
 
 /*