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Commit e05d1be9 authored by Radoslav Tsvetkov's avatar Radoslav Tsvetkov Committed by Hans Verkuil
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media: qcom: camss: Attach formats to CSIPHY resources 

Following the example of VFE and CSID, attach the CSIPHY
formats to the subdevices resources.
Signed-off-by: default avatarRadoslav Tsvetkov <quic_rtsvetko@quicinc.com>
Signed-off-by: default avatarGjorgji Rosikopulos <quic_grosikop@quicinc.com>
Reviewed-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # sc8280xp/sm8250/sdm845/apq8016
Acked-by: default avatarBryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
parent 57cf33cc
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Showing with 85 additions and 58 deletions
drivers/media/platform/qcom/camss/camss-csiphy.c
View file @ e05d1be9
......@@ -24,12 +24,7 @@
#define MSM_CSIPHY_NAME "msm_csiphy"
struct csiphy_format {
u32 code;
u8 bpp;
};
static const struct csiphy_format csiphy_formats_8x16[] = {
static const struct csiphy_format_info formats_8x16[] = {
{ MEDIA_BUS_FMT_UYVY8_1X16, 8 },
{ MEDIA_BUS_FMT_VYUY8_1X16, 8 },
{ MEDIA_BUS_FMT_YUYV8_1X16, 8 },
......@@ -49,7 +44,7 @@ static const struct csiphy_format csiphy_formats_8x16[] = {
{ MEDIA_BUS_FMT_Y10_1X10, 10 },
};
static const struct csiphy_format csiphy_formats_8x96[] = {
static const struct csiphy_format_info formats_8x96[] = {
{ MEDIA_BUS_FMT_UYVY8_1X16, 8 },
{ MEDIA_BUS_FMT_VYUY8_1X16, 8 },
{ MEDIA_BUS_FMT_YUYV8_1X16, 8 },
......@@ -73,7 +68,7 @@ static const struct csiphy_format csiphy_formats_8x96[] = {
{ MEDIA_BUS_FMT_Y10_1X10, 10 },
};
static const struct csiphy_format csiphy_formats_sdm845[] = {
static const struct csiphy_format_info formats_sdm845[] = {
{ MEDIA_BUS_FMT_UYVY8_1X16, 8 },
{ MEDIA_BUS_FMT_VYUY8_1X16, 8 },
{ MEDIA_BUS_FMT_YUYV8_1X16, 8 },
......@@ -98,6 +93,21 @@ static const struct csiphy_format csiphy_formats_sdm845[] = {
{ MEDIA_BUS_FMT_Y10_1X10, 10 },
};
const struct csiphy_formats csiphy_formats_8x16 = {
.nformats = ARRAY_SIZE(formats_8x16),
.formats = formats_8x16
};
const struct csiphy_formats csiphy_formats_8x96 = {
.nformats = ARRAY_SIZE(formats_8x96),
.formats = formats_8x96
};
const struct csiphy_formats csiphy_formats_sdm845 = {
.nformats = ARRAY_SIZE(formats_sdm845),
.formats = formats_sdm845
};
/*
* csiphy_get_bpp - map media bus format to bits per pixel
* @formats: supported media bus formats array
......@@ -106,7 +116,7 @@ static const struct csiphy_format csiphy_formats_sdm845[] = {
*
* Return number of bits per pixel
*/
static u8 csiphy_get_bpp(const struct csiphy_format *formats,
static u8 csiphy_get_bpp(const struct csiphy_format_info *formats,
unsigned int nformats, u32 code)
{
unsigned int i;
......@@ -131,7 +141,7 @@ static int csiphy_set_clock_rates(struct csiphy_device *csiphy)
int i, j;
int ret;
u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats,
u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats,
csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
......@@ -244,7 +254,7 @@ static int csiphy_stream_on(struct csiphy_device *csiphy)
struct csiphy_config *cfg = &csiphy->cfg;
s64 link_freq;
u8 lane_mask = csiphy->res->hw_ops->get_lane_mask(&cfg->csi2->lane_cfg);
u8 bpp = csiphy_get_bpp(csiphy->formats, csiphy->nformats,
u8 bpp = csiphy_get_bpp(csiphy->res->formats->formats, csiphy->res->formats->nformats,
csiphy->fmt[MSM_CSIPHY_PAD_SINK].code);
u8 num_lanes = csiphy->cfg.csi2->lane_cfg.num_data;
u8 val;
......@@ -350,12 +360,12 @@ static void csiphy_try_format(struct csiphy_device *csiphy,
case MSM_CSIPHY_PAD_SINK:
/* Set format on sink pad */
for (i = 0; i < csiphy->nformats; i++)
if (fmt->code == csiphy->formats[i].code)
for (i = 0; i < csiphy->res->formats->nformats; i++)
if (fmt->code == csiphy->res->formats->formats[i].code)
break;
/* If not found, use UYVY as default */
if (i >= csiphy->nformats)
if (i >= csiphy->res->formats->nformats)
fmt->code = MEDIA_BUS_FMT_UYVY8_1X16;
fmt->width = clamp_t(u32, fmt->width, 1, 8191);
......@@ -392,10 +402,10 @@ static int csiphy_enum_mbus_code(struct v4l2_subdev *sd,
struct v4l2_mbus_framefmt *format;
if (code->pad == MSM_CSIPHY_PAD_SINK) {
if (code->index >= csiphy->nformats)
if (code->index >= csiphy->res->formats->nformats)
return -EINVAL;
code->code = csiphy->formats[code->index].code;
code->code = csiphy->res->formats->formats[code->index].code;
} else {
if (code->index > 0)
return -EINVAL;
......@@ -566,24 +576,6 @@ int msm_csiphy_subdev_init(struct camss *camss,
csiphy->cfg.combo_mode = 0;
csiphy->res = &res->csiphy;
switch (camss->res->version) {
case CAMSS_8x16:
csiphy->formats = csiphy_formats_8x16;
csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x16);
break;
case CAMSS_8x96:
case CAMSS_660:
csiphy->formats = csiphy_formats_8x96;
csiphy->nformats = ARRAY_SIZE(csiphy_formats_8x96);
break;
case CAMSS_845:
case CAMSS_8250:
case CAMSS_8280XP:
csiphy->formats = csiphy_formats_sdm845;
csiphy->nformats = ARRAY_SIZE(csiphy_formats_sdm845);
break;
}
/* Memory */
csiphy->base = devm_platform_ioremap_resource_byname(pdev, res->reg[0]);
......
drivers/media/platform/qcom/camss/camss-csiphy.h
View file @ e05d1be9
......@@ -42,6 +42,16 @@ struct csiphy_config {
struct csiphy_csi2_cfg *csi2;
};
struct csiphy_format_info {
u32 code;
u8 bpp;
};
struct csiphy_formats {
unsigned int nformats;
const struct csiphy_format_info *formats;
};
struct csiphy_device;
struct csiphy_hw_ops {
......@@ -65,6 +75,7 @@ struct csiphy_hw_ops {
struct csiphy_subdev_resources {
const struct csiphy_hw_ops *hw_ops;
const struct csiphy_formats *formats;
};
struct csiphy_device {
......@@ -83,8 +94,6 @@ struct csiphy_device {
struct csiphy_config cfg;
struct v4l2_mbus_framefmt fmt[MSM_CSIPHY_PADS_NUM];
const struct csiphy_subdev_resources *res;
const struct csiphy_format *formats;
unsigned int nformats;
};
struct camss_subdev_resources;
......@@ -98,6 +107,10 @@ int msm_csiphy_register_entity(struct csiphy_device *csiphy,
void msm_csiphy_unregister_entity(struct csiphy_device *csiphy);
extern const struct csiphy_formats csiphy_formats_8x16;
extern const struct csiphy_formats csiphy_formats_8x96;
extern const struct csiphy_formats csiphy_formats_sdm845;
extern const struct csiphy_hw_ops csiphy_ops_2ph_1_0;
extern const struct csiphy_hw_ops csiphy_ops_3ph_1_0;
......
drivers/media/platform/qcom/camss/camss.c
View file @ e05d1be9
......@@ -44,7 +44,8 @@ static const struct camss_subdev_resources csiphy_res_8x16[] = {
.reg = { "csiphy0", "csiphy0_clk_mux" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_2ph_1_0
.hw_ops = &csiphy_ops_2ph_1_0,
.formats = &csiphy_formats_8x16
}
},
......@@ -59,7 +60,8 @@ static const struct camss_subdev_resources csiphy_res_8x16[] = {
.reg = { "csiphy1", "csiphy1_clk_mux" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_2ph_1_0
.hw_ops = &csiphy_ops_2ph_1_0,
.formats = &csiphy_formats_8x16
}
}
};
......@@ -158,7 +160,8 @@ static const struct camss_subdev_resources csiphy_res_8x96[] = {
.reg = { "csiphy0", "csiphy0_clk_mux" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
},
......@@ -173,7 +176,8 @@ static const struct camss_subdev_resources csiphy_res_8x96[] = {
.reg = { "csiphy1", "csiphy1_clk_mux" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
},
......@@ -188,7 +192,8 @@ static const struct camss_subdev_resources csiphy_res_8x96[] = {
.reg = { "csiphy2", "csiphy2_clk_mux" },
.interrupt = { "csiphy2" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
}
};
......@@ -357,7 +362,8 @@ static const struct camss_subdev_resources csiphy_res_660[] = {
.reg = { "csiphy0", "csiphy0_clk_mux" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
},
......@@ -374,7 +380,8 @@ static const struct camss_subdev_resources csiphy_res_660[] = {
.reg = { "csiphy1", "csiphy1_clk_mux" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
},
......@@ -391,7 +398,8 @@ static const struct camss_subdev_resources csiphy_res_660[] = {
.reg = { "csiphy2", "csiphy2_clk_mux" },
.interrupt = { "csiphy2" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_8x96
}
}
};
......@@ -582,7 +590,8 @@ static const struct camss_subdev_resources csiphy_res_845[] = {
.reg = { "csiphy0" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
......@@ -603,7 +612,8 @@ static const struct camss_subdev_resources csiphy_res_845[] = {
.reg = { "csiphy1" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
......@@ -624,7 +634,8 @@ static const struct camss_subdev_resources csiphy_res_845[] = {
.reg = { "csiphy2" },
.interrupt = { "csiphy2" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
......@@ -645,7 +656,8 @@ static const struct camss_subdev_resources csiphy_res_845[] = {
.reg = { "csiphy3" },
.interrupt = { "csiphy3" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
}
};
......@@ -817,7 +829,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy0" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY1 */
......@@ -829,7 +842,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy1" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY2 */
......@@ -841,7 +855,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy2" },
.interrupt = { "csiphy2" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY3 */
......@@ -853,7 +868,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy3" },
.interrupt = { "csiphy3" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY4 */
......@@ -865,7 +881,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy4" },
.interrupt = { "csiphy4" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY5 */
......@@ -877,7 +894,8 @@ static const struct camss_subdev_resources csiphy_res_8250[] = {
.reg = { "csiphy5" },
.interrupt = { "csiphy5" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
}
};
......@@ -1085,7 +1103,8 @@ static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
.reg = { "csiphy0" },
.interrupt = { "csiphy0" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY1 */
......@@ -1097,7 +1116,8 @@ static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
.reg = { "csiphy1" },
.interrupt = { "csiphy1" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY2 */
......@@ -1109,7 +1129,8 @@ static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
.reg = { "csiphy2" },
.interrupt = { "csiphy2" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
/* CSIPHY3 */
......@@ -1121,7 +1142,8 @@ static const struct camss_subdev_resources csiphy_res_sc8280xp[] = {
.reg = { "csiphy3" },
.interrupt = { "csiphy3" },
.csiphy = {
.hw_ops = &csiphy_ops_3ph_1_0
.hw_ops = &csiphy_ops_3ph_1_0,
.formats = &csiphy_formats_sdm845
}
},
};
......
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