Commit e189f349 authored by Linus Torvalds's avatar Linus Torvalds

Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (197 commits)
  sh: add spi header and r2d platform data V3
  sh: update r7780rp interrupt code
  sh: remove consistent alloc stuff from the machine vector
  sh: use declared coherent memory for dreamcast pci ethernet adapter
  sh: declared coherent memory support V2
  sh: Add support for SDK7780 board.
  sh: constify function pointer tables
  sh: Kill off -traditional for linker script.
  cdrom: Add support for Sega Dreamcast GD-ROM.
  sh: Kill off hs7751rvoip reference from arch/sh/Kconfig.
  sh: Drop r7780rp_defconfig, use r7780mp_defconfig as kbuild default.
  sh: Kill off dead HS771RVoIP board support.
  sh: r7785rp: Fix up DECLARE_INTC_DESC() arg mismatch.
  sh: r7785rp: Hook up the rest of the HL7785 FPGA IRQ vectors.
  sh: r2d - enable sm501 usb host function
  sh: remove voyagergx
  sh: r2d - add lcd planel timings to sm501 platform data
  sh: Add OHCI and UDC platform devices for SH7720.
  sh: intc - remove default interrupt priority tables
  sh: Correct pte size mismatch for X2 TLB.
  ...
parents f4798748 6582d7b7
......@@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
-e s/arm.*/arm/ -e s/sa110/arm/ \
-e s/s390x/s390/ -e s/parisc64/parisc/ \
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
-e s/sh[234].*/sh/ )
-e s/sh.*/sh/ )
# Cross compiling and selecting different set of gcc/bin-utils
# ---------------------------------------------------------------------------
......
This diff is collapsed.
menu "Processor features"
choice
prompt "Endianess selection"
default CPU_LITTLE_ENDIAN
help
Some SuperH machines can be configured for either little or big
endian byte order. These modes require different kernels.
config CPU_LITTLE_ENDIAN
bool "Little Endian"
config CPU_BIG_ENDIAN
bool "Big Endian"
endchoice
config SH_FPU
def_bool y
prompt "FPU support"
depends on CPU_HAS_FPU
help
Selecting this option will enable support for SH processors that
have FPU units (ie, SH77xx).
This option must be set in order to enable the FPU.
config SH64_FPU_DENORM_FLUSH
bool "Flush floating point denorms to zero"
depends on SH_FPU && SUPERH64
config SH_FPU_EMU
def_bool n
prompt "FPU emulation support"
depends on !SH_FPU && EXPERIMENTAL
help
Selecting this option will enable support for software FPU emulation.
Most SH-3 users will want to say Y here, whereas most SH-4 users will
want to say N.
config SH_DSP
def_bool y
prompt "DSP support"
depends on CPU_HAS_DSP
help
Selecting this option will enable support for SH processors that
have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
This option must be set in order to enable the DSP.
config SH_ADC
def_bool y
prompt "ADC support"
depends on CPU_SH3
help
Selecting this option will allow the Linux kernel to use SH3 on-chip
ADC module.
If unsure, say N.
config SH_STORE_QUEUES
bool "Support for Store Queues"
depends on CPU_SH4
help
Selecting this option will enable an in-kernel API for manipulating
the store queues integrated in the SH-4 processors.
config SPECULATIVE_EXECUTION
bool "Speculative subroutine return"
depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
help
This enables support for a speculative instruction fetch for
subroutine return. There are various pitfalls associated with
this, as outlined in the SH7780 hardware manual.
If unsure, say N.
config SH64_USER_MISALIGNED_FIXUP
def_bool y
prompt "Fixup misaligned loads/stores occurring in user mode"
depends on SUPERH64
config SH64_ID2815_WORKAROUND
bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
depends on CPU_SUBTYPE_SH5_101
config CPU_HAS_INTEVT
bool
config CPU_HAS_MASKREG_IRQ
bool
config CPU_HAS_IPR_IRQ
bool
config CPU_HAS_SR_RB
bool
help
This will enable the use of SR.RB register bank usage. Processors
that are lacking this bit must have another method in place for
accomplishing what is taken care of by the banked registers.
See <file:Documentation/sh/register-banks.txt> for further
information on SR.RB and register banking in the kernel in general.
config CPU_HAS_PTEA
bool
config CPU_HAS_DSP
bool
config CPU_HAS_FPU
bool
endmenu
menu "Kernel hacking"
config TRACE_IRQFLAGS_SUPPORT
bool
default y
def_bool y
source "lib/Kconfig.debug"
......@@ -30,12 +29,13 @@ config EARLY_SCIF_CONSOLE
config EARLY_SCIF_CONSOLE_PORT
hex
depends on EARLY_SCIF_CONSOLE
default "0xffe00000" if CPU_SUBTYPE_SH7780
default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
default "0xffea0000" if CPU_SUBTYPE_SH7785
default "0xfffe9800" if CPU_SUBTYPE_SH7206
default "0xfffe8000" if CPU_SUBTYPE_SH7203
default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
default "0xf8420000" if CPU_SUBTYPE_SH7619
default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
default "0xa4430000" if CPU_SUBTYPE_SH7720
default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
default "0xffc30000" if CPU_SUBTYPE_SHX3
default "0xffe80000" if CPU_SH4
default "0x00000000"
......@@ -62,7 +62,7 @@ config DEBUG_BOOTMEM
config DEBUG_STACKOVERFLOW
bool "Check for stack overflows"
depends on DEBUG_KERNEL
depends on DEBUG_KERNEL && SUPERH32
help
This option will cause messages to be printed if free stack space
drops below a certain limit.
......@@ -88,7 +88,7 @@ config 4KSTACKS
config IRQSTACKS
bool "Use separate kernel stacks when processing interrupts"
depends on DEBUG_KERNEL
depends on DEBUG_KERNEL && SUPERH32
help
If you say Y here the kernel will use separate kernel stacks
for handling hard and soft interrupts. This can help avoid
......@@ -119,19 +119,19 @@ config COMPILE_OPTIONS
depends on MORE_COMPILE_OPTIONS
config KGDB_NMI
bool "Enter KGDB on NMI"
default n
def_bool n
prompt "Enter KGDB on NMI"
config SH_KGDB_CONSOLE
bool "Console messages through GDB"
def_bool n
prompt "Console messages through GDB"
depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y
select SERIAL_CORE_CONSOLE
default n
config KGDB_SYSRQ
bool "Allow SysRq 'G' to enter KGDB"
def_bool y
prompt "Allow SysRq 'G' to enter KGDB"
depends on MAGIC_SYSRQ
default y
comment "Serial port setup"
......@@ -174,4 +174,29 @@ endchoice
endmenu
if SUPERH64
config SH64_PROC_ASIDS
bool "Debug: report ASIDs through /proc/asids"
depends on PROC_FS
config SH64_SR_WATCH
bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
config POOR_MANS_STRACE
bool "Debug: enable rudimentary strace facility"
help
This option allows system calls to be traced to the console. It also
aids in detecting kernel stack underflow. It is useful for debugging
early-userland problems (e.g. init incurring fatal exceptions.)
config SH_ALPHANUMERIC
bool "Enable debug outputs to on-board alphanumeric display"
depends on SH_CAYMAN
config SH_NO_BSS_INIT
bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
endif
endmenu
# $Id: Makefile,v 1.35 2004/04/15 03:39:20 sugioka Exp $
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
# arch/sh/Makefile
#
# Copyright (C) 1999 Kaz Kojima
# Copyright (C) 2002, 2003, 2004 Paul Mundt
# Copyright (C) 2002 M. R. Brown
#
# This file is included by the global makefile so that you can add your own
# architecture-specific flags and dependencies. Remember to do have actions
# for "archclean" and "archdep" for cleaning up and making dependencies for
# this architecture
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
isa-y := any
isa-$(CONFIG_SH_DSP) := sh
......@@ -21,13 +17,9 @@ isa-$(CONFIG_CPU_SH3) := sh3
isa-$(CONFIG_CPU_SH4) := sh4
isa-$(CONFIG_CPU_SH4A) := sh4a
isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al
isa-$(CONFIG_CPU_SH5) := shmedia
isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
ifndef CONFIG_MMU
isa-y := $(isa-y)-nommu
endif
ifndef CONFIG_SH_DSP
ifndef CONFIG_SH_FPU
isa-y := $(isa-y)-nofpu
......@@ -44,6 +36,7 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \
$(call cc-option,-mno-implicit-fp,-m4-nofpu)
cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \
$(call cc-option,-m4a-nofpu,)
cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,)
cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
......@@ -66,22 +59,27 @@ cflags-y += $(isaflags-y) -ffreestanding
cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
$(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -R .stab -R .stabstr -S
OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \
-R .stab -R .stabstr -S
#
# arch/sh/defconfig doesn't reflect any real hardware, and as such should
# never be used by anyone. Use a board-specific defconfig that has a
# reasonable chance of being current instead.
#
KBUILD_DEFCONFIG := r7780rp_defconfig
# Give the various platforms the opportunity to set default image types
defaultimage-$(CONFIG_SUPERH32) := zImage
KBUILD_IMAGE := arch/sh/boot/zImage
# Set some sensible Kbuild defaults
KBUILD_DEFCONFIG := r7780mp_defconfig
KBUILD_IMAGE := $(defaultimage-y)
#
# Choosing incompatible machines durings configuration will result in
# error messages during linking.
#
LDFLAGS_vmlinux += -e _stext
ifdef CONFIG_SUPERH32
LDFLAGS_vmlinux += -e _stext
else
LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
--defsym phys_stext_shmedia=phys_stext+1 \
-e phys_stext_shmedia
endif
ifdef CONFIG_CPU_LITTLE_ENDIAN
LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64'
......@@ -94,7 +92,9 @@ endif
KBUILD_CFLAGS += -pipe $(cflags-y)
KBUILD_AFLAGS += $(cflags-y)
head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o
head-y := arch/sh/kernel/init_task.o
head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o
head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
......@@ -112,11 +112,11 @@ machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
machdir-$(CONFIG_SH_MPC1211) += mpc1211
machdir-$(CONFIG_SH_SH03) += sh03
machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
machdir-$(CONFIG_SH_HS7751RVOIP) += renesas/hs7751rvoip
machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780
machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
......@@ -127,6 +127,7 @@ machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206
machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619
machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2
machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2
machdir-$(CONFIG_SH_CAYMAN) += cayman
incdir-y := $(notdir $(machdir-y))
......@@ -137,22 +138,22 @@ endif
# Companion chips
core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/
cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a
cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3
cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4
cpuincdir-$(CONFIG_CPU_SH5) := cpu-sh5
libs-y := arch/sh/lib/ $(libs-y) $(LIBGCC)
libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
libs-y += $(LIBGCC)
drivers-y += arch/sh/drivers/
drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/
boot := arch/sh/boot
CPPFLAGS_vmlinux.lds := -traditional
incdir-prefix := $(srctree)/include/asm-sh/
# Update machine arch and proc symlinks if something which affects
......@@ -196,29 +197,61 @@ include/asm-sh/.mach: $(wildcard include/config/sh/*.h) \
done
@touch $@
archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools
PHONY += maketools FORCE
maketools: include/linux/version.h FORCE
$(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
all: zImage
all: $(KBUILD_IMAGE)
zImage uImage uImage.srec vmlinux.srec: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
compressed: zImage
archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools \
arch/sh/lib64/syscalltab.h
archclean:
$(Q)$(MAKE) $(clean)=$(boot)
CLEAN_FILES += include/asm-sh/machtypes.h \
include/asm-sh/cpu include/asm-sh/.cpu \
include/asm-sh/mach include/asm-sh/.mach
define archhelp
@echo '* zImage - Compressed kernel image'
@echo ' vmlinux.srec - Create an ELF S-record'
@echo ' uImage - Create a bootable image for U-Boot'
@echo ' uImage.srec - Create an S-record for U-Boot'
endef
define filechk_gen-syscalltab
(set -e; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by arch/sh/Makefile"; \
echo " * Any changes will be reverted at build time."; \
echo " */"; \
echo ""; \
echo "#ifndef __SYSCALLTAB_H"; \
echo "#define __SYSCALLTAB_H"; \
echo ""; \
echo "#include <linux/kernel.h>"; \
echo ""; \
echo "struct syscall_info {"; \
echo " const char *name;"; \
echo "} syscall_info_table[] = {"; \
sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \
s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \
echo "};"; \
echo ""; \
echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)";\
echo ""; \
echo "#endif /* __SYSCALLTAB_H */" )
endef
arch/sh/lib64/syscalltab.h: arch/sh/kernel/syscalls_64.S
$(call filechk,gen-syscalltab)
CLEAN_FILES += arch/sh/lib64/syscalltab.h \
include/asm-sh/machtypes.h \
include/asm-sh/cpu include/asm-sh/.cpu \
include/asm-sh/mach include/asm-sh/.mach
#
# Makefile for the Hitachi Cayman specific parts of the kernel
#
# Note! Dependencies are done automagically by 'make dep', which also
# removes any old dependencies. DON'T put your own dependencies here
# unless it's something special (ie not a .c file).
#
obj-y := setup.o irq.o iomap.o
obj-y := setup.o irq.o
obj-$(CONFIG_HEARTBEAT) += led.o
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* arch/sh64/kernel/irq_cayman.c
*
* SH-5 Cayman Interrupt Support
* arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
*
* This file handles the board specific parts of the Cayman interrupt system
*
* Copyright (C) 2002 Stuart Menefy
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <asm/irq.h>
#include <asm/page.h>
#include <asm/io.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/signal.h>
#include <asm/cayman.h>
#include <asm/cpu/irq.h>
#include <asm/page.h>
/* Setup for the SMSC FDC37C935 / LAN91C100FD */
#define SMSC_IRQ IRQ_IRL1
/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
#define PCI2_IRQ IRQ_IRL3
unsigned long epld_virt;
......
/*
* arch/sh64/mach-cayman/led.c
* arch/sh/boards/cayman/led.c
*
* Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
*
......
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* arch/sh64/mach-cayman/setup.c
* arch/sh/mach-cayman/setup.c
*
* SH5 Cayman support
*
* This file handles the architecture-dependent parts of initialization
* Copyright (C) 2002 David J. Mckay & Benedict Gaster
* Copyright (C) 2003 - 2007 Paul Mundt
*
* Copyright David J. Mckay.
* Needs major work!
*
* benedict.gaster@superh.com: 3rd May 2002
* Added support for ramdisk, removing statically linked romfs at the same time.
*
* lethal@linux-sh.org: 15th May 2003
* Use the generic procfs cpuinfo interface, just return a valid board name.
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <asm/platform.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/cpu/irq.h>
/*
* Platform Dependent Interrupt Priorities.
......@@ -96,42 +87,6 @@
unsigned long smsc_superio_virt;
/*
* Platform dependent structures: maps and parms block.
*/
struct resource io_resources[] = {
/* To be updated with external devices */
};
struct resource kram_resources[] = {
/* These must be last in the array */
{ .name = "Kernel code", .start = 0, .end = 0 },
/* These must be last in the array */
{ .name = "Kernel data", .start = 0, .end = 0 }
};
struct resource xram_resources[] = {
/* To be updated with external devices */
};
struct resource rom_resources[] = {
/* To be updated with external devices */
};
struct sh64_platform platform_parms = {
.readonly_rootfs = 1,
.initial_root_dev = 0x0100,
.loader_type = 1,
.io_res_p = io_resources,
.io_res_count = ARRAY_SIZE(io_resources),
.kram_res_p = kram_resources,
.kram_res_count = ARRAY_SIZE(kram_resources),
.xram_res_p = xram_resources,
.xram_res_count = ARRAY_SIZE(xram_resources),
.rom_res_p = rom_resources,
.rom_res_count = ARRAY_SIZE(rom_resources),
};
int platform_int_priority[NR_INTC_IRQS] = {
IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
......@@ -210,30 +165,23 @@ static int __init smsc_superio_setup(void)
return 0;
}
/* This is grotty, but, because kernel is always referenced on the link line
* before any devices, this is safe.
*/
__initcall(smsc_superio_setup);
void __init platform_setup(void)
{
/* Cayman platform leaves the decision to head.S, for now */
platform_parms.fpu_flags = fpu_in_use;
}
void __init platform_monitor(void)
static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
{
/* Nothing yet .. */
}
if (port < 0x400) {
extern unsigned long smsc_superio_virt;
return (void __iomem *)((port << 2) | smsc_superio_virt);
}
void __init platform_reserve(void)
{
/* Nothing yet .. */
return (void __iomem *)port;
}
const char *get_system_type(void)
{
return "Hitachi Cayman";
}
extern void init_cayman_irq(void);
static struct sh_machine_vector mv_cayman __initmv = {
.mv_name = "Hitachi Cayman",
.mv_nr_irqs = 64,
.mv_ioport_map = cayman_ioport_map,
.mv_init_irq = init_cayman_irq,
};
......@@ -136,7 +136,7 @@ int systemasic_irq_demux(int irq)
emr = EMR_BASE + (level << 4) + (level << 2);
esr = ESR_BASE + (level << 2);
/* Mask the ESR to filter any spurious, unwanted interrtupts */
/* Mask the ESR to filter any spurious, unwanted interrupts */
status = inl(esr);
status &= inl(emr);
......
......@@ -33,9 +33,6 @@ extern void aica_time_init(void);
extern int gapspci_init(void);
extern int systemasic_irq_demux(int);
void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
static void __init dreamcast_setup(char **cmdline_p)
{
int i;
......@@ -64,9 +61,4 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
.mv_name = "Sega Dreamcast",
.mv_setup = dreamcast_setup,
.mv_irq_demux = systemasic_irq_demux,
#ifdef CONFIG_PCI
.mv_consistent_alloc = dreamcast_consistent_alloc,
.mv_consistent_free = dreamcast_consistent_free,
#endif
};
......@@ -121,7 +121,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp,
return 0;
}
static struct file_operations gio_fops = {
static const struct file_operations gio_fops = {
.owner = THIS_MODULE,
.open = gio_open, /* open */
.release = gio_close, /* release */
......
if SH_HS7751RVOIP
menu "HS7751RVoIP options"
config HS7751RVOIP_CODEC
bool "Support VoIP Codec section"
help
Selecting this option will support CODEC section.
endmenu
endif
#
# Makefile for the HS7751RVoIP specific parts of the kernel
#
obj-y := setup.o io.o irq.o
obj-$(CONFIG_PCI) += pci.o
/*
* linux/arch/sh/boards/renesas/hs7751rvoip/io.c
*
* Copyright (C) 2001 Ian da Silva, Jeremy Siegel
* Based largely on io_se.c.
*
* I/O routine for Renesas Technology sales HS7751RVoIP
*
* Initial version only to support LAN access; some
* placeholder code from io_hs7751rvoip.c left in with the
* expectation of later SuperIO and PCMCIA access.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/hs7751rvoip.h>
#include <asm/addrspace.h>
extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
/*
* The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
* of the 7751R processor, and has a SuperIO accessible via the PCI.
* The board also includes a PCMCIA controller on its memory bus,
* like the other Solution Engine boards.
*/
#define CODEC_IO_BASE 0x1000
#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
static inline unsigned long port2adr(unsigned int port)
{
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
if (port == 0x3f6)
return ((unsigned long)area5_io16_base + 0x0c);
else
return ((unsigned long)area5_io16_base + 0x800 +
((port-0x1f0) << 1));
else
maybebadio((unsigned long)port);
return port;
}
/* The 7751R HS7751RVoIP seems to have everything hooked */
/* up pretty normally (nothing on high-bytes only...) so this */
/* shouldn't be needed */
static inline int shifted_port(unsigned long port)
{
/* For IDE registers, value is not shifted */
if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
return 0;
else
return 1;
}
#if defined(CONFIG_HS7751RVOIP_CODEC)
#define codec_port(port) \
((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
#else
#define codec_port(port) (0)
#endif
/*
* General outline: remap really low stuff [eventually] to SuperIO,
* stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
* is mapped through the PCI IO window. Stuff with high bits (PXSEG)
* should be way beyond the window, and is used w/o translation for
* compatibility.
*/
unsigned char hs7751rvoip_inb(unsigned long port)
{
if (PXSEG(port))
return ctrl_inb(port);
else if (codec_port(port))
return ctrl_inb(CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port))
return ctrl_inb(pci_ioaddr(port));
else
return ctrl_inw(port2adr(port)) & 0xff;
}
unsigned char hs7751rvoip_inb_p(unsigned long port)
{
unsigned char v;
if (PXSEG(port))
v = ctrl_inb(port);
else if (codec_port(port))
v = ctrl_inb(CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port))
v = ctrl_inb(pci_ioaddr(port));
else
v = ctrl_inw(port2adr(port)) & 0xff;
ctrl_delay();
return v;
}
unsigned short hs7751rvoip_inw(unsigned long port)
{
if (PXSEG(port))
return ctrl_inw(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
return ctrl_inw(pci_ioaddr(port));
else
maybebadio(port);
return 0;
}
unsigned int hs7751rvoip_inl(unsigned long port)
{
if (PXSEG(port))
return ctrl_inl(port);
else if (is_pci_ioaddr(port) || shifted_port(port))
return ctrl_inl(pci_ioaddr(port));
else
maybebadio(port);
return 0;
}
void hs7751rvoip_outb(unsigned char value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
else if (codec_port(port))
ctrl_outb(value, CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outb(value, port2adr(port));
}
void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
{
if (PXSEG(port))
ctrl_outb(value, port);
else if (codec_port(port))
ctrl_outb(value, CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port))
ctrl_outb(value, pci_ioaddr(port));
else
ctrl_outw(value, port2adr(port));
ctrl_delay();
}
void hs7751rvoip_outw(unsigned short value, unsigned long port)
{
if (PXSEG(port))
ctrl_outw(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
ctrl_outw(value, pci_ioaddr(port));
else
maybebadio(port);
}
void hs7751rvoip_outl(unsigned int value, unsigned long port)
{
if (PXSEG(port))
ctrl_outl(value, port);
else if (is_pci_ioaddr(port) || shifted_port(port))
ctrl_outl(value, pci_ioaddr(port));
else
maybebadio(port);
}
void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
{
u8 *buf = addr;
if (PXSEG(port))
while (count--)
*buf++ = ctrl_inb(port);
else if (codec_port(port))
while (count--)
*buf++ = ctrl_inb(CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*buf++ = *bp;
} else {
volatile u16 *p = (volatile u16 *)port2adr(port);
while (count--)
*buf++ = *p & 0xff;
}
}
void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
{
volatile u16 *p;
u16 *buf = addr;
if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
while (count--)
*buf++ = *p;
}
void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
{
if (is_pci_ioaddr(port) || shifted_port(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
u32 *buf = addr;
while (count--)
*buf++ = *p;
} else
maybebadio(port);
}
void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
{
const u8 *buf = addr;
if (PXSEG(port))
while (count--)
ctrl_outb(*buf++, port);
else if (codec_port(port))
while (count--)
ctrl_outb(*buf++, CODEC_IOMAP(port));
else if (is_pci_ioaddr(port) || shifted_port(port)) {
volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
while (count--)
*bp = *buf++;
} else {
volatile u16 *p = (volatile u16 *)port2adr(port);
while (count--)
*p = *buf++;
}
}
void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
{
volatile u16 *p;
const u16 *buf = addr;
if (PXSEG(port))
p = (volatile u16 *)port;
else if (is_pci_ioaddr(port) || shifted_port(port))
p = (volatile u16 *)pci_ioaddr(port);
else
p = (volatile u16 *)port2adr(port);
while (count--)
*p = *buf++;
}
void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
{
const u32 *buf = addr;
if (is_pci_ioaddr(port) || shifted_port(port)) {
volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
while (count--)
*p = *buf++;
} else
maybebadio(port);
}
void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
{
if (PXSEG(port))
return (void __iomem *)port;
else if (unlikely(codec_port(port) && (size == 1)))
return (void __iomem *)CODEC_IOMAP(port);
else if (is_pci_ioaddr(port))
return (void __iomem *)pci_ioaddr(port);
return (void __iomem *)port2adr(port);
}
/*
* linux/arch/sh/boards/renesas/hs7751rvoip/irq.c
*
* Copyright (C) 2000 Kazumoto Kojima
*
* Renesas Technology Sales HS7751RVoIP Support.
*
* Modified for HS7751RVoIP by
* Atom Create Engineering Co., Ltd. 2002.
* Lineo uSolutions, Inc. 2003.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/hs7751rvoip.h>
static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
static void enable_hs7751rvoip_irq(unsigned int irq);
static void disable_hs7751rvoip_irq(unsigned int irq);
/* shutdown is same as "disable" */
#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq
static void ack_hs7751rvoip_irq(unsigned int irq);
static void end_hs7751rvoip_irq(unsigned int irq);
static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
{
enable_hs7751rvoip_irq(irq);
return 0; /* never anything pending */
}
static void disable_hs7751rvoip_irq(unsigned int irq)
{
unsigned short val;
unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
/* Set the priority in IPR to 0 */
val = ctrl_inw(IRLCNTR3);
val &= mask;
ctrl_outw(val, IRLCNTR3);
}
static void enable_hs7751rvoip_irq(unsigned int irq)
{
unsigned short val;
unsigned short value = (0x0001 << mask_pos[irq]);
/* Set priority in IPR back to original value */
val = ctrl_inw(IRLCNTR3);
val |= value;
ctrl_outw(val, IRLCNTR3);
}
static void ack_hs7751rvoip_irq(unsigned int irq)
{
disable_hs7751rvoip_irq(irq);
}
static void end_hs7751rvoip_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
enable_hs7751rvoip_irq(irq);
}
static struct hw_interrupt_type hs7751rvoip_irq_type = {
.typename = "HS7751RVoIP IRQ",
.startup = startup_hs7751rvoip_irq,
.shutdown = shutdown_hs7751rvoip_irq,
.enable = enable_hs7751rvoip_irq,
.disable = disable_hs7751rvoip_irq,
.ack = ack_hs7751rvoip_irq,
.end = end_hs7751rvoip_irq,
};
static void make_hs7751rvoip_irq(unsigned int irq)
{
disable_irq_nosync(irq);
irq_desc[irq].chip = &hs7751rvoip_irq_type;
disable_hs7751rvoip_irq(irq);
}
/*
* Initialize IRQ setting
*/
void __init init_hs7751rvoip_IRQ(void)
{
int i;
/* IRL0=ON HOOK1
* IRL1=OFF HOOK1
* IRL2=ON HOOK2
* IRL3=OFF HOOK2
* IRL4=Ringing Detection
* IRL5=CODEC
* IRL6=Ethernet
* IRL7=Ethernet Hub
* IRL8=USB Communication
* IRL9=USB Connection
* IRL10=USB DMA
* IRL11=CF Card
* IRL12=PCMCIA
* IRL13=PCI Slot
*/
ctrl_outw(0x9876, IRLCNTR1);
ctrl_outw(0xdcba, IRLCNTR2);
ctrl_outw(0x0050, IRLCNTR4);
ctrl_outw(0x4321, IRLCNTR5);
for (i=0; i<14; i++)
make_hs7751rvoip_irq(i);
}
/*
* linux/arch/sh/boards/renesas/hs7751rvoip/pci.c
*
* Author: Ian DaSilva (idasilva@mvista.com)
*
* Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*
* PCI initialization for the Renesas SH7751R HS7751RVoIP board
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <linux/module.h>
#include <asm/io.h>
#include "../../../drivers/pci/pci-sh7751.h"
#include <asm/hs7751rvoip/hs7751rvoip.h>
#define PCIMCR_MRSET_OFF 0xBFFFFFFF
#define PCIMCR_RFSH_OFF 0xFFFFFFFB
/*
* Only long word accesses of the PCIC's internal local registers and the
* configuration registers from the CPU is supported.
*/
#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
#define PCIC_READ(x) readl(PCI_REG(x))
/*
* Description: This function sets up and initializes the pcic, sets
* up the BARS, maps the DRAM into the address space etc, etc.
*/
int __init pcibios_init_platform(void)
{
unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
unsigned short bcr2, bcr3;
/*
* Initialize the slave bus controller on the pcic. The values used
* here should not be hardcoded, but they should be taken from the bsc
* on the processor, to make this function as generic as possible.
* (i.e. Another sbc may usr different SDRAM timing settings -- in order
* for the pcic to work, its settings need to be exactly the same.)
*/
bcr1 = (*(volatile unsigned long *)(SH7751_BCR1));
bcr2 = (*(volatile unsigned short *)(SH7751_BCR2));
bcr3 = (*(volatile unsigned short *)(SH7751_BCR3));
wcr1 = (*(volatile unsigned long *)(SH7751_WCR1));
wcr2 = (*(volatile unsigned long *)(SH7751_WCR2));
wcr3 = (*(volatile unsigned long *)(SH7751_WCR3));
mcr = (*(volatile unsigned long *)(SH7751_MCR));
bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
(*(volatile unsigned long *)(SH7751_BCR1)) = bcr1;
bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
PCIC_WRITE(SH7751_PCIBCR3, bcr3); /* PCIC BCR3 */
PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
/* Enable all interrupts, so we know what to fix */
PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
/* Set up standard PCI config registers */
PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */
PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */
PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */
PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */
PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
/* Now turn it on... */
PCIC_WRITE(SH7751_PCICR, 0xa5000001);
/*
* Set PCIMBR and PCIIOBR here, assuming a single window
* (16M MEM, 256K IO) is enough. If a larger space is
* needed, the readx/writex and inx/outx functions will
* have to do more (e.g. setting registers for each call).
*/
/*
* Set the MBR so PCI address is one-to-one with window,
* meaning all calls go straight through... use ifdef to
* catch erroneous assumption.
*/
BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
/* Set IOBR for window containing area specified in pci.h */
PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
/* All done, may as well say so... */
printk("SH7751R PCI: Finished initialization of the PCI controller\n");
return 1;
}
int __init pcibios_map_platform_irq(u8 slot, u8 pin)
{
switch (slot) {
case 0: return IRQ_PCISLOT; /* PCI Extend slot */
case 1: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
case 2: return IRQ_PCIETH; /* Realtek Ethernet controller */
case 3: return IRQ_PCIHUB; /* Realtek Ethernet Hub controller */
default:
printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
return -1;
}
}
static struct resource sh7751_io_resource = {
.name = "SH7751_IO",
.start = 0x4000,
.end = 0x4000 + SH7751_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7751_mem_resource = {
.name = "SH7751_mem",
.start = SH7751_PCI_MEMORY_BASE,
.end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops sh7751_pci_ops;
struct pci_channel board_pci_channels[] = {
{ &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
/*
* Renesas Technology Sales HS7751RVoIP Support.
*
* Copyright (C) 2000 Kazumoto Kojima
*
* Modified for HS7751RVoIP by
* Atom Create Engineering Co., Ltd. 2002.
* Lineo uSolutions, Inc. 2003.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/mm.h>
#include <linux/pm.h>
#include <asm/hs7751rvoip.h>
#include <asm/io.h>
#include <asm/machvec.h>
static void hs7751rvoip_power_off(void)
{
ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR);
}
void *area5_io8_base;
void *area6_io8_base;
void *area5_io16_base;
void *area6_io16_base;
static int __init hs7751rvoip_cf_init(void)
{
pgprot_t prot;
unsigned long paddrbase;
/* open I/O area window */
paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
if (!area5_io16_base) {
printk("allocate_cf_area : can't open CF I/O window!\n");
return -ENOMEM;
}
/* XXX : do we need attribute and common-memory area also? */
paddrbase = virt_to_phys((void *)PA_AREA6_IO);
#if defined(CONFIG_HS7751RVOIP_CODEC)
prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
#else
prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
#endif
area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
if (!area6_io8_base) {
printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
return -ENOMEM;
}
prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
if (!area6_io16_base) {
printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
return -ENOMEM;
}
return 0;
}
device_initcall(hs7751rvoip_cf_init);
/*
* Initialize the board
*/
static void __init hs7751rvoip_setup(char **cmdline_p)
{
ctrl_outb(0xf0, PA_OUTPORTR);
pm_power_off = hs7751rvoip_power_off;
printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
}
static struct sh_machine_vector mv_hs7751rvoip __initmv = {
.mv_name = "HS7751RVoIP",
.mv_setup = hs7751rvoip_setup,
.mv_nr_irqs = 72,
.mv_inb = hs7751rvoip_inb,
.mv_inw = hs7751rvoip_inw,
.mv_inl = hs7751rvoip_inl,
.mv_outb = hs7751rvoip_outb,
.mv_outw = hs7751rvoip_outw,
.mv_outl = hs7751rvoip_outl,
.mv_inb_p = hs7751rvoip_inb_p,
.mv_inw_p = hs7751rvoip_inw,
.mv_inl_p = hs7751rvoip_inl,
.mv_outb_p = hs7751rvoip_outb_p,
.mv_outw_p = hs7751rvoip_outw,
.mv_outl_p = hs7751rvoip_outl,
.mv_insb = hs7751rvoip_insb,
.mv_insw = hs7751rvoip_insw,
.mv_insl = hs7751rvoip_insl,
.mv_outsb = hs7751rvoip_outsb,
.mv_outsw = hs7751rvoip_outsw,
.mv_outsl = hs7751rvoip_outsl,
.mv_init_irq = init_hs7751rvoip_IRQ,
.mv_ioport_map = hs7751rvoip_ioport_map,
};
......@@ -3,7 +3,7 @@
#
irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o
irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o
irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o
obj-y := setup.o $(irqinit-y)
ifneq ($(CONFIG_SH_R7785RP),y)
......
......@@ -47,7 +47,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
};
static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
NULL, NULL, mask_registers, NULL, NULL);
NULL, mask_registers, NULL, NULL);
unsigned char * __init highlander_init_irq_r7780mp(void)
{
......
......@@ -3,21 +3,65 @@
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2008 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
enum {
UNUSED = 0,
/* board specific interrupt sources */
AX88796, /* Ethernet controller */
PSW, /* Push Switch */
CF, /* Compact Flash */
PCI_A,
PCI_B,
PCI_C,
PCI_D,
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */
INTC_IRQ(PCI_B, 66),
INTC_IRQ(PCI_C, 67),
INTC_IRQ(PCI_D, 68),
INTC_IRQ(CF, IRQ_CF),
INTC_IRQ(PSW, IRQ_PSW),
INTC_IRQ(AX88796, IRQ_AX88796),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa5000000, 0, 16, /* IRLMSK */
{ PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0,
0, 0, 0, 0, 0, 0, PSW, AX88796 } },
};
static unsigned char irl2irq[HL_NR_IRL] __initdata = {
65, 66, 67, 68,
IRQ_CF, 0, 0, 0,
0, 0, 0, 0,
IRQ_AX88796, IRQ_PSW
};
static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
NULL, mask_registers, NULL, NULL);
unsigned char * __init highlander_init_irq_r7780rp(void)
{
int i;
for (i = 0; i < 15; i++)
make_r7780rp_irq(i);
if (ctrl_inw(0xa5000600)) {
printk(KERN_INFO "Using r7780rp interrupt controller.\n");
register_intc_controller(&intc_desc);
return irl2irq;
}
return NULL;
}
......@@ -2,7 +2,7 @@
* Renesas Solutions Highlander R7785RP Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
* Copyright (C) 2006 - 2008 Paul Mundt
* Copyright (C) 2007 Magnus Damm
*
* This file is subject to the terms and conditions of the GNU General Public
......@@ -17,31 +17,52 @@
enum {
UNUSED = 0,
/* board specific interrupt sources */
AX88796, /* Ethernet controller */
CF, /* Compact Flash */
/* FPGA specific interrupt sources */
CF, /* Compact Flash */
SMBUS, /* SMBUS */
TP, /* Touch panel */
RTC, /* RTC Alarm */
TH_ALERT, /* Temperature sensor */
AX88796, /* Ethernet controller */
/* external bus connector */
EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7,
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(CF, IRQ_CF),
INTC_IRQ(SMBUS, IRQ_SMBUS),
INTC_IRQ(TP, IRQ_TP),
INTC_IRQ(RTC, IRQ_RTC),
INTC_IRQ(TH_ALERT, IRQ_TH_ALERT),
INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1),
INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3),
INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7),
INTC_IRQ(AX88796, IRQ_AX88796),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ 0xa4000010, 0, 16, /* IRLMCR1 */
{ 0, 0, 0, 0, CF, AX88796, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 0, CF, AX88796, SMBUS, TP,
RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
{ 0xa4000012, 0, 16, /* IRLMCR2 */
{ 0, 0, 0, 0, 0, 0, 0, 0,
EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } },
};
static unsigned char irl2irq[HL_NR_IRL] __initdata = {
0, IRQ_CF, 0, 0,
0, 0, 0, 0,
0, 0, IRQ_AX88796, 0,
0, 0, 0,
0, IRQ_CF, IRQ_EXT4, IRQ_EXT5,
IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP,
IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0,
IRQ_EXT1, IRQ_EXT2, IRQ_EXT3,
};
static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
NULL, NULL, mask_registers, NULL, NULL);
NULL, mask_registers, NULL, NULL);
unsigned char * __init highlander_init_irq_r7785rp(void)
{
......@@ -58,7 +79,7 @@ unsigned char * __init highlander_init_irq_r7785rp(void)
ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */
ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */
register_intc_controller(&intc_desc);
return irl2irq;
......
/*
* Renesas Solutions Highlander R7780RP-1 Support.
*
* Copyright (C) 2002 Atom Create Engineering Co., Ltd.
* Copyright (C) 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/r7780rp.h>
#ifdef CONFIG_SH_R7780RP
static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
#elif defined(CONFIG_SH_R7780MP)
static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
#elif defined(CONFIG_SH_R7785RP)
static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2};
#endif
static void enable_r7780rp_irq(unsigned int irq)
{
/* Set priority in IPR back to original value */
ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
}
static void disable_r7780rp_irq(unsigned int irq)
{
/* Set the priority in IPR to 0 */
ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
IRLCNTR1);
}
static struct irq_chip r7780rp_irq_chip __read_mostly = {
.name = "R7780RP",
.mask = disable_r7780rp_irq,
.unmask = enable_r7780rp_irq,
.mask_ack = disable_r7780rp_irq,
};
void make_r7780rp_irq(unsigned int irq)
{
disable_irq_nosync(irq);
set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip,
handle_level_irq, "level");
enable_r7780rp_irq(irq);
}
......@@ -179,9 +179,11 @@ static struct platform_device ax88796_device = {
static struct platform_device *r7780rp_devices[] __initdata = {
&r8a66597_usb_host_device,
&m66592_usb_peripheral_device,
&cf_ide_device,
&heartbeat_device,
#ifndef CONFIG_SH_R7780RP
&cf_ide_device,
&ax88796_device,
#endif
};
static int __init r7780rp_devices_setup(void)
......@@ -316,9 +318,9 @@ void __init highlander_init_irq(void)
break;
#endif
#ifdef CONFIG_SH_R7780RP
highlander_init_irq_r7780rp();
ucp = irl2irq;
break;
ucp = highlander_init_irq_r7780rp();
if (ucp)
break;
#endif
} while (0);
......
......@@ -13,7 +13,6 @@
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
#define R2D_NR_IRL 13
......@@ -71,7 +70,7 @@ static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
};
static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
NULL, NULL, mask_registers_r2d_1, NULL, NULL);
NULL, mask_registers_r2d_1, NULL, NULL);
#endif /* CONFIG_RTS7751R2D_1 */
......@@ -109,7 +108,7 @@ static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
};
static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
NULL, NULL, mask_registers_r2d_plus, NULL, NULL);
NULL, mask_registers_r2d_plus, NULL, NULL);
#endif /* CONFIG_RTS7751R2D_PLUS */
......@@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void)
}
register_intc_controller(d);
#ifdef CONFIG_MFD_SM501
setup_voyagergx_irq();
#endif
}
......@@ -13,34 +13,15 @@
#include <linux/pata_platform.h>
#include <linux/serial_8250.h>
#include <linux/sm501.h>
#include <linux/sm501-regs.h>
#include <linux/pm.h>
#include <linux/fb.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <asm/machvec.h>
#include <asm/rts7751r2d.h>
#include <asm/voyagergx.h>
#include <asm/io.h>
static void __init voyagergx_serial_init(void)
{
unsigned long val;
/*
* GPIO Control
*/
val = readl((void __iomem *)GPIO_MUX_HIGH);
val |= 0x00001fe0;
writel(val, (void __iomem *)GPIO_MUX_HIGH);
/*
* Power Mode Gate
*/
val = readl((void __iomem *)POWER_MODE0_GATE);
val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
writel(val, (void __iomem *)POWER_MODE0_GATE);
val = readl((void __iomem *)POWER_MODE1_GATE);
val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
writel(val, (void __iomem *)POWER_MODE1_GATE);
}
#include <asm/spi.h>
static struct resource cf_ide_resources[] = {
[0] = {
......@@ -75,6 +56,43 @@ static struct platform_device cf_ide_device = {
},
};
static struct spi_board_info spi_bus[] = {
{
.modalias = "rtc-r9701",
.max_speed_hz = 1000000,
.mode = SPI_MODE_3,
},
};
static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
{
BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE);
}
static struct sh_spi_info spi_info = {
.num_chipselect = 1,
.chip_select = r2d_chip_select,
};
static struct resource spi_sh_sci_resources[] = {
{
.start = 0xffe00000,
.end = 0xffe0001f,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device spi_sh_sci_device = {
.name = "spi_sh_sci",
.id = -1,
.num_resources = ARRAY_SIZE(spi_sh_sci_resources),
.resource = spi_sh_sci_resources,
.dev = {
.platform_data = &spi_info,
},
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_OUTPORT,
......@@ -93,11 +111,11 @@ static struct platform_device heartbeat_device = {
#ifdef CONFIG_MFD_SM501
static struct plat_serial8250_port uart_platform_data[] = {
{
.membase = (void __iomem *)VOYAGER_UART_BASE,
.mapbase = VOYAGER_UART_BASE,
.membase = (void __iomem *)0xb3e30000,
.mapbase = 0xb3e30000,
.iotype = UPIO_MEM,
.irq = IRQ_SM501_U0,
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
.irq = IRQ_VOYAGER,
.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
.regshift = 2,
.uartclk = (9600 * 16),
},
......@@ -124,14 +142,67 @@ static struct resource sm501_resources[] = {
.flags = IORESOURCE_MEM,
},
[2] = {
.start = IRQ_SM501_CV,
.start = IRQ_VOYAGER,
.flags = IORESOURCE_IRQ,
},
};
static struct fb_videomode sm501_default_mode = {
.pixclock = 35714,
.xres = 640,
.yres = 480,
.left_margin = 105,
.right_margin = 50,
.upper_margin = 35,
.lower_margin = 0,
.hsync_len = 96,
.vsync_len = 2,
.sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
};
static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
.def_bpp = 16,
.def_mode = &sm501_default_mode,
.flags = SM501FB_FLAG_USE_INIT_MODE |
SM501FB_FLAG_USE_HWCURSOR |
SM501FB_FLAG_USE_HWACCEL |
SM501FB_FLAG_DISABLE_AT_EXIT,
};
static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
.flags = (SM501FB_FLAG_USE_INIT_MODE |
SM501FB_FLAG_USE_HWCURSOR |
SM501FB_FLAG_USE_HWACCEL |
SM501FB_FLAG_DISABLE_AT_EXIT),
};
static struct sm501_platdata_fb sm501_fb_pdata = {
.fb_route = SM501_FB_OWN,
.fb_crt = &sm501_pdata_fbsub_crt,
.fb_pnl = &sm501_pdata_fbsub_pnl,
.flags = SM501_FBPD_SWAP_FB_ENDIAN,
};
static struct sm501_initdata sm501_initdata = {
.gpio_high = {
.set = 0x00001fe0,
.mask = 0x0,
},
.devices = SM501_USE_USB_HOST,
};
static struct sm501_platdata sm501_platform_data = {
.init = &sm501_initdata,
.fb = &sm501_fb_pdata,
};
static struct platform_device sm501_device = {
.name = "sm501",
.id = -1,
.dev = {
.platform_data = &sm501_platform_data,
},
.num_resources = ARRAY_SIZE(sm501_resources),
.resource = sm501_resources,
};
......@@ -145,10 +216,12 @@ static struct platform_device *rts7751r2d_devices[] __initdata = {
#endif
&cf_ide_device,
&heartbeat_device,
&spi_sh_sci_device,
};
static int __init rts7751r2d_devices_setup(void)
{
spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
return platform_add_devices(rts7751r2d_devices,
ARRAY_SIZE(rts7751r2d_devices));
}
......@@ -192,6 +265,7 @@ u8 rts7751r2d_readb(void __iomem *addr)
*/
static void __init rts7751r2d_setup(char **cmdline_p)
{
void __iomem *sm501_reg;
u16 ver = ctrl_inw(PA_VERREG);
printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
......@@ -202,7 +276,30 @@ static void __init rts7751r2d_setup(char **cmdline_p)
ctrl_outw(0x0000, PA_OUTPORT);
pm_power_off = rts7751r2d_power_off;
voyagergx_serial_init();
/* sm501 dram configuration:
* ColSizeX = 11 - External Memory Column Size: 256 words.
* APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
* RstX = 1 - External Memory Reset: Normal.
* Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
* BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
* BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
* AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
* Rst = 1 - Internal Memory Reset: Normal.
* RA = 1 - Internal Memory Remain in Active State: Do not remain.
*/
sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
/*
* Power Mode Gate - Enable UART0
*/
sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
}
/*
......@@ -215,8 +312,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
.mv_irq_demux = rts7751r2d_irq_demux,
.mv_writeb = rts7751r2d_writeb,
.mv_readb = rts7751r2d_readb,
#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
.mv_consistent_alloc = voyagergx_consistent_alloc,
.mv_consistent_free = voyagergx_consistent_free,
#endif
};
if SH_SDK7780
choice
prompt "SDK7780 options"
default SH_SDK7780_BASE
config SH_SDK7780_STANDALONE
bool "SDK7780 board support"
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the
standalone version of the SDK7780. If in doubt, say Y.
config SH_SDK7780_BASE
bool "SDK7780 with base-board support"
depends on CPU_SUBTYPE_SH7780
help
Selecting this option will enable support for the expansion
baseboard devices. If in doubt, say Y.
endchoice
endif
#
# Makefile for the SDK7780 specific parts of the kernel
#
obj-y := setup.o irq.o
/*
* linux/arch/sh/boards/renesas/sdk7780/irq.c
*
* Renesas Technology Europe SDK7780 Support.
*
* Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/io.h>
#include <asm/sdk7780.h>
enum {
UNUSED = 0,
/* board specific interrupt sources */
SMC91C111, /* Ethernet controller */
};
static struct intc_vect fpga_vectors[] __initdata = {
INTC_IRQ(SMC91C111, IRQ_ETHERNET),
};
static struct intc_mask_reg fpga_mask_registers[] __initdata = {
{ 0, FPGA_IRQ0MR, 16,
{ 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, SMC91C111, 0, 0, 0, 0 } },
};
static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors,
NULL, fpga_mask_registers, NULL, NULL);
void __init init_sdk7780_IRQ(void)
{
printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
ctrl_outw(0xFFFF, FPGA_IRQ0MR);
/* Setup IRL 0-3 */
ctrl_outw(0x0003, FPGA_IMSR);
plat_irq_setup_pins(IRQ_MODE_IRL3210);
register_intc_controller(&fpga_intc_desc);
}
/*
* arch/sh/boards/renesas/sdk7780/setup.c
*
* Renesas Solutions SH7780 SDK Support
* Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/platform_device.h>
#include <linux/pata_platform.h>
#include <asm/machvec.h>
#include <asm/sdk7780.h>
#include <asm/heartbeat.h>
#include <asm/io.h>
#include <asm/addrspace.h>
#define GPIO_PECR 0xFFEA0008
//* Heartbeat */
static struct heartbeat_data heartbeat_data = {
.regsize = 16,
};
static struct resource heartbeat_resources[] = {
[0] = {
.start = PA_LED,
.end = PA_LED,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device heartbeat_device = {
.name = "heartbeat",
.id = -1,
.dev = {
.platform_data = &heartbeat_data,
},
.num_resources = ARRAY_SIZE(heartbeat_resources),
.resource = heartbeat_resources,
};
/* SMC91x */
static struct resource smc91x_eth_resources[] = {
[0] = {
.name = "smc91x-regs" ,
.start = PA_LAN + 0x300,
.end = PA_LAN + 0x300 + 0x10 ,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_ETHERNET,
.end = IRQ_ETHERNET,
.flags = IORESOURCE_IRQ,
},
};
static struct platform_device smc91x_eth_device = {
.name = "smc91x",
.id = 0,
.dev = {
.dma_mask = NULL, /* don't use dma */
.coherent_dma_mask = 0xffffffff,
},
.num_resources = ARRAY_SIZE(smc91x_eth_resources),
.resource = smc91x_eth_resources,
};
static struct platform_device *sdk7780_devices[] __initdata = {
&heartbeat_device,
&smc91x_eth_device,
};
static int __init sdk7780_devices_setup(void)
{
return platform_add_devices(sdk7780_devices,
ARRAY_SIZE(sdk7780_devices));
}
device_initcall(sdk7780_devices_setup);
static void __init sdk7780_setup(char **cmdline_p)
{
u16 ver = ctrl_inw(FPGA_FPVERR);
u16 dateStamp = ctrl_inw(FPGA_FPDATER);
printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
printk(KERN_INFO "Board version: %d (revision %d), "
"FPGA version: %d (revision %d), datestamp : %d\n",
(ver >> 12) & 0xf, (ver >> 8) & 0xf,
(ver >> 4) & 0xf, ver & 0xf,
dateStamp);
/* Setup pin mux'ing for PCIC */
ctrl_outw(0x0000, GPIO_PECR);
}
/*
* The Machine Vector
*/
static struct sh_machine_vector mv_se7780 __initmv = {
.mv_name = "Renesas SDK7780-R3" ,
.mv_setup = sdk7780_setup,
.mv_nr_irqs = 111,
.mv_init_irq = init_sdk7780_IRQ,
};
......@@ -33,19 +33,30 @@ $(obj)/compressed/vmlinux: FORCE
$(Q)$(MAKE) $(build)=$(obj)/compressed $@
KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%8x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_ZERO_PAGE_OFFSET)]')
KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%8x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_ZERO_PAGE_OFFSET)+0x1000]')
quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
-C none -a $(KERNEL_LOAD) -e $(KERNEL_LOAD) \
-C none -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
-n 'Linux-$(KERNELRELEASE)' -d $< $@
$(obj)/uImage: $(obj)/zImage FORCE
$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,uimage)
@echo ' Image $@ is ready'
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
$(call if_changed,objcopy)
......@@ -54,4 +65,5 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
$(obj)/uImage.srec: $(obj)/uImage
$(call if_changed,objcopy)
clean-files += uImage uImage.srec vmlinux.srec
clean-files += uImage uImage.srec vmlinux.srec \
vmlinux.bin vmlinux.bin.gz
#
# linux/arch/sh/boot/compressed/Makefile
#
# create a compressed vmlinux image from the original vmlinux
#
targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
EXTRA_AFLAGS := -traditional
OBJECTS = $(obj)/head.o $(obj)/misc.o
ifdef CONFIG_SH_STANDARD_BIOS
OBJECTS += $(obj)/../../kernel/sh_bios.o
ifeq ($(CONFIG_SUPERH32),y)
include ${srctree}/arch/sh/boot/compressed/Makefile_32
else
include ${srctree}/arch/sh/boot/compressed/Makefile_64
endif
#
# IMAGE_OFFSET is the load offset of the compression loader
#
IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_BOOT_LINK_OFFSET)]')
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
$(call if_changed,ld)
@:
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,ld)
#
# linux/arch/sh/boot/compressed/Makefile
#
# create a compressed vmlinux image from the original vmlinux
#
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head_32.o misc_32.o piggy.o
EXTRA_AFLAGS := -traditional
OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
ifdef CONFIG_SH_STANDARD_BIOS
OBJECTS += $(obj)/../../kernel/sh_bios.o
endif
#
# IMAGE_OFFSET is the load offset of the compression loader
#
IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(CONFIG_MEMORY_START) + \
$(CONFIG_BOOT_LINK_OFFSET)]')
LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
$(call if_changed,ld)
@:
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,ld)
#
# linux/arch/sh64/boot/compressed/Makefile
# arch/sh/boot/compressed/Makefile_64
#
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
# create a compressed vmlinux image from the original vmlinux
#
# Copyright (C) 2002 Stuart Menefy
# Copyright (C) 2004 Paul Mundt
#
# create a compressed vmlinux image from the original vmlinux
# This file is subject to the terms and conditions of the GNU General Public
# License. See the file "COPYING" in the main directory of this archive
# for more details.
#
targets := vmlinux vmlinux.bin vmlinux.bin.gz \
head.o misc.o cache.o piggy.o vmlinux.lds
head_64.o misc_64.o cache.o piggy.o
EXTRA_AFLAGS := -traditional
OBJECTS := $(obj)/head.o $(obj)/misc.o $(obj)/cache.o
OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
$(obj)/cache.o
#
# ZIMAGE_OFFSET is the load offset of the compression loader
# (4M for the kernel plus 64K for this loader)
#
ZIMAGE_OFFSET = $(shell printf "0x%8x" $$[$(CONFIG_MEMORY_START)+0x400000+0x10000])
ZIMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET)+0x400000+0x10000]')
LDFLAGS_vmlinux := -Ttext $(ZIMAGE_OFFSET) -e startup \
-T $(obj)/../../kernel/vmlinux.lds \
--no-warn-mismatch
-T $(obj)/../../kernel/vmlinux.lds
$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
$(call if_changed,ld)
......@@ -41,6 +41,5 @@ $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T
OBJCOPYFLAGS += -R .empty_zero_page
$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE
$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,ld)
int cache_control(unsigned int command)
{
volatile unsigned int *p = (volatile unsigned int *) 0x80000000;
int i;
for (i = 0; i < (32 * 1024); i += 32) {
(void)*p;
p += (32 / sizeof (int));
}
return 0;
}
......@@ -13,11 +13,10 @@
* Modification for compressed loader:
* Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
*/
#include <linux/linkage.h>
#include <asm/registers.h>
#include <asm/cache.h>
#include <asm/mmu_context.h>
#include <asm/cpu/mmu_context.h>
#include <asm/cpu/registers.h>
/*
* Fixed TLB entries to identity map the beginning of RAM
......@@ -51,14 +50,14 @@ startup:
* uninitialized target registers.
* This must be executed before the first branch.
*/
ptabs/u ZERO, tr0
ptabs/u ZERO, tr1
ptabs/u ZERO, tr2
ptabs/u ZERO, tr3
ptabs/u ZERO, tr4
ptabs/u ZERO, tr5
ptabs/u ZERO, tr6
ptabs/u ZERO, tr7
ptabs/u r63, tr0
ptabs/u r63, tr1
ptabs/u r63, tr2
ptabs/u r63, tr3
ptabs/u r63, tr4
ptabs/u r63, tr5
ptabs/u r63, tr6
ptabs/u r63, tr7
synci
/*
......@@ -69,7 +68,7 @@ startup:
pta 1f, tr1
movi ITLB_FIXED, r21
movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
1: putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */
1: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */
addi r21, TLB_STEP, r21
bne r21, r22, tr1
......@@ -77,7 +76,7 @@ startup:
pta 1f, tr1
movi DTLB_FIXED, r21
movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
1: putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */
1: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */
addi r21, TLB_STEP, r21
bne r21, r22, tr1
......@@ -133,7 +132,7 @@ startup:
pt 1f, tr1
movi datalabel __bss_start, r22
movi datalabel _end, r23
1: st.l r22, 0, ZERO
1: st.l r22, 0, r63
addi r22, 4, r22
bne r22, r23, tr1
......@@ -161,4 +160,4 @@ startup:
/* Shouldn't return here, but just in case, loop forever */
pt 1f, tr0
1: blink tr0, ZERO
1: blink tr0, r63
......@@ -230,7 +230,10 @@ long* stack_start = &user_stack[STACK_SIZE];
void decompress_kernel(void)
{
output_data = 0;
output_ptr = P2SEGADDR((unsigned long)&_text+PAGE_SIZE);
output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
#ifdef CONFIG_29BIT
output_ptr |= P2SEG;
#endif
free_mem_ptr = (unsigned long)&_end;
free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
......
/*
* arch/sh64/boot/compressed/misc.c
* arch/sh/boot/compressed/misc_64.c
*
* This is a collection of several routines from gzip-1.0.3
* adapted for Linux.
......
#
# Makefile for VoyagerGX
#
obj-y := irq.o setup.o
obj-$(CONFIG_USB_OHCI_HCD) += consistent.o
EXTRA_CFLAGS += -Werror
/*
* arch/sh/cchips/voyagergx/consistent.c
*
* Copyright (C) 2004 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/mm.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/list.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/device.h>
#include <asm/io.h>
struct voya_alloc_entry {
struct list_head list;
unsigned long ofs;
unsigned long len;
};
static DEFINE_SPINLOCK(voya_list_lock);
static LIST_HEAD(voya_alloc_list);
#define OHCI_SRAM_START 0xb0000000
#define OHCI_HCCA_SIZE 0x100
#define OHCI_SRAM_SIZE 0x10000
#define VOYAGER_OHCI_NAME "voyager-ohci"
void *voyagergx_consistent_alloc(struct device *dev, size_t size,
dma_addr_t *handle, gfp_t flag)
{
struct list_head *list = &voya_alloc_list;
struct voya_alloc_entry *entry;
unsigned long start, end;
unsigned long flags;
/*
* The SM501 contains an integrated 8051 with its own SRAM.
* Devices within the cchip can all hook into the 8051 SRAM.
* We presently use this for the OHCI.
*
* Everything else goes through consistent_alloc().
*/
if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
return NULL;
start = OHCI_SRAM_START + OHCI_HCCA_SIZE;
entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
if (!entry)
return ERR_PTR(-ENOMEM);
entry->len = (size + 15) & ~15;
/*
* The basis for this allocator is dwmw2's malloc.. the
* Matrox allocator :-)
*/
spin_lock_irqsave(&voya_list_lock, flags);
list_for_each(list, &voya_alloc_list) {
struct voya_alloc_entry *p;
p = list_entry(list, struct voya_alloc_entry, list);
if (p->ofs - start >= size)
goto out;
start = p->ofs + p->len;
}
end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE);
list = &voya_alloc_list;
if (end - start >= size) {
out:
entry->ofs = start;
list_add_tail(&entry->list, list);
spin_unlock_irqrestore(&voya_list_lock, flags);
*handle = start;
return (void *)start;
}
kfree(entry);
spin_unlock_irqrestore(&voya_list_lock, flags);
return ERR_PTR(-EINVAL);
}
int voyagergx_consistent_free(struct device *dev, size_t size,
void *vaddr, dma_addr_t handle)
{
struct voya_alloc_entry *entry;
unsigned long flags;
if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
return -EINVAL;
spin_lock_irqsave(&voya_list_lock, flags);
list_for_each_entry(entry, &voya_alloc_list, list) {
if (entry->ofs != handle)
continue;
list_del(&entry->list);
kfree(entry);
break;
}
spin_unlock_irqrestore(&voya_list_lock, flags);
return 0;
}
EXPORT_SYMBOL(voyagergx_consistent_alloc);
EXPORT_SYMBOL(voyagergx_consistent_free);
/* -------------------------------------------------------------------- */
/* setup_voyagergx.c: */
/* -------------------------------------------------------------------- */
/* This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
Copyright 2003 (c) Lineo uSolutions,Inc.
*/
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/io.h>
#include <asm/voyagergx.h>
#include <asm/rts7751r2d.h>
enum {
UNUSED = 0,
/* voyager specific interrupt sources */
UP, G54, G53, G52, G51, G50, G49, G48,
I2C, PW, DMA, PCI, I2S, AC, US,
U1, U0, CV, MC, S1, S0,
UH, TWOD, ZD, PV, CI,
};
static struct intc_vect vectors[] __initdata = {
INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
};
static struct intc_mask_reg mask_registers[] __initdata = {
{ VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
{ UP, G54, G53, G52, G51, G50, G49, G48,
I2C, PW, 0, DMA, PCI, I2S, AC, US,
0, 0, U1, U0, CV, MC, S1, S0,
0, UH, 0, 0, TWOD, ZD, PV, CI } },
};
static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
NULL, NULL, mask_registers, NULL, NULL);
static unsigned int voyagergx_stat2irq[32] = {
IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
0, 0, IRQ_SM501_UH, 0,
IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
};
static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
{
unsigned long intv = ctrl_inl(INT_STATUS);
struct irq_desc *ext_desc;
unsigned int ext_irq;
unsigned int k = 0;
while (intv) {
ext_irq = voyagergx_stat2irq[k];
if (ext_irq && (intv & 1)) {
ext_desc = irq_desc + ext_irq;
handle_level_irq(ext_irq, ext_desc);
}
intv >>= 1;
k++;
}
}
void __init setup_voyagergx_irq(void)
{
printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
IRQ_VOYAGER,
VOYAGER_IRQ_BASE,
VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
register_intc_controller(&intc_desc);
set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
}
/*
* arch/sh/cchips/voyagergx/setup.c
*
* Setup routines for VoyagerGX cchip.
*
* Copyright (C) 2003 Lineo uSolutions, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <asm/io.h>
#include <asm/voyagergx.h>
static int __init setup_voyagergx(void)
{
unsigned long val;
val = readl((void __iomem *)DRAM_CTRL);
val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
DRAM_CTRL_CPU_RESET |
DRAM_CTRL_REFRESH_COMMAND |
DRAM_CTRL_BLOCK_WRITE_TIME |
DRAM_CTRL_BLOCK_WRITE_PRECHARGE |
DRAM_CTRL_ACTIVE_PRECHARGE |
DRAM_CTRL_RESET |
DRAM_CTRL_REMAIN_ACTIVE);
writel(val, (void __iomem *)DRAM_CTRL);
return 0;
}
module_init(setup_voyagergx);
This diff is collapsed.
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.24-rc2
# Tue Nov 13 20:34:57 2007
# Linux kernel version: 2.6.24-rc3
# Fri Nov 23 14:03:57 2007
#
CONFIG_SUPERH=y
CONFIG_SUPERH32=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
......@@ -39,6 +40,7 @@ CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_USER_NS is not set
# CONFIG_PID_NS is not set
# CONFIG_AUDIT is not set
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
......@@ -130,6 +132,8 @@ CONFIG_CPU_SUBTYPE_SH7785=y
# CONFIG_CPU_SUBTYPE_SHX3 is not set
# CONFIG_CPU_SUBTYPE_SH7343 is not set
# CONFIG_CPU_SUBTYPE_SH7722 is not set
# CONFIG_CPU_SUBTYPE_SH5_101 is not set
# CONFIG_CPU_SUBTYPE_SH5_103 is not set
#
# Memory management options
......@@ -139,7 +143,8 @@ CONFIG_MMU=y
CONFIG_PAGE_OFFSET=0x80000000
CONFIG_MEMORY_START=0x08000000
CONFIG_MEMORY_SIZE=0x08000000
# CONFIG_32BIT is not set
CONFIG_29BIT=y
# CONFIG_PMB is not set
# CONFIG_X2TLB is not set
CONFIG_VSYSCALL=y
# CONFIG_NUMA is not set
......@@ -158,6 +163,7 @@ CONFIG_PAGE_SIZE_4KB=y
CONFIG_HUGETLB_PAGE_SIZE_1MB=y
# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
CONFIG_SELECT_MEMORY_MODEL=y
# CONFIG_FLATMEM_MANUAL is not set
# CONFIG_DISCONTIGMEM_MANUAL is not set
......@@ -701,6 +707,7 @@ CONFIG_DEVPORT=y
# CONFIG_POWER_SUPPLY is not set
CONFIG_HWMON=y
# CONFIG_HWMON_VID is not set
# CONFIG_SENSORS_I5K_AMB is not set
# CONFIG_SENSORS_F71805F is not set
# CONFIG_SENSORS_F71882FG is not set
# CONFIG_SENSORS_IT87 is not set
......
......@@ -237,7 +237,7 @@ CONFIG_CPU_HAS_SR_RB=y
CONFIG_SH_TMU=y
CONFIG_SH_TIMER_IRQ=16
# CONFIG_NO_IDLE_HZ is not set
CONFIG_SH_PCLK_FREQ=33333333
CONFIG_SH_PCLK_FREQ=66666666
#
# CPU Frequency scaling
......
......@@ -12,7 +12,7 @@ config SH_DMA
config NR_ONCHIP_DMA_CHANNELS
int
depends on SH_DMA
default "6" if CPU_SUBTYPE_SH7720
default "6" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
default "12" if CPU_SUBTYPE_SH7780
default "4"
......
......@@ -25,6 +25,7 @@ static int dmte_irq_map[] = {
DMTE2_IRQ,
DMTE3_IRQ,
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
defined(CONFIG_CPU_SUBTYPE_SH7760) || \
defined(CONFIG_CPU_SUBTYPE_SH7709) || \
......@@ -203,6 +204,7 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
}
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
defined(CONFIG_CPU_SUBTYPE_SH7780)
#define dmaor_read_reg() ctrl_inw(DMAOR)
#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
......
......@@ -7,16 +7,19 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o
obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \
dma-dreamcast.o
obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o
obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o
obj-$(CONFIG_SH_SDK7780) += ops-sdk7780.o fixups-sdk7780.o
obj-$(CONFIG_SH_TITAN) += ops-titan.o
obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o
obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o
/*
* arch/sh/drivers/pci/dma-dreamcast.c
*
* PCI DMA support for the Sega Dreamcast
*
* Copyright (C) 2001, 2002 M. R. Brown
* Copyright (C) 2002, 2003 Paul Mundt
*
* This file originally bore the message (with enclosed-$):
* Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
* Dreamcast PCI: Supports SEGA Broadband Adaptor only.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/device.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
static int gapspci_dma_used = 0;
void *dreamcast_consistent_alloc(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t flag)
{
unsigned long buf;
if (dev && dev->bus != &pci_bus_type)
return NULL;
if (gapspci_dma_used + size > GAPSPCI_DMA_SIZE)
return ERR_PTR(-EINVAL);
buf = GAPSPCI_DMA_BASE + gapspci_dma_used;
gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size);
*dma_handle = (dma_addr_t)buf;
buf = P2SEGADDR(buf);
/* Flush the dcache before we hand off the buffer */
__flush_purge_region((void *)buf, size);
return (void *)buf;
}
int dreamcast_consistent_free(struct device *dev, size_t size,
void *vaddr, dma_addr_t dma_handle)
{
if (dev && dev->bus != &pci_bus_type)
return -EINVAL;
/* XXX */
gapspci_dma_used = 0;
return 0;
}
......@@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <asm/io.h>
#include <asm/irq.h>
......@@ -40,6 +41,15 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
*/
dev->resource[1].start = p->io_resource->start + 0x100;
dev->resource[1].end = dev->resource[1].start + 0x200 - 1;
/*
* Redirect dma memory allocations to special memory window.
*/
BUG_ON(!dma_declare_coherent_memory(&dev->dev,
GAPSPCI_DMA_BASE,
GAPSPCI_DMA_BASE,
GAPSPCI_DMA_SIZE,
DMA_MEMORY_MAP |
DMA_MEMORY_EXCLUSIVE));
break;
default:
printk("PCI: Failed resource fixup\n");
......
/*
* arch/sh/drivers/pci/fixups-sdk7780.c
*
* PCI fixups for the SDK7780SE03
*
* Copyright (C) 2003 Lineo uSolutions, Inc.
* Copyright (C) 2004 - 2006 Paul Mundt
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*/
#include <linux/pci.h>
#include "pci-sh4.h"
#include <asm/io.h>
int pci_fixup_pcic(void)
{
ctrl_outl(0x00000001, SH7780_PCI_VCR2);
/* Enable all interrupts, so we know what to fix */
pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
pci_write_reg(0x0000380F, SH7780_PCIAINTM);
/* Set up standard PCI config registers */
pci_write_reg(0xFB00, SH7780_PCISTATUS);
pci_write_reg(0x0047, SH7780_PCICMD);
pci_write_reg(0x00, SH7780_PCIPIF);
pci_write_reg(0x00, SH7780_PCISUB);
pci_write_reg(0x06, SH7780_PCIBCC);
pci_write_reg(0x1912, SH7780_PCISVID);
pci_write_reg(0x0001, SH7780_PCISID);
pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* PCI */
pci_write_reg(0x08000000, SH7780_PCILAR0); /* SHwy */
pci_write_reg(0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */
pci_write_reg(0x00000000, SH7780_PCIMBAR1);
pci_write_reg(0x00000000, SH7780_PCILAR1);
pci_write_reg(0x00000000, SH7780_PCILSR1);
pci_write_reg(0xAB000801, SH7780_PCIIBAR);
/*
* Set the MBR so PCI address is one-to-one with window,
* meaning all calls go straight through... use ifdef to
* catch erroneous assumption.
*/
pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
/* Set IOBR for window containing area specified in pci.h */
pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
pci_write_reg(0xA5000C01, SH7780_PCICR);
return 0;
}
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/types.h>
#include <asm/cpu/irq.h>
#include "pci-sh5.h"
static inline u8 bridge_swizzle(u8 pin, u8 slot)
{
return (((pin - 1) + slot) % 4) + 1;
}
int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
int result = -1;
/* The complication here is that the PCI IRQ lines from the Cayman's 2
5V slots get into the CPU via a different path from the IRQ lines
from the 3 3.3V slots. Thus, we have to detect whether the card's
interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling'
at the point where we cross from 5V to 3.3V is not the normal case.
The added complication is that we don't know that the 5V slots are
always bus 2, because a card containing a PCI-PCI bridge may be
plugged into a 3.3V slot, and this changes the bus numbering.
Also, the Cayman has an intermediate PCI bus that goes a custom
expansion board header (and to the secondary bridge). This bus has
never been used in practice.
The 1ary onboard PCI-PCI bridge is device 3 on bus 0
The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of
the 1ary bridge.
*/
struct slot_pin {
int slot;
int pin;
} path[4];
int i=0;
while (dev->bus->number > 0) {
slot = path[i].slot = PCI_SLOT(dev->devfn);
pin = path[i].pin = bridge_swizzle(pin, slot);
dev = dev->bus->self;
i++;
if (i > 3) panic("PCI path to root bus too long!\n");
}
slot = PCI_SLOT(dev->devfn);
/* This is the slot on bus 0 through which the device is eventually
reachable. */
/* Now work back up. */
if ((slot < 3) || (i == 0)) {
/* Bus 0 (incl. PCI-PCI bridge itself) : perform the final
swizzle now. */
result = IRQ_INTA + bridge_swizzle(pin, slot) - 1;
} else {
i--;
slot = path[i].slot;
pin = path[i].pin;
if (slot > 0) {
panic("PCI expansion bus device found - not handled!\n");
} else {
if (i > 0) {
/* 5V slots */
i--;
slot = path[i].slot;
pin = path[i].pin;
/* 'pin' was swizzled earlier wrt slot, don't do it again. */
result = IRQ_P2INTA + (pin - 1);
} else {
/* IRQ for 2ary PCI-PCI bridge : unused */
result = -1;
}
}
}
return result;
}
struct pci_channel board_pci_channels[] = {
{ &sh5_pci_ops, NULL, NULL, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
int __init pcibios_init_platform(void)
{
return sh5pci_init(__pa(memory_start),
__pa(memory_end) - __pa(memory_start));
}
......@@ -17,25 +17,13 @@
#include <asm/io.h>
#include "pci-sh4.h"
static char r7780rp_irq_tab[] __initdata = {
0, 1, 2, 3,
};
static char r7780mp_irq_tab[] __initdata = {
static char irq_tab[] __initdata = {
65, 66, 67, 68,
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
if (mach_is_r7780rp())
return r7780rp_irq_tab[slot];
if (mach_is_r7780mp() || mach_is_r7785rp())
return r7780mp_irq_tab[slot];
printk(KERN_ERR "PCI: Bad IRQ mapping "
"request for slot %d, func %d\n", slot, pin-1);
return -1;
return irq_tab[slot];
}
static struct resource sh7780_io_resource = {
......
/*
* linux/arch/sh/drivers/pci/ops-sdk7780.c
*
* Copyright (C) 2006 Nobuhiro Iwamatsu
*
* PCI initialization for the SDK7780SE03
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pci.h>
#include <asm/sdk7780.h>
#include <asm/io.h>
#include "pci-sh4.h"
/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
static char sdk7780_irq_tab[4][16] __initdata = {
/* INTA */
{ 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTB */
{ 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTC */
{ 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
/* INTD */
{ 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
};
int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
{
return sdk7780_irq_tab[pin-1][slot];
}
static struct resource sdk7780_io_resource = {
.name = "SH7780_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sdk7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
EXPORT_SYMBOL(board_pci_channels);
static struct sh4_pci_address_map sdk7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
.size = 0x04000000,
},
.window1 = {
.base = SH7780_CS3_BASE_ADDR,
.size = 0x04000000,
},
.flags = SH4_PCIC_NO_RESET,
};
int __init pcibios_init_platform(void)
{
printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
return sh7780_pcic_init(&sdk7780_pci_map);
}
/*
* Support functions for the SH5 PCI hardware.
*
* Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
* Copyright (C) 2003, 2004 Paul Mundt
* Copyright (C) 2004 Richard Curnow
*
* May be copied or modified under the terms of the GNU General Public
* License. See linux/COPYING for more information.
*/
#include <linux/kernel.h>
#include <linux/rwsem.h>
#include <linux/smp.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <linux/types.h>
#include <linux/irq.h>
#include <asm/pci.h>
#include <asm/io.h>
#include "pci-sh5.h"
static void __init pci_fixup_ide_bases(struct pci_dev *d)
{
int i;
/*
* PCI IDE controllers use non-standard I/O port decoding, respect it.
*/
if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
return;
printk("PCI: IDE base address fixup for %s\n", pci_name(d));
for(i=0; i<4; i++) {
struct resource *r = &d->resource[i];
if ((r->start & ~0x80) == 0x374) {
r->start |= 2;
r->end = r->start;
}
}
}
DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
char * __devinit pcibios_setup(char *str)
{
return str;
}
static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 *val)
{
SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
switch (size) {
case 1:
*val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
break;
case 2:
*val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
break;
case 4:
*val = SH5PCI_READ(PDR);
break;
}
return PCIBIOS_SUCCESSFUL;
}
static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
int size, u32 val)
{
SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
switch (size) {
case 1:
SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
break;
case 2:
SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
break;
case 4:
SH5PCI_WRITE(PDR, val);
break;
}
return PCIBIOS_SUCCESSFUL;
}
struct pci_ops sh5_pci_ops = {
.read = sh5pci_read,
.write = sh5pci_write,
};
......@@ -516,10 +516,8 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
PCI_COMMAND_MEMORY |
PCI_COMMAND_MASTER);
#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
PCI_LATENCY_TIMER, 0x80);
#endif
/* Allocate PCI I/O and/or memory space */
pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);
......
#ifndef __PCI_SH4_H
#define __PCI_SH4_H
#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \
defined(CONFIG_CPU_SUBTYPE_SH7785) || \
defined(CONFIG_CPU_SUBTYPE_SH7763)
#include "pci-sh7780.h"
#else
#include "pci-sh7751.h"
......
......@@ -6,6 +6,8 @@
*
* Definitions for the SH5 PCI hardware.
*/
#ifndef __PCI_SH5_H
#define __PCI_SH5_H
/* Product ID */
#define PCISH5_PID 0x350d
......@@ -73,13 +75,12 @@
#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */
#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */
/* Base address of registers */
#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000)
#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000)
/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */
extern unsigned long pcicr_virt;
/* Register selection macro */
#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x))
/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
......@@ -104,4 +105,9 @@
#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18)
#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18)
extern struct pci_ops sh5_pci_ops;
/* arch/sh/drivers/pci/pci-sh5.c */
int sh5pci_init(unsigned long memStart, unsigned long memSize);
#endif /* __PCI_SH5_H */
......@@ -58,6 +58,7 @@ static int __init sh7780_pci_init(void)
id = pci_read_reg(SH7780_PCIVID);
if ((id & 0xffff) == SH7780_VENDOR_ID) {
switch ((id >> 16) & 0xffff) {
case SH7763_DEVICE_ID:
case SH7780_DEVICE_ID:
case SH7781_DEVICE_ID:
case SH7785_DEVICE_ID:
......
......@@ -16,6 +16,7 @@
#define SH7780_VENDOR_ID 0x1912
#define SH7781_DEVICE_ID 0x0001
#define SH7780_DEVICE_ID 0x0002
#define SH7763_DEVICE_ID 0x0004
#define SH7785_DEVICE_ID 0x0007
/* SH7780 Control Registers */
......
......@@ -71,7 +71,7 @@ subsys_initcall(pcibios_init);
* Called after each bus is probed, but before its children
* are examined.
*/
void __devinit pcibios_fixup_bus(struct pci_bus *bus)
void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
{
pci_read_bridge_bases(bus);
}
......
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#
# Makefile for the Linux/SuperH kernel.
#
extra-y := head_32.o init_task.o vmlinux.lds
obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \
syscalls_32.o time_32.o topology.o traps.o traps_32.o
obj-y += cpu/ timers/
obj-$(CONFIG_VSYSCALL) += vsyscall/
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_BINFMT_ELF) += dump_task.o
EXTRA_CFLAGS += -Werror
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