Commit e216ce60 authored by Stephen Boyd's avatar Stephen Boyd

clk: qcom: Add support for APQ8064 multimedia clocks

The APQ8064 multimedia clock controller is fairly similar to the
8960 multimedia clock controller, except that gfx2d0/1 has been
removed and the gfx3d frequency is slightly faster when using the
newly introduced PLL15. We also add vcap clocks and a couple new
TV clocks.
Signed-off-by: default avatarStephen Boyd <sboyd@codeaurora.org>
parent d8c25d3a
......@@ -4,6 +4,7 @@ Qualcomm Multimedia Clock & Reset Controller Binding
Required properties :
- compatible : shall contain only one of the following:
"qcom,mmcc-apq8064"
"qcom,mmcc-apq8084"
"qcom,mmcc-msm8660"
"qcom,mmcc-msm8960"
......
This diff is collapsed.
......@@ -133,5 +133,13 @@
#define CSIPHY0_TIMER_CLK 116
#define PLL1 117
#define PLL2 118
#define RGB_TV_CLK 119
#define NPL_TV_CLK 120
#define VCAP_AHB_CLK 121
#define VCAP_AXI_CLK 122
#define VCAP_SRC 123
#define VCAP_CLK 124
#define VCAP_NPL_CLK 125
#define PLL15 126
#endif
......@@ -89,5 +89,13 @@
#define CSI2_RESET 72
#define CSI_RDI1_RESET 73
#define CSI_RDI2_RESET 74
#define GFX3D_AXI_RESET 75
#define VCAP_AXI_RESET 76
#define SMMU_VCAP_AHB_RESET 77
#define VCAP_AHB_RESET 78
#define CSI_RDI_RESET 79
#define CSI_PIX_RESET 80
#define VCAP_NPL_RESET 81
#define VCAP_RESET 82
#endif
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