Commit e57f1c02 authored by Mahesh Kumar's avatar Mahesh Kumar Committed by Maarten Lankhorst

drm/i915/gen9+: Add has_ipc flag in device info structure

New Isochronous Priority Control (IPC) capability is introduced in newer
GEN platforms. This patch adds a device info flag to indicate if platform
supports IPC. Patch also sets this flag in supported platforms.
Signed-off-by: default avatarMahesh Kumar <mahesh1.kumar@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170817134529.2839-7-mahesh1.kumar@intel.com
parent d86ba628
...@@ -798,7 +798,8 @@ struct intel_csr { ...@@ -798,7 +798,8 @@ struct intel_csr {
func(cursor_needs_physical); \ func(cursor_needs_physical); \
func(hws_needs_physical); \ func(hws_needs_physical); \
func(overlay_needs_physical); \ func(overlay_needs_physical); \
func(supports_tv); func(supports_tv); \
func(has_ipc);
struct sseu_dev_info { struct sseu_dev_info {
u8 slice_mask; u8 slice_mask;
...@@ -3119,6 +3120,8 @@ intel_info(const struct drm_i915_private *dev_priv) ...@@ -3119,6 +3120,8 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm) #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc) #define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
#define HAS_IPC(dev_priv) ((dev_priv)->info.has_ipc)
/* /*
* For now, anything with a GuC requires uCode loading, and then supports * For now, anything with a GuC requires uCode loading, and then supports
* command submission once loaded. But these are logically independent * command submission once loaded. But these are logically independent
......
...@@ -482,6 +482,7 @@ static const struct intel_device_info intel_skylake_gt4_info __initconst = { ...@@ -482,6 +482,7 @@ static const struct intel_device_info intel_skylake_gt4_info __initconst = {
.has_full_48bit_ppgtt = 1, \ .has_full_48bit_ppgtt = 1, \
.has_reset_engine = 1, \ .has_reset_engine = 1, \
.has_snoop = true, \ .has_snoop = true, \
.has_ipc = 1, \
GEN_DEFAULT_PIPEOFFSETS, \ GEN_DEFAULT_PIPEOFFSETS, \
IVB_CURSOR_OFFSETS, \ IVB_CURSOR_OFFSETS, \
BDW_COLORS BDW_COLORS
...@@ -505,6 +506,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = { ...@@ -505,6 +506,7 @@ static const struct intel_device_info intel_geminilake_info __initconst = {
.platform = INTEL_KABYLAKE, \ .platform = INTEL_KABYLAKE, \
.has_csr = 1, \ .has_csr = 1, \
.has_guc = 1, \ .has_guc = 1, \
.has_ipc = 1, \
.ddb_size = 896 .ddb_size = 896
static const struct intel_device_info intel_kabylake_gt1_info __initconst = { static const struct intel_device_info intel_kabylake_gt1_info __initconst = {
...@@ -530,6 +532,7 @@ static const struct intel_device_info intel_kabylake_gt3_info __initconst = { ...@@ -530,6 +532,7 @@ static const struct intel_device_info intel_kabylake_gt3_info __initconst = {
.platform = INTEL_COFFEELAKE, \ .platform = INTEL_COFFEELAKE, \
.has_csr = 1, \ .has_csr = 1, \
.has_guc = 1, \ .has_guc = 1, \
.has_ipc = 1, \
.ddb_size = 896 .ddb_size = 896
static const struct intel_device_info intel_coffeelake_gt1_info __initconst = { static const struct intel_device_info intel_coffeelake_gt1_info __initconst = {
...@@ -556,6 +559,7 @@ static const struct intel_device_info intel_cannonlake_gt2_info __initconst = { ...@@ -556,6 +559,7 @@ static const struct intel_device_info intel_cannonlake_gt2_info __initconst = {
.gt = 2, .gt = 2,
.ddb_size = 1024, .ddb_size = 1024,
.has_csr = 1, .has_csr = 1,
.has_ipc = 1,
.color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 } .color = { .degamma_lut_size = 0, .gamma_lut_size = 1024 }
}; };
......
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