Commit e5f51a62 authored by Liu Gang's avatar Liu Gang Committed by Shawn Guo

arm64: dts: ls2080a: Add 'dma-coherent' for ls2080a PCI nodes

The 'dma-coherent' indicates that the hardware IP block can ensure
the coherency of the data transferred from/to the IP block. This
can avoid the software cache flush/invalid actions, and improve
the performance significantly.

The PCI IP block of ls2080a has this capability, so adding this
feature to improve the PCI performance.
Signed-off-by: default avatarLiu Gang <Gang.Liu@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent d5c8b122
......@@ -588,6 +588,7 @@ pcie@3400000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
num-lanes = <4>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x10 0x00010000 0x0 0x00010000 /* downstream I/O */
......@@ -612,6 +613,7 @@ pcie@3500000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
num-lanes = <4>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x12 0x00010000 0x0 0x00010000 /* downstream I/O */
......@@ -636,6 +638,7 @@ pcie@3600000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
num-lanes = <8>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x14 0x00010000 0x0 0x00010000 /* downstream I/O */
......@@ -660,6 +663,7 @@ pcie@3700000 {
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
dma-coherent;
num-lanes = <4>;
bus-range = <0x0 0xff>;
ranges = <0x81000000 0x0 0x00000000 0x16 0x00010000 0x0 0x00010000 /* downstream I/O */
......
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