[ARM PATCH] 1781/1: Add TI OMAP support, arch files

Patch from Tony Lindgren

This patch adds the arch files for Texas Instruments OMAP-1510 and 
1610 processors. 

OMAP is an embedded ARM processor with integrated DSP.

OMAP-1610 has hardware support for USB OTG, which might be of interest
to Linux developers. OMAP-1610 could be easily be used as development 
platform to add USB OTG support to Linux.

This patch is an updated version of patch 1769/1 with Russell King's
comments fixed. This patch requires patch 1777/1 applied.

This patch is brought to you by various linux-omap developers.

arch/arm/mach-omap/Kconfig

-#
-# Placeholder for OMAP support
-#
+
+menu "TI OMAP Implementations"
+
+choice
+	prompt "OMAP Core Type"
+	depends on ARCH_OMAP
+	default ARCH_OMAP1510
+
+config ARCH_OMAP1510
+	bool "OMAP-1510 Based System"
+	select CPU_ARM925T
+	select CPU_DCACHE_WRITETHROUGH
+
+config ARCH_OMAP1610
+	bool "OMAP-1610 Based System"
+	select CPU_ARM926T
+
+endchoice
+
+choice
+	prompt "OMAP Board Type"
+	depends on ARCH_OMAP
+	default MACH_OMAP_INNOVATOR
+
+config MACH_OMAP_INNOVATOR
+	bool "TI Innovator"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610
+	help
+          TI OMAP 1510 or 1610 Innovator board support. Say Y here if you
+          have such a board.
+
+config MACH_OMAP_GENERIC
+	bool "Generic OMAP board"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610
+	help
+          Support for generic OMAP-1510 or 1610 board with no
+          FPGA. Can be used as template for porting Linux to
+          custom OMAP boards. Say Y here if you have a custom
+          board.
+
+endchoice
+
+comment "OMAP Feature Selections"
+
+config MACH_OMAP_H2
+	bool "TI H2 Support"
+	depends on ARCH_OMAP1610 && MACH_OMAP_INNOVATOR
+    	help
+	  TI OMAP 1610 H2 board support. Say Y here if you have such
+	  a board.
+
+config OMAP_MUX
+	bool "OMAP multiplexing support"
+        depends on ARCH_OMAP
+	default y
+        help
+          Pin multiplexing support for OMAP boards. If your bootloader
+          sets the multiplexing correctly, say N. Otherwise, or if unsure,
+          say Y.
+
+config OMAP_MUX_DEBUG
+	bool "Multiplexing debug output"
+        depends on OMAP_MUX
+        default n
+        help
+          Makes the multiplexing functions print out a lot of debug info.
+          This is useful if you want to find out the correct values of the
+          multiplexing registers.
+
+config OMAP_ARM_195MHZ
+	bool "OMAP ARM 195 MHz CPU"
+	depends on ARCH_OMAP730
+	help
+          Enable 195MHz clock for OMAP CPU. If unsure, say N.
+
+config OMAP_ARM_192MHZ
+	bool "OMAP ARM 192 MHz CPU"
+	depends on ARCH_OMAP1610
+	help
+          Enable 192MHz clock for OMAP CPU. If unsure, say N.
+
+config OMAP_ARM_182MHZ
+	bool "OMAP ARM 182 MHz CPU"
+	depends on ARCH_OMAP730
+	help
+          Enable 182MHz clock for OMAP CPU. If unsure, say N.
+
+config OMAP_ARM_168MHZ
+	bool "OMAP ARM 168 MHz CPU"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610 || ARCH_OMAP730
+	help
+          Enable 168MHz clock for OMAP CPU. If unsure, say N.
+
+config OMAP_ARM_120MHZ
+	bool "OMAP ARM 120 MHz CPU"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610 || ARCH_OMAP730
+	help
+          Enable 120MHz clock for OMAP CPU. If unsure, say N.
+
+config OMAP_ARM_60MHZ
+	bool "OMAP ARM 60 MHz CPU"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610 || ARCH_OMAP730
+        default y
+	help
+          Enable 60MHz clock for OMAP CPU. If unsure, say Y.
+
+config OMAP_ARM_30MHZ
+	bool "OMAP ARM 30 MHz CPU"
+	depends on ARCH_OMAP1510 || ARCH_OMAP1610 || ARCH_OMAP730
+	help
+          Enable 30MHz clock for OMAP CPU. If unsure, say N.
+
+endmenu

arch/arm/mach-omap/Makefile

+#
+# Makefile for the linux kernel.
+#
+
+# Common support
+obj-y := common.o irq.o dma.o clocks.o mux.o bus.o gpio.o
+obj-m :=
+obj-n :=
+obj-  :=
+led-y := leds.o
+
+# OCPI interconnect support for 1610
+ifeq ($(CONFIG_ARCH_OMAP1610),y)
+obj-y += ocpi.o
+ifeq ($(CONFIG_OMAP_INNOVATOR),y)
+obj-y += innovator1610.o
+endif
+endif
+
+ifeq ($(CONFIG_ARCH_OMAP1510),y)
+ifeq ($(CONFIG_OMAP_INNOVATOR),y)
+obj-y += innovator1510.o fpga.o
+endif
+endif
+
+# Specific board support
+obj-$(CONFIG_MACH_OMAP_GENERIC) += omap-generic.o
+obj-$(CONFIG_MACH_OMAP_PERSEUS2) += omap-perseus2.o
+
+# LEDs support
+led-$(CONFIG_OMAP_INNOVATOR) += leds-innovator.o
+led-$(CONFIG_MACH_OMAP_PERSEUS2) += leds-perseus2.o
+obj-$(CONFIG_LEDS) += $(led-y)
+
+# kgdb support
+obj-$(CONFIG_KGDB_SERIAL)	+= kgdb-serial.o

arch/arm/mach-omap/bus.c

+/*
+ * linux/arch/arm/mach-omap/bus.c
+ *
+ * Virtual bus for OMAP. Allows better power management, such as managing
+ * shared clocks, and mapping of bus addresses to Local Bus addresses.
+ *
+ * See drivers/usb/host/ohci-omap.c or drivers/video/omap/omapfb.c for
+ * examples on how to register drivers to this bus.
+ *
+ * Copyright (C) 2003 - 2004 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ * Portions of code based on sa1111.c.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/ptrace.h>
+#include <linux/errno.h>
+#include <linux/ioport.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+
+#include <asm/hardware.h>
+#include <asm/mach-types.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/bus.h>
+
+static int omap_bus_match(struct device *_dev, struct device_driver *_drv);
+static int omap_bus_suspend(struct device *dev, u32 state);
+static int omap_bus_resume(struct device *dev);
+
+/*
+ * OMAP bus definitions
+ *
+ * NOTE: Most devices should use TIPB. LBUS does automatic address mapping
+ *	 to Local Bus addresses, and should only be used for Local Bus devices.
+ *	 We may add new buses later on for power management reasons. Basically
+ *	 we want to be able to turn off any bus if it's not used by device
+ *	 drivers.
+ */
+static struct device omap_bus_devices[OMAP_NR_BUSES] = {
+	{
+		.bus_id		= OMAP_BUS_NAME_TIPB
+	}, {
+		.bus_id		= OMAP_BUS_NAME_LBUS
+	},
+};
+
+static struct bus_type omap_bus_types[OMAP_NR_BUSES] = {
+	{
+		.name		= OMAP_BUS_NAME_TIPB,
+		.match		= omap_bus_match,
+		.suspend	= omap_bus_suspend,
+		.resume		= omap_bus_resume,
+	}, {
+		.name		= OMAP_BUS_NAME_LBUS,	/* Local bus on 1510 */
+		.match		= omap_bus_match,
+		.suspend	= omap_bus_suspend,
+		.resume		= omap_bus_resume,
+	},
+};
+
+#ifdef CONFIG_ARCH_OMAP1510
+/*
+ * NOTE: This code _should_ go somewhere else. But let's wait for the
+ *	 dma-mapping code to settle down first.
+ */
+
+/*
+ * Test for Local Bus device in order to do address translation between
+ * dma_handle and Local Bus address.
+ */
+inline int dmadev_uses_omap_lbus(struct device * dev)
+{
+	return dev->bus == &omap_bus_types[OMAP_BUS_LBUS] ? 1 : 0;
+}
+
+/*
+ * Translate bus address to Local Bus address for dma-mapping
+ */
+inline int dmadev_to_lbus(dma_addr_t addr)
+{
+	return bus_to_lbus(addr);
+}
+
+/*
+ * Translate Local Bus address to bus address for dma-mapping
+ */
+inline int lbus_to_dmadev(dma_addr_t addr)
+{
+	return lbus_to_bus(addr);
+}
+#endif
+
+static int omap_bus_match(struct device *dev, struct device_driver *drv)
+{
+	struct omap_dev *omapdev = OMAP_DEV(dev);
+	struct omap_driver *omapdrv = OMAP_DRV(drv);
+
+	return omapdev->devid == omapdrv->devid;
+}
+
+static int omap_bus_suspend(struct device *dev, u32 state)
+{
+	struct omap_dev *omapdev = OMAP_DEV(dev);
+	struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
+	int ret = 0;
+
+	if (omapdrv && omapdrv->suspend)
+		ret = omapdrv->suspend(omapdev, state);
+	return ret;
+}
+
+static int omap_bus_resume(struct device *dev)
+{
+	struct omap_dev *omapdev = OMAP_DEV(dev);
+	struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
+	int ret = 0;
+
+	if (omapdrv && omapdrv->resume)
+		ret = omapdrv->resume(omapdev);
+	return ret;
+}
+
+static int omap_device_probe(struct device *dev)
+{
+	struct omap_dev *omapdev = OMAP_DEV(dev);
+	struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
+	int ret = -ENODEV;
+
+	if (omapdrv && omapdrv->probe)
+		ret = omapdrv->probe(omapdev);
+
+	return ret;
+}
+
+static int omap_device_remove(struct device *dev)
+{
+	struct omap_dev *omapdev = OMAP_DEV(dev);
+	struct omap_driver *omapdrv = OMAP_DRV(dev->driver);
+	int ret = 0;
+
+	if (omapdrv && omapdrv->remove)
+		ret = omapdrv->remove(omapdev);
+	return ret;
+}
+
+int omap_device_register(struct omap_dev *odev)
+{
+	if (!odev)
+		return -EINVAL;
+
+	if (odev->busid < 0 || odev->busid >= OMAP_NR_BUSES) {
+		printk(KERN_ERR "%s: busid invalid: %s: bus: %i\n",
+		       __FUNCTION__, odev->name, odev->busid);
+		return -EINVAL;
+	}
+
+	odev->dev.parent = &omap_bus_devices[odev->busid];
+	odev->dev.bus = &omap_bus_types[odev->busid];
+
+	/* This is needed for USB OHCI to work */
+	if (odev->dma_mask)
+		odev->dev.dma_mask = odev->dma_mask;
+
+	snprintf(odev->dev.bus_id, BUS_ID_SIZE, "%s%u",
+		 odev->name, odev->devid);
+
+	printk("Registering OMAP device '%s'. Parent at %s\n",
+		 odev->dev.bus_id, odev->dev.parent->bus_id);
+
+	return device_register(&odev->dev);
+}
+
+void omap_device_unregister(struct omap_dev *odev)
+{
+	if (odev)
+		device_unregister(&odev->dev);
+}
+
+int omap_driver_register(struct omap_driver *driver)
+{
+	int ret;
+
+	if (driver->busid < 0 || driver->busid >= OMAP_NR_BUSES) {
+		printk(KERN_ERR "%s: busid invalid: bus: %i device: %i\n",
+		       __FUNCTION__, driver->busid, driver->devid);
+		return -EINVAL;
+	}
+
+	driver->drv.probe = omap_device_probe;
+	driver->drv.remove = omap_device_remove;
+	driver->drv.bus = &omap_bus_types[driver->busid];
+
+	/*
+	 * driver_register calls bus_add_driver
+	 */
+	ret = driver_register(&driver->drv);
+
+	return ret;
+}
+
+void omap_driver_unregister(struct omap_driver *driver)
+{
+	driver_unregister(&driver->drv);
+}
+
+static int __init omap_bus_init(void)
+{
+	int i, ret;
+
+	/* Initialize all OMAP virtual buses */
+	for (i = 0; i < OMAP_NR_BUSES; i++) {
+		ret = device_register(&omap_bus_devices[i]);
+		if (ret != 0) {
+			printk(KERN_ERR "Unable to register bus device %s\n",
+			       omap_bus_devices[i].bus_id);
+			continue;
+		}
+		ret = bus_register(&omap_bus_types[i]);
+		if (ret != 0) {
+			printk(KERN_ERR "Unable to register bus %s\n",
+			       omap_bus_types[i].name);
+			device_unregister(&omap_bus_devices[i]);
+		}
+	}
+	printk("OMAP virtual buses initialized\n");
+
+	return ret;
+}
+
+static void __exit omap_bus_exit(void)
+{
+	int i;
+
+	/* Unregister all OMAP virtual buses */
+	for (i = 0; i < OMAP_NR_BUSES; i++) {
+		bus_unregister(&omap_bus_types[i]);
+		device_unregister(&omap_bus_devices[i]);
+	}
+}
+
+module_init(omap_bus_init);
+module_exit(omap_bus_exit);
+
+MODULE_DESCRIPTION("Virtual bus for OMAP");
+MODULE_LICENSE("GPL");
+
+EXPORT_SYMBOL(omap_bus_types);
+EXPORT_SYMBOL(omap_driver_register);
+EXPORT_SYMBOL(omap_driver_unregister);
+EXPORT_SYMBOL(omap_device_register);
+EXPORT_SYMBOL(omap_device_unregister);
+
+#ifdef CONFIG_ARCH_OMAP1510
+EXPORT_SYMBOL(dmadev_uses_omap_lbus);
+EXPORT_SYMBOL(dmadev_to_lbus);
+EXPORT_SYMBOL(lbus_to_dmadev);
+#endif

arch/arm/mach-omap/common.c

+/*
+ * linux/arch/arm/mach-omap/common.c
+ *
+ * Code common to all OMAP machines.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/pm.h>
+
+#include <asm/hardware.h>
+#include <asm/system.h>
+#include <asm/pgtable.h>
+#include <asm/mach/map.h>
+#include <asm/arch/clocks.h>
+#include <asm/io.h>
+
+#include "common.h"
+
+/*
+ * Common OMAP I/O mapping
+ *
+ * The machine specific code may provide the extra mapping besides the
+ * default mapping provided here.
+ */
+
+static struct map_desc standard_io_desc[] __initdata = {
+ { IO_BASE,          IO_START,          IO_SIZE,          MT_DEVICE },
+ { OMAP_DSP_BASE,    OMAP_DSP_START,    OMAP_DSP_SIZE,    MT_DEVICE },
+ { OMAP_DSPREG_BASE, OMAP_DSPREG_START, OMAP_DSPREG_SIZE, MT_DEVICE },
+ { OMAP_SRAM_BASE,   OMAP_SRAM_START,   OMAP_SRAM_SIZE,   MT_DEVICE }
+};
+
+static int initialized = 0;
+
+static void __init _omap_map_io(void)
+{
+	initialized = 1;
+
+	iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
+
+	/* REVISIT: Refer to OMAP5910 Errata, Advisory SYS_1: "Timeout Abort
+	 * on a Posted Write in the TIPB Bridge".
+	 */
+	__raw_writew(0x0, MPU_PUBLIC_TIPB_CNTL_REG);
+	__raw_writew(0x0, MPU_PRIVATE_TIPB_CNTL_REG);
+
+	/* Must init clocks early to assure that timer interrupt works
+	 */
+	init_ck();
+}
+
+/*
+ * This should only get called from board specific init
+ */
+void omap_map_io(void)
+{
+	if (!initialized)
+		_omap_map_io();
+}
+
+EXPORT_SYMBOL(omap_map_io);
+

arch/arm/mach-omap/common.h

+/*
+ * linux/arch/arm/mach-omap/common.h
+ */
+
+extern void omap_map_io(void);
+

arch/arm/mach-omap/fpga.c

+/*
+ * linux/arch/arm/mach-omap/fpga.c
+ *
+ * Interrupt handler for OMAP-1510 FPGA
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ *
+ * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
+ * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+
+#include <asm/hardware.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+
+#include <asm/arch/fpga.h>
+#include <asm/arch/gpio.h>
+
+unsigned char fpga_read(int reg)
+{
+	return __raw_readb(reg);
+}
+
+void fpga_write(unsigned char val, int reg)
+{
+	__raw_writeb(val, reg);
+}
+
+static void fpga_mask_irq(unsigned int irq)
+{
+	irq -= IH_FPGA_BASE;
+
+	if (irq < 8)
+		__raw_writeb((__raw_readb(OMAP1510P1_FPGA_IMR_LO)
+			      & ~(1 << irq)), OMAP1510P1_FPGA_IMR_LO);
+	else if (irq < 16)
+		__raw_writeb((__raw_readb(OMAP1510P1_FPGA_IMR_HI)
+			      & ~(1 << (irq - 8))), OMAP1510P1_FPGA_IMR_HI);
+	else
+		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
+			      & ~(1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
+}
+
+
+static inline u32 get_fpga_unmasked_irqs(void)
+{
+	return
+		((__raw_readb(OMAP1510P1_FPGA_ISR_LO) &
+		  __raw_readb(OMAP1510P1_FPGA_IMR_LO))) |
+		((__raw_readb(OMAP1510P1_FPGA_ISR_HI) &
+		  __raw_readb(OMAP1510P1_FPGA_IMR_HI)) << 8) |
+		((__raw_readb(INNOVATOR_FPGA_ISR2) &
+		  __raw_readb(INNOVATOR_FPGA_IMR2)) << 16);
+}
+
+
+static void fpga_ack_irq(unsigned int irq)
+{
+	/* Don't need to explicitly ACK FPGA interrupts */
+}
+
+static void fpga_unmask_irq(unsigned int irq)
+{
+	irq -= IH_FPGA_BASE;
+
+	if (irq < 8)
+		__raw_writeb((__raw_readb(OMAP1510P1_FPGA_IMR_LO) | (1 << irq)),
+		     OMAP1510P1_FPGA_IMR_LO);
+	else if (irq < 16)
+		__raw_writeb((__raw_readb(OMAP1510P1_FPGA_IMR_HI)
+			      | (1 << (irq - 8))), OMAP1510P1_FPGA_IMR_HI);
+	else
+		__raw_writeb((__raw_readb(INNOVATOR_FPGA_IMR2)
+			      | (1 << (irq - 16))), INNOVATOR_FPGA_IMR2);
+}
+
+static void fpga_mask_ack_irq(unsigned int irq)
+{
+	fpga_mask_irq(irq);
+	fpga_ack_irq(irq);
+}
+
+void innovator_fpga_IRQ_demux(unsigned int irq, struct irqdesc *desc,
+			      struct pt_regs *regs)
+{
+	struct irqdesc *d;
+	u32 stat;
+	int fpga_irq;
+
+	/*
+	 * Acknowledge the parent IRQ.
+	 */
+	desc->chip->ack(irq);
+
+	for (;;) {
+		stat = get_fpga_unmasked_irqs();
+
+		if (!stat) {
+			break;
+		}
+
+		for (fpga_irq = IH_FPGA_BASE;
+			(fpga_irq < (IH_FPGA_BASE + NR_FPGA_IRQS)) && stat;
+			fpga_irq++, stat >>= 1) {
+			if (stat & 1) {
+				d = irq_desc + fpga_irq;
+				d->handle(fpga_irq, d, regs);
+				desc->chip->unmask(irq);
+			}
+		}
+	}
+}
+
+static struct irqchip omap_fpga_irq_ack = {
+	.ack		= fpga_mask_ack_irq,
+	.mask		= fpga_mask_irq,
+	.unmask		= fpga_unmask_irq,
+};
+
+
+static struct irqchip omap_fpga_irq = {
+	.ack		= fpga_ack_irq,
+	.mask		= fpga_mask_irq,
+	.unmask		= fpga_unmask_irq,
+};
+
+/*
+ * All of the FPGA interrupt request inputs except for the touchscreen are
+ * edge-sensitive; the touchscreen is level-sensitive.  The edge-sensitive
+ * interrupts are acknowledged as a side-effect of reading the interrupt
+ * status register from the FPGA.  The edge-sensitive interrupt inputs
+ * cause a problem with level interrupt requests, such as Ethernet.  The
+ * problem occurs when a level interrupt request is asserted while its
+ * interrupt input is masked in the FPGA, which results in a missed
+ * interrupt.
+ *
+ * In an attempt to workaround the problem with missed interrupts, the
+ * mask_ack routine for all of the FPGA interrupts has been changed from
+ * fpga_mask_ack_irq() to fpga_ack_irq() so that the specific FPGA interrupt
+ * being serviced is left unmasked.  We can do this because the FPGA cascade
+ * interrupt is installed with the SA_INTERRUPT flag, which leaves all
+ * interrupts masked at the CPU while an FPGA interrupt handler executes.
+ *
+ * Limited testing indicates that this workaround appears to be effective
+ * for the smc9194 Ethernet driver used on the Innovator.  It should work
+ * on other FPGA interrupts as well, but any drivers that explicitly mask
+ * interrupts at the interrupt controller via disable_irq/enable_irq
+ * could pose a problem.
+ */
+void fpga_init_irq(void)
+{
+	int i;
+
+	__raw_writeb(0, OMAP1510P1_FPGA_IMR_LO);
+	__raw_writeb(0, OMAP1510P1_FPGA_IMR_HI);
+	__raw_writeb(0, INNOVATOR_FPGA_IMR2);
+
+	for (i = IH_FPGA_BASE; i < (IH_FPGA_BASE + NR_FPGA_IRQS); i++) {
+
+		if (i == INT_FPGA_TS) {
+			/*
+			 * The touchscreen interrupt is level-sensitive, so
+			 * we'll use the regular mask_ack routine for it.
+			 */
+			set_irq_chip(i, &omap_fpga_irq_ack);
+		}
+		else {
+			/*
+			 * All FPGA interrupts except the touchscreen are
+			 * edge-sensitive, so we won't mask them.
+			 */
+			set_irq_chip(i, &omap_fpga_irq);
+		}
+
+		set_irq_handler(i, do_level_IRQ);
+		set_irq_flags(i, IRQF_VALID);
+	}
+
+	/*
+	 * The FPGA interrupt line is connected to GPIO13. Claim this pin for
+	 * the ARM.
+	 *
+	 * NOTE: For general GPIO/MPUIO access and interrupts, please see
+	 * gpio.[ch]
+	 */
+	omap_request_gpio(13);
+	omap_set_gpio_direction(13, 1);
+	omap_set_gpio_edge_ctrl(13, OMAP_GPIO_RISING_EDGE);
+	set_irq_chained_handler(INT_FPGA, innovator_fpga_IRQ_demux);
+}
+
+EXPORT_SYMBOL(fpga_init_irq);
+EXPORT_SYMBOL(fpga_read);
+EXPORT_SYMBOL(fpga_write);

arch/arm/mach-omap/innovator1510.c

+/*
+ * linux/arch/arm/mach-omap/innovator1510.c
+ *
+ * Board specific inits for OMAP-1510 Innovator
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ *
+ * Separated FPGA interrupts from innovator1510.c and cleaned up for 2.6
+ * Copyright (C) 2004 Nokia Corporation by Tony Lindrgen <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+
+#include <asm/hardware.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/clocks.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/fpga.h>
+
+#include "common.h"
+
+extern int omap_gpio_init(void);
+
+void innovator_init_irq(void)
+{
+	omap_init_irq();
+	omap_gpio_init();
+	fpga_init_irq();
+}
+
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= OMAP1510P1_FPGA_ETHR_START,	/* Physical */
+		.end	= OMAP1510P1_FPGA_ETHR_START + 16,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= INT_ETHER,
+		.end	= INT_ETHER,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+	&smc91x_device,
+};
+
+static void __init innovator_init(void)
+{
+	if (!machine_is_innovator())
+		return;
+
+	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+/* Only FPGA needs to be mapped here. All others are done with ioremap */
+static struct map_desc innovator_io_desc[] __initdata = {
+{ OMAP1510P1_FPGA_BASE, OMAP1510P1_FPGA_START, OMAP1510P1_FPGA_SIZE,
+	MT_DEVICE },
+};
+
+static void __init innovator_map_io(void)
+{
+	omap_map_io();
+	iotable_init(innovator_io_desc, ARRAY_SIZE(innovator_io_desc));
+
+	/* Dump the Innovator FPGA rev early - useful info for support. */
+	printk("Innovator FPGA Rev %d.%d Board Rev %d\n",
+	       fpga_read(OMAP1510P1_FPGA_REV_HIGH),
+	       fpga_read(OMAP1510P1_FPGA_REV_LOW),
+	       fpga_read(OMAP1510P1_FPGA_BOARD_REV));
+}
+
+MACHINE_START(INNOVATOR, "TI-Innovator/OMAP1510")
+	MAINTAINER("MontaVista Software, Inc.")
+	BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
+	BOOT_PARAMS(0x10000100)
+	MAPIO(innovator_map_io)
+	INITIRQ(innovator_init_irq)
+	INIT_MACHINE(innovator_init)
+MACHINE_END

arch/arm/mach-omap/innovator1610.c

+/*
+ * linux/arch/arm/mach-omap/innovator1610.c
+ *
+ * This file contains Innovator-specific code.
+ *
+ * Copyright (C) 2002 MontaVista Software, Inc.
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/major.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/errno.h>
+
+#include <asm/setup.h>
+#include <asm/page.h>
+#include <asm/hardware.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/arch/irqs.h>
+
+#include "common.h"
+
+void
+innovator_init_irq(void)
+{
+	omap_init_irq();
+}
+
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= OMAP1610_ETHR_START,		/* Physical */
+		.end	= OMAP1610_ETHR_START + SZ_4K,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= 0,				/* Really GPIO 0 */
+		.end	= 0,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+	&smc91x_device,
+};
+
+static void __init innovator_init(void)
+{
+	if (!machine_is_innovator())
+		return;
+
+	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+static struct map_desc innovator_io_desc[] __initdata = {
+{ OMAP1610_ETHR_BASE, OMAP1610_ETHR_START, OMAP1610_ETHR_SIZE,MT_DEVICE },
+{ OMAP1610_NOR_FLASH_BASE, OMAP1610_NOR_FLASH_START, OMAP1610_NOR_FLASH_SIZE,
+	MT_DEVICE },
+};
+
+static void __init innovator_map_io(void)
+{
+	omap_map_io();
+	iotable_init(innovator_io_desc, ARRAY_SIZE(innovator_io_desc));
+}
+
+MACHINE_START(INNOVATOR, "TI-Innovator/OMAP1610")
+	MAINTAINER("MontaVista Software, Inc.")
+	BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
+	BOOT_PARAMS(0x10000100)
+	MAPIO(innovator_map_io)
+	INITIRQ(innovator_init_irq)
+	INIT_MACHINE(innovator_init)
+MACHINE_END
+

arch/arm/mach-omap/irq.c

+/*
+ * linux/arch/arm/mach-omap/irq.c
+ *
+ * Interrupt handler for OMAP-1510 and 1610
+ *
+ * Copyright (C) 2001 RidgeRun, Inc.
+ * Author: Greg Lonnon <glonnon@ridgerun.com>
+ *
+ * Modified for OMAP-1610 by Tony Lindgren <tony.lindgren@nokia.com>
+ * GPIO interrupt handler moved to gpio.c for OMAP-1610 by Juha Yrjola
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/ptrace.h>
+
+#include <asm/hardware.h>
+#include <asm/irq.h>
+#include <asm/mach/irq.h>
+#include <asm/arch/gpio.h>
+
+#include <asm/io.h>
+
+#define NUM_IRQS	IH_BOARD_BASE
+
+static void mask_irq(unsigned int irq);
+static void unmask_irq(unsigned int irq);
+static void ack_irq(unsigned int irq);
+
+static inline void
+write_ih(int level, int reg, u32 value)
+{
+	if (cpu_is_omap1510()) {
+		__raw_writel(value,
+			(IO_ADDRESS((level ? OMAP_IH2_BASE : OMAP_IH1_BASE) +
+				(reg))));
+	} else {
+		if (level) {
+			__raw_writel(value,
+				IO_ADDRESS(OMAP_IH2_BASE + ((level - 1) << 8) +
+					reg));
+		} else {
+			__raw_writel(value, IO_ADDRESS(OMAP_IH1_BASE + reg));
+		}
+	}
+}
+
+static inline u32
+read_ih(int level, int reg)
+{
+	if (cpu_is_omap1510()) {
+		return __raw_readl((IO_ADDRESS((level ? OMAP_IH2_BASE : OMAP_IH1_BASE)
+					 + (reg))));
+	} else {
+		if (level) {
+			return __raw_readl(IO_ADDRESS(OMAP_IH2_BASE +
+					((level - 1) << 8) + reg));
+		} else {
+			return __raw_readl(IO_ADDRESS(OMAP_IH1_BASE + reg));
+		}
+	}
+}
+
+static inline int
+get_level(int irq)
+{
+	if (cpu_is_omap1510()) {
+		return (((irq) < IH2_BASE) ? 0 : 1);
+	} else {
+		if (irq < IH2_BASE)
+			return 0;
+		else {
+			return (irq >> 5);
+		}
+	}
+}
+
+static inline int
+get_irq_num(int irq)
+{
+	if (cpu_is_omap1510()) {
+		return (((irq) < IH2_BASE) ? irq : irq - IH2_BASE);
+	} else {
+		return irq & 0x1f;
+	}
+}
+
+static void
+mask_irq(unsigned int irq)
+{
+	int level = get_level(irq);
+	int irq_num = get_irq_num(irq);
+	u32 mask = read_ih(level, IRQ_MIR) | (1 << irq_num);
+	write_ih(level, IRQ_MIR, mask);
+}
+
+static void
+ack_irq(unsigned int irq)
+{
+	int level = get_level(irq);
+
+	if (level > 1)
+		level = 1;
+	do {
+		write_ih(level, IRQ_CONTROL_REG, 0x1);
+		/*
+		 * REVISIT: So says the TRM:
+		 *	if (level) write_ih(0, ITR, 0);
+		 */
+	} while (level--);
+}
+
+void
+unmask_irq(unsigned int irq)
+{
+	int level = get_level(irq);
+	int irq_num = get_irq_num(irq);
+	u32 mask = read_ih(level, IRQ_MIR) & ~(1 << irq_num);
+
+	write_ih(level, IRQ_MIR, mask);
+}
+
+static void
+mask_ack_irq(unsigned int irq)
+{
+	mask_irq(irq);
+	ack_irq(irq);
+}
+
+static struct irqchip omap_normal_irq = {
+	.ack		= mask_ack_irq,
+	.mask		= mask_irq,
+	.unmask		= unmask_irq,
+};
+
+static void
+irq_priority(int irq, int fiq, int priority, int trigger)
+{
+	int level, irq_num;
+	unsigned long reg_value, reg_addr;
+
+	level = get_level(irq);
+	irq_num = get_irq_num(irq);
+	/* FIQ is only available on level 0 interrupts */
+	fiq = level ? 0 : (fiq & 0x1);
+	reg_value = (fiq) | ((priority & 0x1f) << 2) |
+		((trigger & 0x1) << 1);
+	reg_addr = (IRQ_ILR0 + irq_num * 0x4);
+	write_ih(level, reg_addr, reg_value);
+}
+
+void __init
+omap_init_irq(void)
+{
+	int i, irq_count, irq_bank_count = 0;
+	uint *trigger;
+
+	if (cpu_is_omap1510()) {
+		static uint trigger_1510[2] = {
+			0xb3febfff, 0xffbfffed
+		};
+		irq_bank_count = 2;
+		irq_count = 64;
+		trigger = trigger_1510;
+	}
+	if (cpu_is_omap1610()) {
+		static uint trigger_1610[5] = {
+			0xb3fefe8f, 0xfffff7ff, 0xffffffff
+		};
+		irq_bank_count = 5;
+		irq_count = 160;
+		trigger = trigger_1610;
+	}
+	if (cpu_is_omap730()) {
+		static uint trigger_730[] = {
+			0xb3f8e22f, 0xfdb9c1f2, 0x800040f3
+		};
+		irq_bank_count = 3;
+		irq_count = 96;
+		trigger = trigger_730;
+	}
+
+	for (i = 0; i < irq_bank_count; i++) {
+		/* Mask and clear all interrupts */
+		write_ih(i, IRQ_MIR, ~0x0);
+		write_ih(i, IRQ_ITR, 0x0);
+	}
+
+	/* Clear any pending interrupts */
+	write_ih(1, IRQ_CONTROL_REG, 3);
+	write_ih(0, IRQ_CONTROL_REG, 3);
+
+	for (i = 0; i < irq_count; i++) {
+		set_irq_chip(i, &omap_normal_irq);
+		set_irq_handler(i, do_level_IRQ);
+		set_irq_flags(i, IRQF_VALID);
+
+		irq_priority(i, 0, 0, trigger[get_level(i)] >> get_irq_num(i) & 1);
+	}
+	unmask_irq(INT_IH2_IRQ);
+}

arch/arm/mach-omap/leds-innovator.c

+/*
+ * linux/arch/arm/mach-omap/leds-innovator.c
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+
+#include <asm/hardware.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+
+#include "leds.h"
+
+
+#define LED_STATE_ENABLED	1
+#define LED_STATE_CLAIMED	2
+
+static unsigned int led_state;
+static unsigned int hw_led_state;
+
+void innovator_leds_event(led_event_t evt)
+{
+	unsigned long flags;
+
+	local_irq_save(flags);
+
+	switch (evt) {
+	case led_start:
+		hw_led_state = 0;
+		led_state = LED_STATE_ENABLED;
+		break;
+
+	case led_stop:
+		led_state &= ~LED_STATE_ENABLED;
+		hw_led_state = 0;
+		break;
+
+	case led_claim:
+		led_state |= LED_STATE_CLAIMED;
+		hw_led_state = 0;
+		break;
+
+	case led_release:
+		led_state &= ~LED_STATE_CLAIMED;
+		hw_led_state = 0;
+		break;
+
+#ifdef CONFIG_LEDS_TIMER
+	case led_timer:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state ^= 0;
+		break;
+#endif
+
+#ifdef CONFIG_LEDS_CPU
+	case led_idle_start:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state |= 0;
+		break;
+
+	case led_idle_end:
+		if (!(led_state & LED_STATE_CLAIMED))
+			hw_led_state &= ~0;
+		break;
+#endif
+
+	case led_halted:
+		break;
+
+	case led_green_on:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state &= ~0;
+		break;
+
+	case led_green_off:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state |= 0;
+		break;
+
+	case led_amber_on:
+		break;
+
+	case led_amber_off:
+		break;
+
+	case led_red_on:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state &= ~0;
+		break;
+
+	case led_red_off:
+		if (led_state & LED_STATE_CLAIMED)
+			hw_led_state |= 0;
+		break;
+
+	default:
+		break;
+	}
+
+	if (led_state & LED_STATE_ENABLED)
+		;
+
+	local_irq_restore(flags);
+}

arch/arm/mach-omap/leds-perseus2.c

+/*
+ * linux/arch/arm/mach-omap/leds-perseus2.c
+ *
+ * Copyright 2003 by Texas Instruments Incorporated
+ *
+ */
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/kernel_stat.h>
+#include <linux/sched.h>
+#include <linux/version.h>
+
+#include <asm/io.h>
+#include <asm/hardware.h>
+#include <asm/leds.h>
+#include <asm/system.h>
+#include <asm/arch/omap-perseus2.h>
+
+#include "leds.h"
+
+void perseus2_leds_event(led_event_t evt)
+{
+	unsigned long flags;
+	static unsigned long hw_led_state = 0;
+
+	local_irq_save(flags);
+
+	switch (evt) {
+	case led_start:
+		hw_led_state |= OMAP730_FPGA_LED_STARTSTOP;
+		break;
+
+	case led_stop:
+		hw_led_state &= ~OMAP730_FPGA_LED_STARTSTOP;
+		break;
+
+	case led_claim:
+		hw_led_state |= OMAP730_FPGA_LED_CLAIMRELEASE;
+		break;
+
+	case led_release:
+		hw_led_state &= ~OMAP730_FPGA_LED_CLAIMRELEASE;
+		break;
+
+#ifdef CONFIG_LEDS_TIMER
+	case led_timer:
+		/*
+		 * Toggle Timer LED
+		 */
+		if (hw_led_state & OMAP730_FPGA_LED_TIMER)
+			hw_led_state &= ~OMAP730_FPGA_LED_TIMER;
+		else
+			hw_led_state |= OMAP730_FPGA_LED_TIMER;
+		break;
+#endif
+
+#ifdef CONFIG_LEDS_CPU
+	case led_idle_start:
+		hw_led_state |= OMAP730_FPGA_LED_IDLE;
+		break;
+
+	case led_idle_end:
+		hw_led_state &= ~OMAP730_FPGA_LED_IDLE;
+		break;
+#endif
+
+	case led_halted:
+		if (hw_led_state & OMAP730_FPGA_LED_HALTED)
+			hw_led_state &= ~OMAP730_FPGA_LED_HALTED;
+		else
+			hw_led_state |= OMAP730_FPGA_LED_HALTED;
+		break;
+
+	case led_green_on:
+		break;
+
+	case led_green_off:
+		break;
+
+	case led_amber_on:
+		break;
+
+	case led_amber_off:
+		break;
+
+	case led_red_on:
+		break;
+
+	case led_red_off:
+		break;
+
+	default:
+		break;
+	}
+
+
+	/*
+	 *  Actually burn the LEDs
+	 */
+	__raw_writew(~hw_led_state & 0xffff, OMAP730_FPGA_LEDS);
+
+	local_irq_restore(flags);
+}

arch/arm/mach-omap/leds.c

+/*
+ * linux/arch/arm/mach-omap/leds.c
+ *
+ * OMAP LEDs dispatcher
+ */
+#include <linux/init.h>
+
+#include <asm/leds.h>
+#include <asm/mach-types.h>
+
+#include "leds.h"
+
+static int __init
+omap1510_leds_init(void)
+{
+	if (machine_is_innovator())
+		leds_event = innovator_leds_event;
+
+	leds_event(led_start);
+	return 0;
+}
+
+__initcall(omap1510_leds_init);

arch/arm/mach-omap/leds.h

+extern void innovator_leds_event(led_event_t evt);
+extern void perseus2_leds_event(led_event_t evt);

arch/arm/mach-omap/mux.c

+/*
+ * linux/arch/arm/mach-omap/mux.c
+ *
+ * Utility to set the Omap MUX and PULL_DWN registers from a table in mux.h
+ *
+ * Copyright (C) 2003 Nokia Corporation
+ *
+ * Written by Tony Lindgren <tony.lindgren@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <asm/system.h>
+#include <asm/io.h>
+#include <linux/spinlock.h>
+
+#define __MUX_C__
+#include <asm/arch/mux.h>
+
+static spinlock_t mux_spin_lock = SPIN_LOCK_UNLOCKED;
+
+/*
+ * Sets the Omap MUX and PULL_DWN registers based on the table
+ */
+int omap_cfg_reg(const reg_cfg_t reg_cfg)
+{
+#ifdef CONFIG_OMAP_MUX
+	unsigned long flags;
+	reg_cfg_set *cfg;
+	unsigned int reg_orig = 0, reg = 0, pu_pd_orig = 0, pu_pd = 0,
+		pull_orig = 0, pull = 0;
+
+	cfg = &reg_cfg_table[reg_cfg];
+
+	/*
+	 * We do a pretty long section here with lock on, but pin muxing
+	 * should only happen on driver init for each driver, so it's not time
+	 * critical.
+	 */
+	spin_lock_irqsave(&mux_spin_lock, flags);
+
+	/* Check the mux register in question */
+	if (cfg->mux_reg) {
+		reg_orig = __raw_readl(cfg->mux_reg);
+
+		/* The mux registers always seem to be 3 bits long */
+		reg = reg_orig & ~(0x7 << cfg->mask_offset);
+
+		reg |= (cfg->mask << cfg->mask_offset);
+
+		__raw_writel(reg, cfg->mux_reg);
+	}
+
+	/* Check for pull up or pull down selection on 1610 */
+	if (!cpu_is_omap1510()) {
+		if (cfg->pu_pd_reg && cfg->pull_val) {
+			pu_pd_orig = __raw_readl(cfg->pu_pd_reg);
+			if (cfg->pu_pd_val) {
+				/* Use pull up */
+				pu_pd = pu_pd_orig | (1 << cfg->pull_bit);
+			} else {
+				/* Use pull down */
+				pu_pd = pu_pd_orig & ~(1 << cfg->pull_bit);
+			}
+			__raw_writel(pu_pd, cfg->pu_pd_reg);
+		}
+	}
+
+	/* Check for an associated pull down register */
+	if (cfg->pull_reg) {
+		pull_orig = __raw_readl(cfg->pull_reg);
+
+		if (cfg->pull_val) {
+			/* Low bit = pull enabled */
+			pull = pull_orig & ~(1 << cfg->pull_bit);
+		} else {
+			/* High bit = pull disabled */
+			pull = pull_orig | (1 << cfg->pull_bit);
+		}
+
+		__raw_writel(pull, cfg->pull_reg);
+	}
+
+#ifdef CONFIG_OMAP_MUX_DEBUG
+	if (cfg->debug) {
+		printk("Omap: Setting register %s\n", cfg->name);
+		printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
+		       cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
+
+		if (!cpu_is_omap1510()) {
+			if (cfg->pu_pd_reg && cfg->pull_val) {
+				printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
+				       cfg->pu_pd_name, cfg->pu_pd_reg,
+				       pu_pd_orig, pu_pd);
+			}
+		}
+
+		printk("      %s (0x%08x) = 0x%08x -> 0x%08x\n",
+		       cfg->pull_name, cfg->pull_reg, pull_orig, pull);
+	}
+#endif
+
+	spin_unlock_irqrestore(&mux_spin_lock, flags);
+
+#endif
+	return 0;
+}
+
+EXPORT_SYMBOL(omap_cfg_reg);

arch/arm/mach-omap/ocpi.c

+/*
+ * linux/arch/arm/mach-omap/ocpi.c
+ *
+ * Minimal OCP bus support for OMAP-1610
+ *
+ * Copyright (C) 2003 - 2004 Nokia Corporation
+ * Written by Tony Lindgren <tony@atomide.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/config.h>
+#include <linux/module.h>
+#include <linux/version.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/spinlock.h>
+
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define OCPI_BASE		0xfffec320
+#define OCPI_FAULT		(OCPI_BASE + 0x00)
+#define OCPI_CMD_FAULT		(OCPI_BASE + 0x04)
+#define OCPI_SINT0		(OCPI_BASE + 0x08)
+#define OCPI_TABORT		(OCPI_BASE + 0x0c)
+#define OCPI_SINT1		(OCPI_BASE + 0x10)
+#define OCPI_PROT		(OCPI_BASE + 0x14)
+#define OCPI_SEC		(OCPI_BASE + 0x18)
+
+#define EN_OCPI_CK		(1 << 0)
+#define IDLOCPI_ARM		(1 << 1)
+
+/* USB OHCI OCPI access error registers */
+#define HOSTUEADDR	0xfffba0e0
+#define HOSTUESTATUS	0xfffba0e4
+
+/*
+ * Enables device access to OMAP buses via the OCPI bridge
+ * FIXME: Add locking
+ */
+int ocpi_enable(void)
+{
+	unsigned int val;
+
+	/* Make sure there's clock for OCPI */
+	val = __raw_readl(ARM_IDLECT3);
+	val |= EN_OCPI_CK;
+	val &= ~IDLOCPI_ARM;
+	__raw_writel(val, ARM_IDLECT3);
+
+	/* Enable access for OHCI in OCPI */
+	val = __raw_readl(OCPI_PROT);
+	val &= ~0xff;
+	//val &= (1 << 0);	/* Allow access only to EMIFS */
+	__raw_writel(val, OCPI_PROT);
+
+	val = __raw_readl(OCPI_SEC);
+	val &= ~0xff;
+	__raw_writel(val, OCPI_SEC);
+
+	val = __raw_readl(OCPI_SEC);
+	val |= 0;
+	__raw_writel(val, OCPI_SEC);
+
+	val = __raw_readl(OCPI_SINT0);
+	val |= 0;
+	__raw_writel(val, OCPI_SINT1);
+
+	return 0;
+}
+EXPORT_SYMBOL(ocpi_enable);
+
+int ocpi_status(void)
+{
+	printk("OCPI: addr: 0x%08x cmd: 0x%08x\n"
+	       "      ohci-addr: 0x%08x ohci-status: 0x%08x\n",
+	       __raw_readl(OCPI_FAULT), __raw_readl(OCPI_CMD_FAULT),
+	       __raw_readl(HOSTUEADDR), __raw_readl(HOSTUESTATUS));
+
+	return 1;
+}
+EXPORT_SYMBOL(ocpi_status);
+
+static int __init omap_ocpi_init(void)
+{
+	ocpi_enable();
+	printk("OMAP OCPI interconnect driver loaded\n");
+
+	return 0;
+}
+
+static void __exit omap_ocpi_exit(void)
+{
+	/* FIXME: Disable OCPI */
+}
+
+MODULE_AUTHOR("Tony Lindgren <tony@atomide.com>");
+MODULE_DESCRIPTION("OMAP OCPI bus controller module");
+MODULE_LICENSE("GPL");
+module_init(omap_ocpi_init);
+module_exit(omap_ocpi_exit);

arch/arm/mach-omap/omap-generic.c

+/*
+ * linux/arch/arm/mach-omap/generic.c
+ *
+ * Modified from innovator.c
+ *
+ * Code for generic OMAP board. Should work on many OMAP systems where
+ * the device drivers take care of all the necessary hardware initialization.
+ * Do not put any board specific code to this file; create a new machine
+ * type if you need custom low-level initializations.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+
+#include <asm/hardware.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/clocks.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+
+#include "common.h"
+
+static void __init omap_generic_init_irq(void)
+{
+	omap_init_irq();
+}
+
+/*
+ * Muxes the serial ports on
+ */
+static void __init omap_early_serial_init(void)
+{
+	omap_cfg_reg(UART1_TX);
+	omap_cfg_reg(UART1_RTS);
+
+	omap_cfg_reg(UART2_TX);
+	omap_cfg_reg(UART2_RTS);
+
+	omap_cfg_reg(UART3_TX);
+	omap_cfg_reg(UART3_RX);
+}
+
+static void __init omap_generic_init(void)
+{
+	if (!machine_is_omap_generic())
+		return;
+
+	/*
+	 * Make sure the serial ports are muxed on at this point.
+	 * You have to mux them off in device drivers later on
+	 * if not needed.
+	 */
+	if (cpu_is_omap1510()) {
+		omap_early_serial_init();
+	}
+}
+
+static void __init omap_generic_map_io(void)
+{
+	omap_map_io();
+}
+
+MACHINE_START(OMAP_GENERIC, "Generic OMAP-1510/1610")
+	MAINTAINER("Tony Lindgren <tony@atomide.com>")
+	BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
+	BOOT_PARAMS(0x10000100)
+	MAPIO(omap_generic_map_io)
+	INITIRQ(omap_generic_init_irq)
+	INIT_MACHINE(omap_generic_init)
+MACHINE_END

arch/arm/mach-omap/omap-perseus2.c

+/*
+ * linux/arch/arm/mach-omap/omap-perseus2.c
+ *
+ * Modified from omap-generic.c
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/device.h>
+
+#include <asm/hardware.h>
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+
+#include <asm/arch/clocks.h>
+#include <asm/arch/gpio.h>
+#include <asm/arch/mux.h>
+
+#include <asm/arch/omap-perseus2.h>
+
+#include "common.h"
+
+void omap_perseus2_init_irq(void)
+{
+	omap_init_irq();
+}
+
+static struct resource smc91x_resources[] = {
+	[0] = {
+		.start	= OMAP730_FPGA_ETHR_START,	/* Physical */
+		.end	= OMAP730_FPGA_ETHR_START + SZ_4K,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= 0,
+		.end	= 0,
+		.flags	= INT_ETHER,
+	},
+};
+
+static struct platform_device smc91x_device = {
+	.name		= "smc91x",
+	.id		= 0,
+	.num_resources	= ARRAY_SIZE(smc91x_resources),
+	.resource	= smc91x_resources,
+};
+
+static struct platform_device *devices[] __initdata = {
+	&smc91x_device,
+};
+
+static void __init omap_perseus2_init(void)
+{
+	if (!machine_is_omap_perseus2())
+		return;
+
+	(void) platform_add_devices(devices, ARRAY_SIZE(devices));
+}
+
+/* Only FPGA needs to be mapped here. All others are done with ioremap */
+static struct map_desc omap_perseus2_io_desc[] __initdata = {
+	{OMAP730_FPGA_BASE, OMAP730_FPGA_START, OMAP730_FPGA_SIZE,
+	 MT_DEVICE},
+};
+
+static void __init omap_perseus2_map_io(void)
+{
+	omap_map_io();
+	iotable_init(omap_perseus2_io_desc,
+		     ARRAY_SIZE(omap_perseus2_io_desc));
+
+	/* Early, board-dependent init */
+
+	/*
+	 * Hold GSM Reset until needed
+	 */
+	*DSP_M_CTL &= ~1;
+
+	/*
+	 * UARTs -> done automagically by 8250 driver
+	 */
+
+	/*
+	 * CSx timings, GPIO Mux ... setup
+	 */
+
+	/* Flash: CS0 timings setup */
+	*((volatile __u32 *) OMAP_FLASH_CFG_0) = 0x0000fff3;
+	*((volatile __u32 *) OMAP_FLASH_ACFG_0) = 0x00000088;
+
+	/*
+	 * Ethernet support trough the debug board
+	 * CS1 timings setup
+	 */
+	*((volatile __u32 *) OMAP_FLASH_CFG_1) = 0x0000fff3;
+	*((volatile __u32 *) OMAP_FLASH_ACFG_1) = 0x00000000;
+
+	/*
+	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
+	 * It is used as the Ethernet controller interrupt
+	 */
+	*((volatile __u32 *) PERSEUS2_IO_CONF_9) &= 0x1FFFFFFF;
+}
+
+MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
+	MAINTAINER("Kevin Hilman <k-hilman@ti.com>")
+	BOOT_MEM(0x10000000, 0xe0000000, 0xe0000000)
+	BOOT_PARAMS(0x10000100)
+	MAPIO(omap_perseus2_map_io)
+	INITIRQ(omap_perseus2_init_irq)
+	INIT_MACHINE(omap_perseus2_init)
+MACHINE_END