Skip to content

L
linux
Commit ea1e2d62 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Options

Merge bk://bk.arm.linux.org.uk 

into home.transmeta.com:/home/torvalds/v2.5/linux
parents 5fb4864a 09520524
Hide whitespace changes
Inline Side-by-side
Showing with 450 additions and 592 deletions
arch/arm/Makefile
View file @ ea1e2d62
......@@ -201,15 +201,30 @@ MAKETOOLS =$(MAKE) -C arch/$(ARCH)/tools
$(patsubst %,_dir_%, $(SUBDIRS)): maketools
$(patsubst %,_modsubdir_%,$(MOD_DIRS)): maketools
symlinks: archsymlinks
# Update machine arch and proc symlinks if something which affects
# them changed. We use .arch and .proc to indicate when they were
# updated last, otherwise make uses the target directory mtime.
archsymlinks:
$(RM) include/asm-arm/arch include/asm-arm/proc
(cd include/asm-arm; ln -sf arch-$(INCDIR) arch; ln -sf proc-$(PROCESSOR) proc)
include/asm-arm/.arch: $(wildcard include/config/arch/*.h)
@echo 'Making asm-arm/arch -> asm-arm/arch-$(INCDIR) symlink'
@rm -f include/asm-arm/arch
@ln -sf arch-$(INCDIR) include/asm-arm/arch
@touch $@
include/asm-arm/.proc: $(wildcard include/config/cpu/32.h) $(wildcard include/config/cpu/26.h)
@echo 'Making asm-arm/proc -> asm-arm/proc-$(PROCESSOR) symlink'
@rm -f include/asm-arm/proc
@ln -sf proc-$(PROCESSOR) include/asm-arm/proc
@touch $@
.hdepend: include/asm-arm/.arch include/asm-arm/.proc
vmlinux: arch/arm/vmlinux.lds
arch/arm/vmlinux.lds: $(LDSCRIPT) FORCE
arch/arm/vmlinux.lds: arch/arm/Makefile $(LDSCRIPT) \
$(wildcard include/config/cpu/32.h) \
$(wildcard include/config/cpu/26.h) \
$(wildcard include/config/arch/*.h)
@sed 's/TEXTADDR/$(TEXTADDR)/;s/DATAADDR/$(DATAADDR)/' $(LDSCRIPT) >$@
bzImage zImage zinstall Image bootpImage install: vmlinux
......@@ -220,39 +235,26 @@ CLEAN_FILES += \
MRPROPER_FILES += \
arch/arm/tools/constants.h* \
include/asm-arm/arch \
include/asm-arm/proc \
include/asm-arm/arch include/asm-arm/.arch \
include/asm-arm/proc include/asm-arm/.proc \
include/asm-arm/constants.h* \
include/asm-arm/mach-types.h
# We use MRPROPER_FILES and CLEAN_FILES now
archmrproper:
archmrproper: FORCE
@/bin/true
archclean:
archclean: FORCE
@$(MAKEBOOT) clean
archdep: scripts/mkdep archsymlinks
archdep: FORCE
@$(MAKETOOLS) dep
@$(MAKEBOOT) dep
# we need version.h
maketools: checkbin include/linux/version.h
maketools: include/linux/version.h FORCE
@$(MAKETOOLS) all
# Ensure this is ld "2.9.4" or later
NEW_LINKER := $(shell $(LD) --gc-sections --version >/dev/null 2>&1; echo $$?)
ifneq ($(NEW_LINKER),0)
checkbin:
@echo '*** ${VERSION}.${PATCHLEVEL} kernels no longer build correctly with old versions of binutils.'
@echo '*** Please upgrade your binutils to 2.9.5.'
@false
else
checkbin:
@true
endif
# My testing targets (that short circuit a few dependencies)
zImg:; @$(MAKEBOOT) zImage
Img:; @$(MAKEBOOT) Image
......
arch/arm/mach-adifcc/mm.c
View file @ ea1e2d62
/*
* linux/arch/arm/mach-xscale/mm.c
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -14,11 +14,10 @@
static struct map_desc adifcc_io_desc[] __initdata = {
/* on-board devices */
{ 0xff400000, 0x00400000, 0x00300000, DOMAIN_IO, 0, 1, 0, 0},
LAST_DESC
{ 0xff400000, 0x00400000, 0x00300000, MT_DEVICE }
};
void __init adifcc_map_io(void)
{
iotable_init(adifcc_io_desc);
iotable_init(adifcc_io_desc, ARRAY_SIZE(adifcc_io_desc));
}
arch/arm/mach-anakin/mm.c
View file @ ea1e2d62
......@@ -10,8 +10,7 @@
* Changelog:
* 09-Apr-2001 W/TTC Created
*/
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/io.h>
......@@ -19,14 +18,13 @@
#include <asm/mach/map.h>
static struct map_desc anakin_io_desc[] __initdata = {
{ IO_BASE, IO_START, IO_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ FLASH_BASE, FLASH_START, FLASH_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ VGA_BASE, VGA_START, VGA_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ IO_BASE, IO_START, IO_SIZE, MT_DEVICE },
{ FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE },
{ VGA_BASE, VGA_START, VGA_SIZE, MT_DEVICE }
};
void __init
anakin_map_io(void)
{
iotable_init(anakin_io_desc);
iotable_init(anakin_io_desc, ARRAY_SIZE(anakin_io_desc));
}
arch/arm/mach-clps711x/autcpu12.c
View file @ ea1e2d62
......@@ -17,6 +17,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
......@@ -48,18 +49,16 @@ extern void clps711x_init_irq(void);
*/
static struct map_desc autcpu12_io_desc[] __initdata = {
/* virtual, physical, length, domain, r, w, c, b */
/* virtual, physical, length, type */
/* memory-mapped extra io and CS8900A Ethernet chip */
/* ethernet chip */
{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ AUTCPU12_VIRT_CS8900A, AUTCPU12_PHYS_CS8900A, SZ_1M, MT_DEVICE }
};
void __init autcpu12_map_io(void)
{
clps711x_map_io();
iotable_init(autcpu12_io_desc);
iotable_init(autcpu12_io_desc, ARRAY_SIZE(autcpu12_io_desc));
}
MACHINE_START(AUTCPU12, "autronix autcpu12")
......
arch/arm/mach-clps711x/cdb89712.c
View file @ ea1e2d62
......@@ -17,6 +17,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
......@@ -40,14 +41,13 @@ extern void clps711x_map_io(void);
* ethernet driver, perhaps.
*/
static struct map_desc cdb89712_io_desc[] __initdata = {
{ ETHER_BASE, ETHER_START, ETHER_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ ETHER_BASE, ETHER_START, ETHER_SIZE, MT_DEVICE }
};
static void __init cdb89712_map_io(void)
{
clps711x_map_io();
iotable_init(cdb89712_io_desc);
iotable_init(cdb89712_io_desc, ARRAY_SIZE(cdb89712_io_desc));
}
MACHINE_START(CDB89712, "Cirrus-CDB89712")
......
arch/arm/mach-clps711x/edb7211-mm.c
View file @ ea1e2d62
......@@ -19,13 +19,12 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/sizes.h>
#include <asm/mach/map.h>
......@@ -52,22 +51,20 @@ extern void clps711x_map_io(void);
* happens).
*/
static struct map_desc edb7211_io_desc[] __initdata = {
/* virtual, physical, length, domain, r, w, c, b */
/* virtual, physical, length, type */
/* memory-mapped extra keyboard row and CS8900A Ethernet chip */
{ EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, DOMAIN_IO, 0, 1, 0, 0 },
{ EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, DOMAIN_IO, 0, 1, 0, 0 },
{ EP7211_VIRT_EXTKBD, EP7211_PHYS_EXTKBD, SZ_1M, MT_DEVICE },
{ EP7211_VIRT_CS8900A, EP7211_PHYS_CS8900A, SZ_1M, MT_DEVICE },
/* flash banks */
{ EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, DOMAIN_KERNEL, 0, 1, 0, 0 },
{ EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, DOMAIN_KERNEL, 0, 1, 0, 0 },
LAST_DESC
{ EP7211_VIRT_FLASH1, EP7211_PHYS_FLASH1, SZ_8M, MT_DEVICE },
{ EP7211_VIRT_FLASH2, EP7211_PHYS_FLASH2, SZ_8M, MT_DEVICE }
};
void __init edb7211_map_io(void)
{
clps711x_map_io();
iotable_init(edb7211_io_desc);
iotable_init(edb7211_io_desc, ARRAY_SIZE(edb7211_io_desc));
}
arch/arm/mach-clps711x/mm.c
View file @ ea1e2d62
......@@ -19,6 +19,7 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -31,40 +32,14 @@
#include <asm/mach/map.h>
#include <asm/hardware/clps7111.h>
#if 0 //def CONFIG_DISCONTIGMEM
/*
* The assumption of maximum 4 discontiguous memory banks is present
* in several places in the ARM kernel, including the parameter block
* (this affects boot loaders, too). Banks do not necessarily
* correspond 1:1 with NUMA nodes, although they usually will,
* especially if they are widely discontiguous.
*
* - note that the parameter block is depreciated for new implementations
* - also note that discontig_node_data is actually used
* -- rmk
*/
static bootmem_data_t node_bootmem_data[4];
pg_data_t clps711x_node_data[4] = {
{ bdata: &node_bootmem_data[0] },
{ bdata: &node_bootmem_data[1] },
{ bdata: &node_bootmem_data[2] },
{ bdata: &node_bootmem_data[3] },
};
#endif
/*
* This maps the generic CLPS711x registers
*/
static struct map_desc clps711x_io_desc[] __initdata = {
{ CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, DOMAIN_IO, 0, 1 },
LAST_DESC
{ CLPS7111_VIRT_BASE, CLPS7111_PHYS_BASE, 1048576, MT_DEVICE }
};
void __init clps711x_map_io(void)
{
iotable_init(clps711x_io_desc);
iotable_init(clps711x_io_desc, ARRAY_SIZE(clps711x_io_desc));
}
arch/arm/mach-clps711x/p720t.c
View file @ ea1e2d62
......@@ -18,6 +18,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/string.h>
......@@ -43,9 +44,8 @@ extern void clps711x_map_io(void);
* We map both here.
*/
static struct map_desc p720t_io_desc[] __initdata = {
{ SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, DOMAIN_IO, 0, 1 },
{ 0xfe400000, 0x10400000, 1048576, DOMAIN_IO, 0, 1 },
LAST_DESC
{ SYSPLD_VIRT_BASE, SYSPLD_PHYS_BASE, 1048576, MT_DEVICE },
{ 0xfe400000, 0x10400000, 1048576, MT_DEVICE }
};
static void __init
......@@ -77,7 +77,7 @@ fixup_p720t(struct machine_desc *desc, struct tag *tag,
static void __init p720t_map_io(void)
{
clps711x_map_io();
iotable_init(p720t_io_desc);
iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc));
}
MACHINE_START(P720T, "ARM-Prospector720T")
......
arch/arm/mach-clps7500/core.c
View file @ ea1e2d62
/*
* linux/arch/arm/mm/mm-cl7500.c
* linux/arch/arm/mach-clps7500/core.c
*
* Copyright (C) 1998 Russell King
* Copyright (C) 1999 Nexus Electronics Ltd
*
* Extra MM routines for CL7500 architecture
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/init.h>
......@@ -215,16 +216,15 @@ static void __init clps7500_init_irq(void)
}
static struct map_desc cl7500_io_desc[] __initdata = {
{ IO_BASE, IO_START, IO_SIZE , DOMAIN_IO, 0, 1 }, /* IO space */
{ ISA_BASE, ISA_START, ISA_SIZE , DOMAIN_IO, 0, 1 }, /* ISA space */
{ FLASH_BASE, FLASH_START, FLASH_SIZE, DOMAIN_IO, 0, 1 }, /* Flash */
{ LED_BASE, LED_START, LED_SIZE , DOMAIN_IO, 0, 1 }, /* LED */
LAST_DESC
{ IO_BASE, IO_START, IO_SIZE, MT_DEVICE }, /* IO space */
{ ISA_BASE, ISA_START, ISA_SIZE, MT_DEVICE }, /* ISA space */
{ FLASH_BASE, FLASH_START, FLASH_SIZE, MT_DEVICE }, /* Flash */
{ LED_BASE, LED_START, LED_SIZE, MT_DEVICE } /* LED */
};
static void __init clps7500_map_io(void)
{
iotable_init(cl7500_io_desc);
iotable_init(cl7500_io_desc, ARRAY_SIZE(cl7500_io_desc));
}
MACHINE_START(CLPS7500, "CL-PS7500")
......
arch/arm/mach-ebsa110/core.c
View file @ ea1e2d62
......@@ -9,6 +9,7 @@
*
* Extra MM routines for the EBSA-110 architecture
*/
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -71,22 +72,21 @@ static struct map_desc ebsa110_io_desc[] __initdata = {
/*
* sparse external-decode ISAIO space
*/
{ IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, DOMAIN_IO, 0, 1, 0, 0 }, /* IRQ_STAT/IRQ_MCLR */
{ IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, DOMAIN_IO, 0, 1, 0, 0 }, /* IRQ_MASK/IRQ_MSET */
{ SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, DOMAIN_IO, 0, 1, 0, 0 }, /* SOFT_BASE */
{ PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, DOMAIN_IO, 0, 1, 0, 0 }, /* PIT_BASE */
{ IRQ_STAT, TRICK4_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_STAT/IRQ_MCLR */
{ IRQ_MASK, TRICK3_PHYS, PGDIR_SIZE, MT_DEVICE }, /* IRQ_MASK/IRQ_MSET */
{ SOFT_BASE, TRICK1_PHYS, PGDIR_SIZE, MT_DEVICE }, /* SOFT_BASE */
{ PIT_BASE, TRICK0_PHYS, PGDIR_SIZE, MT_DEVICE }, /* PIT_BASE */
/*
* self-decode ISAIO space
*/
{ ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ ISAIO_BASE, ISAIO_PHYS, ISAIO_SIZE, MT_DEVICE },
{ ISAMEM_BASE, ISAMEM_PHYS, ISAMEM_SIZE, MT_DEVICE }
};
static void __init ebsa110_map_io(void)
{
iotable_init(ebsa110_io_desc);
iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
}
MACHINE_START(EBSA110, "EBSA110")
......
arch/arm/mach-epxa10db/mm.c
View file @ ea1e2d62
......@@ -19,14 +19,11 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/sizes.h>
#include <asm/mach/map.h>
......@@ -34,16 +31,15 @@
/* Page table mapping for I/O region */
static struct map_desc epxa10db_io_desc[] __initdata = {
{ IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K , DOMAIN_IO, 0, 1},
{IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K , DOMAIN_IO, 0, 1},
{IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K , DOMAIN_IO, 0, 1},
{IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K , DOMAIN_IO, 0, 1},
{IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K , DOMAIN_IO, 0, 1},
{ FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M , DOMAIN_IO, 0, 1},
LAST_DESC
{ IO_ADDRESS(EXC_REGISTERS_BASE), EXC_REGISTERS_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK0_BASE), EXC_PLD_BLOCK0_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK1_BASE), EXC_PLD_BLOCK1_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK2_BASE), EXC_PLD_BLOCK2_BASE, SZ_16K, MT_DEVICE },
{ IO_ADDRESS(EXC_PLD_BLOCK3_BASE), EXC_PLD_BLOCK3_BASE, SZ_16K, MT_DEVICE },
{ FLASH_VADDR(EXC_EBI_BLOCK0_BASE), EXC_EBI_BLOCK0_BASE, SZ_16M, MT_DEVICE }
};
void __init epxa10db_map_io(void)
{
iotable_init(epxa10db_io_desc);
iotable_init(epxa10db_io_desc, ARRAY_SIZE(epxa10db_io_desc));
}
arch/arm/mach-footbridge/mm.c
View file @ ea1e2d62
......@@ -10,6 +10,7 @@
* Extra MM routines for the EBSA285 architecture
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -28,9 +29,8 @@
* it means that we have extra bullet protection on our feet.
*/
static struct map_desc fb_common_io_desc[] __initdata = {
{ ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ XBUS_BASE, 0x40000000, XBUS_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE },
{ XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE }
};
/*
......@@ -39,13 +39,12 @@ static struct map_desc fb_common_io_desc[] __initdata = {
*/
static struct map_desc ebsa285_host_io_desc[] __initdata = {
#if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST)
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE },
{ PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE },
{ PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE },
{ PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE },
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }
#endif
LAST_DESC
};
/*
......@@ -53,33 +52,27 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = {
*/
static struct map_desc co285_io_desc[] __initdata = {
#ifdef CONFIG_ARCH_CO285
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE },
{ PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }
#endif
LAST_DESC
};
void __init footbridge_map_io(void)
{
struct map_desc *desc = NULL;
/*
* Set up the common mapping first; we need this to
* determine whether we're in host mode or not.
*/
iotable_init(fb_common_io_desc);
iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc));
/*
* Now, work out what we've got to map in addition on this
* platform.
*/
if (machine_is_co285())
desc = co285_io_desc;
else if (footbridge_cfn_mode())
desc = ebsa285_host_io_desc;
if (desc)
iotable_init(desc);
iotable_init(co285_io_desc, ARRAY_SIZE(co285_io_desc));
if (footbridge_cfn_mode())
iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc));
}
#ifdef CONFIG_FOOTBRIDGE_ADDIN
......
arch/arm/mach-ftvpci/core.c
View file @ ea1e2d62
......@@ -8,6 +8,7 @@
* as published by the Free Software Foundation; either version
* 2 of the License, or (at your option) any later version.
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -76,17 +77,16 @@ static void __init ftvpci_init_irq(void)
}
static struct map_desc ftvpci_io_desc[] __initdata = {
{ INTCONT_BASE, INTCONT_START, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 },
{ PLX_BASE, PLX_START, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 },
{ PCIO_BASE, PLX_IO_START, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 },
{ DUART_BASE, DUART_START, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 },
{ STATUS_BASE, STATUS_START, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ INTCONT_BASE, INTCONT_START, 0x00001000, MT_DEVICE },
{ PLX_BASE, PLX_START, 0x00001000, MT_DEVICE },
{ PCIO_BASE, PLX_IO_START, 0x00100000, MT_DEVICE },
{ DUART_BASE, DUART_START, 0x00001000, MT_DEVICE },
{ STATUS_BASE, STATUS_START, 0x00001000, MT_DEVICE }
};
static void __init ftvpci_map_io(void)
{
iotable_init(ftvpci_io_desc);
iotable_init(ftvpci_io_desc, ARRAY_SIZE(ftvpci_io_desc));
}
MACHINE_START(NEXUSPCI, "FTV/PCI")
......
arch/arm/mach-integrator/mm.c
View file @ ea1e2d62
......@@ -20,14 +20,11 @@
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
#include <asm/io.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/mach/map.h>
......@@ -53,26 +50,25 @@
*/
static struct map_desc integrator_io_desc[] __initdata = {
{ IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_RTC_BASE), INTEGRATOR_RTC_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_KBD_BASE), INTEGRATOR_KBD_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_MOUSE_BASE), INTEGRATOR_MOUSE_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K , DOMAIN_IO, 0, 1},
{ PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M , DOMAIN_IO, 0, 1},
{ PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M , DOMAIN_IO, 0, 1},
{ PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K , DOMAIN_IO, 0, 1},
{ PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K , DOMAIN_IO, 0, 1},
LAST_DESC
{ IO_ADDRESS(INTEGRATOR_HDR_BASE), INTEGRATOR_HDR_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_SC_BASE), INTEGRATOR_SC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_EBI_BASE), INTEGRATOR_EBI_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_CT_BASE), INTEGRATOR_CT_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_IC_BASE), INTEGRATOR_IC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_RTC_BASE), INTEGRATOR_RTC_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART0_BASE), INTEGRATOR_UART0_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_UART1_BASE), INTEGRATOR_UART1_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_KBD_BASE), INTEGRATOR_KBD_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_MOUSE_BASE), INTEGRATOR_MOUSE_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_DBG_BASE), INTEGRATOR_DBG_BASE, SZ_4K, MT_DEVICE },
{ IO_ADDRESS(INTEGRATOR_GPIO_BASE), INTEGRATOR_GPIO_BASE, SZ_4K, MT_DEVICE },
{ PCI_MEMORY_VADDR, PHYS_PCI_MEM_BASE, SZ_16M, MT_DEVICE },
{ PCI_CONFIG_VADDR, PHYS_PCI_CONFIG_BASE, SZ_16M, MT_DEVICE },
{ PCI_V3_VADDR, PHYS_PCI_V3_BASE, SZ_64K, MT_DEVICE },
{ PCI_IO_VADDR, PHYS_PCI_IO_BASE, SZ_64K, MT_DEVICE }
};
void __init integrator_map_io(void)
{
iotable_init(integrator_io_desc);
iotable_init(integrator_io_desc, ARRAY_SIZE(integrator_io_desc));
}
arch/arm/mach-iop310/mm.c
View file @ ea1e2d62
......@@ -14,6 +14,7 @@
*
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -32,17 +33,16 @@
* Standard IO mapping for all IOP310 based systems
*/
static struct map_desc iop80310_std_desc[] __initdata = {
/* virtual physical length domain r w c b */
/* virtual physical length type */
// IOP310 Memory Mapped Registers
{ 0xe8001000, 0x00001000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 },
{ 0xe8001000, 0x00001000, 0x00001000, MT_DEVICE },
// PCI I/O Space
{ 0xfe000000, 0x90000000, 0x00020000, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ 0xfe000000, 0x90000000, 0x00020000, MT_DEVICE }
};
void __init iop310_map_io(void)
{
iotable_init(iop80310_std_desc);
iotable_init(iop80310_std_desc, ARRAY_SIZE(iop80310_std_desc));
}
/*
......@@ -50,10 +50,9 @@ void __init iop310_map_io(void)
*/
#ifdef CONFIG_ARCH_IQ80310
static struct map_desc iq80310_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
/* virtual physical length type */
// IQ80310 On-Board Devices
{ 0xfe800000, 0xfe800000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ 0xfe800000, 0xfe800000, 0x00100000, MT_DEVICE }
};
void __init iq80310_map_io(void)
......@@ -65,7 +64,7 @@ void __init iq80310_map_io(void)
iop310_map_io();
iotable_init(iq80310_io_desc);
iotable_init(iq80310_io_desc, ARRAY_SIZE(iq80310_io_desc));
}
#endif // CONFIG_ARCH_IQ80310
arch/arm/mach-l7200/core.c
View file @ ea1e2d62
......@@ -6,6 +6,7 @@
* Extra MM routines for L7200 architecture
*/
#include <linux/config.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/hardware.h>
......@@ -69,17 +70,16 @@ static void __init l7200_init_irq(void)
}
static struct map_desc l7200_io_desc[] __initdata = {
{ IO_BASE, IO_START, IO_SIZE, DOMAIN_IO, 0, 1 ,0 ,0},
{ IO_BASE_2, IO_START_2, IO_SIZE_2, DOMAIN_IO, 0, 1 ,0 ,0},
{ AUX_BASE, AUX_START, AUX_SIZE, DOMAIN_IO, 0, 1 ,0 ,0},
{ FLASH1_BASE, FLASH1_START, FLASH1_SIZE, DOMAIN_IO, 0, 1 ,0 ,0},
{ FLASH2_BASE, FLASH2_START, FLASH2_SIZE, DOMAIN_IO, 0, 1 ,0 ,0},
LAST_DESC
{ IO_BASE, IO_START, IO_SIZE, MT_DEVICE },
{ IO_BASE_2, IO_START_2, IO_SIZE_2, MT_DEVICE },
{ AUX_BASE, AUX_START, AUX_SIZE, MT_DEVICE },
{ FLASH1_BASE, FLASH1_START, FLASH1_SIZE, MT_DEVICE },
{ FLASH2_BASE, FLASH2_START, FLASH2_SIZE, MT_DEVICE }
};
static void __init l7200_map_io(void)
{
iotable_init(l7200_io_desc);
iotable_init(l7200_io_desc, ARRAY_SIZE(l7200_io_desc));
}
MACHINE_START(L7200, "LinkUp Systems L7200")
......
arch/arm/mach-pxa/generic.c
View file @ ea1e2d62
......@@ -88,16 +88,15 @@ EXPORT_SYMBOL(pxa_gpio_mode);
* cache flush area.
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf6000000, 0x20000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCMCIA0 IO */
{ 0xf7000000, 0x30000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCMCIA1 IO */
{ 0xfc000000, 0x40000000, 0x01400000, DOMAIN_IO, 0, 1, 0, 0 }, /* Devs */
{ 0xfe000000, 0x44000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD */
{ 0xff000000, 0x48000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Mem Ctl */
LAST_DESC
/* virtual physical length type */
{ 0xf6000000, 0x20000000, 0x01000000, MT_DEVICE }, /* PCMCIA0 IO */
{ 0xf7000000, 0x30000000, 0x01000000, MT_DEVICE }, /* PCMCIA1 IO */
{ 0xfc000000, 0x40000000, 0x01400000, MT_DEVICE }, /* Devs */
{ 0xfe000000, 0x44000000, 0x00200000, MT_DEVICE }, /* LCD */
{ 0xff000000, 0x48000000, 0x00200000, MT_DEVICE } /* Mem Ctl */
};
void __init pxa_map_io(void)
{
iotable_init(standard_io_desc);
iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}
arch/arm/mach-pxa/idp.c
View file @ ea1e2d62
......@@ -10,6 +10,7 @@
* 2001-09-13: Cliff Brake <cbrake@accelent.com>
* Initial code
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/fs.h>
......@@ -69,45 +70,38 @@ static void __init idp_init_irq(void)
}
static struct map_desc idp_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
/* virtual physical length type */
#ifndef PXA_IDP_REV02
{ IDP_CTRL_PORT_BASE,
IDP_CTRL_PORT_PHYS,
IDP_CTRL_PORT_SIZE,
DOMAIN_IO,
0, 1, 0, 0 },
MT_DEVICE },
#endif
{ IDP_IDE_BASE,
IDP_IDE_PHYS,
IDP_IDE_SIZE,
DOMAIN_IO,
0, 1, 0, 0 },
MT_DEVICE },
{ IDP_ETH_BASE,
IDP_ETH_PHYS,
IDP_ETH_SIZE,
DOMAIN_IO,
0, 1, 0, 0 },
MT_DEVICE },
{ IDP_COREVOLT_BASE,
IDP_COREVOLT_PHYS,
IDP_COREVOLT_SIZE,
DOMAIN_IO,
0, 1, 0, 0 },
MT_DEVICE },
{ IDP_CPLD_BASE,
IDP_CPLD_PHYS,
IDP_CPLD_SIZE,
DOMAIN_IO,
0, 1, 0, 0 },
LAST_DESC
MT_DEVICE }
};
static void __init idp_map_io(void)
{
pxa_map_io();
iotable_init(idp_io_desc);
iotable_init(idp_io_desc, ARRAY_SIZE(idp_io_desc));
set_GPIO_IRQ_edge(IRQ_TO_GPIO_2_80(TOUCH_PANEL_IRQ), TOUCH_PANEL_IRQ_EDGE);
}
......
arch/arm/mach-pxa/lubbock.c
View file @ ea1e2d62
......@@ -11,6 +11,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/major.h>
#include <linux/fs.h>
......@@ -120,18 +121,17 @@ static int __init lubbock_init(void)
__initcall(lubbock_init);
static struct map_desc lubbock_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
{ 0xf1000000, 0x0c000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* LAN91C96 IO */
{ 0xf1100000, 0x0e000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* LAN91C96 Attr */
{ 0xf4000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE }, /* CPLD */
{ 0xf1000000, 0x0c000000, 0x00100000, MT_DEVICE }, /* LAN91C96 IO */
{ 0xf1100000, 0x0e000000, 0x00100000, MT_DEVICE }, /* LAN91C96 Attr */
{ 0xf4000000, 0x10000000, 0x00400000, MT_DEVICE } /* SA1111 */
};
static void __init lubbock_map_io(void)
{
pxa_map_io();
iotable_init(lubbock_io_desc);
iotable_init(lubbock_io_desc, ARRAY_SIZE(lubbock_io_desc));
/* This enables the BTUART */
CKEN |= CKEN7_BTUART;
......
arch/arm/mach-rpc/riscpc.c
View file @ ea1e2d62
......@@ -9,6 +9,7 @@
*
* Architecture specific fixups.
*/
#include <linux/kernel.h>
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/pm.h>
......@@ -61,15 +62,14 @@ __tagtable(ATAG_ACORN, parse_tag_acorn);
#endif
static struct map_desc rpc_io_desc[] __initdata = {
{ SCREEN_BASE, SCREEN_START, 2*1048576, DOMAIN_IO, 0, 1, 0, 0 }, /* VRAM */
{ IO_BASE, IO_START, IO_SIZE , DOMAIN_IO, 0, 1, 0, 0 }, /* IO space */
{ EASI_BASE, EASI_START, EASI_SIZE, DOMAIN_IO, 0, 1, 0, 0 }, /* EASI space */
LAST_DESC
{ SCREEN_BASE, SCREEN_START, 2*1048576, MT_DEVICE }, /* VRAM */
{ IO_BASE, IO_START, IO_SIZE , MT_DEVICE }, /* IO space */
{ EASI_BASE, EASI_START, EASI_SIZE, MT_DEVICE } /* EASI space */
};
void __init rpc_map_io(void)
{
iotable_init(rpc_io_desc);
iotable_init(rpc_io_desc, ARRAY_SIZE(rpc_io_desc));
/*
* RiscPC can't handle half-word loads and stores
......
arch/arm/mach-sa1100/adsbitsy.c
View file @ ea1e2d62
......@@ -9,7 +9,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
......@@ -77,9 +77,8 @@ static void __init adsbitsy_init_irq(void)
}
static struct map_desc adsbitsy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf4000000, 0x18000000, 0x00800000, MT_DEVICE } /* SA1111 */
};
static int adsbitsy_uart_open(struct uart_port *port, struct uart_info *info)
......@@ -106,7 +105,7 @@ static struct sa1100_port_fns adsbitsy_port_fns __initdata = {
static void __init adsbitsy_map_io(void)
{
sa1100_map_io();
iotable_init(adsbitsy_io_desc);
iotable_init(adsbitsy_io_desc, ARRAY_SIZE(adsbitsy_io_desc));
sa1100_register_uart_fns(&adsbitsy_port_fns);
sa1100_register_uart(0, 3);
......
arch/arm/mach-sa1100/assabet.c
View file @ ea1e2d62
......@@ -171,15 +171,6 @@ fixup_assabet(struct machine_desc *desc, struct tag *tags,
}
static struct map_desc assabet_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf1000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
/* f3000000 - neponset system registers */
/* f4000000 - neponset SA1111 registers */
LAST_DESC
};
static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
{
if (port->mapbase == _Ser1UTCR0) {
......@@ -255,12 +246,18 @@ static struct sa1100_port_fns assabet_port_fns __initdata = {
pm: assabet_uart_pm,
};
static struct map_desc assabet_io_desc[] __initdata = {
/* virtual physical length type */
{ 0xf1000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */
};
static void __init assabet_map_io(void)
{
extern void neponset_map_io(void);
sa1100_map_io();
iotable_init(assabet_io_desc);
iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
if (machine_has_neponset()) {
#ifdef CONFIG_ASSABET_NEPONSET
......
arch/arm/mach-sa1100/badge4.c
View file @ ea1e2d62
......@@ -145,17 +145,16 @@ EXPORT_SYMBOL(badge4_set_5V);
static struct map_desc badge4_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{0xf1000000, 0x08000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SRAM bank 1 */
{0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SRAM bank 2 */
{0xf4000000, 0x48000000, 0x00100000, DOMAIN_IO, 0,1,0,0},/* SA-1111 */
LAST_DESC
/* virtual physical length type */
{0xf1000000, 0x08000000, 0x00100000, MT_DEVICE },/* SRAM bank 1 */
{0xf2000000, 0x10000000, 0x00100000, MT_DEVICE },/* SRAM bank 2 */
{0xf4000000, 0x48000000, 0x00100000, MT_DEVICE } /* SA-1111 */
};
static void __init badge4_map_io(void)
{
sa1100_map_io();
iotable_init(badge4_io_desc);
iotable_init(badge4_io_desc, ARRAY_SIZE(badge4_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/cerf.c
View file @ ea1e2d62
......@@ -36,20 +36,19 @@ static void __init cerf_init_irq(void)
}
static struct map_desc cerf_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x08000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Crystal Ethernet Chip */
/* virtual physical length type */
{ 0xf0000000, 0x08000000, 0x00100000, MT_DEVICE } /* Crystal Ethernet Chip */
#ifdef CONFIG_SA1100_CERF_CPLD
{ 0xf1000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD Chip */
{ 0xf2000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Bluetooth */
{ 0xf3000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* CerfPDA Serial */
,{ 0xf1000000, 0x40000000, 0x00100000, MT_DEVICE }, /* CPLD Chip */
{ 0xf2000000, 0x10000000, 0x00100000, MT_DEVICE }, /* CerfPDA Bluetooth */
{ 0xf3000000, 0x18000000, 0x00100000, MT_DEVICE } /* CerfPDA Serial */
#endif
LAST_DESC
};
static void __init cerf_map_io(void)
{
sa1100_map_io();
iotable_init(cerf_io_desc);
iotable_init(cerf_io_desc, ARRAY_SIZE(cerf_io_desc));
sa1100_register_uart(0, 3);
#ifdef CONFIG_SA1100_CERF_IRDA_ENABLED
......
arch/arm/mach-sa1100/empeg.c
View file @ ea1e2d62
......@@ -16,15 +16,14 @@
#include "generic.h"
static struct map_desc empeg_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ EMPEG_FLASHBASE, 0x00000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash */
LAST_DESC
/* virtual physical length type */
{ EMPEG_FLASHBASE, 0x00000000, 0x00200000, MT_DEVICE } /* Flash */
};
static void __init empeg_map_io(void)
{
sa1100_map_io();
iotable_init(empeg_io_desc);
iotable_init(empeg_io_desc, ARRAY_SIZE(empeg_io_desc));
sa1100_register_uart(0, 1);
sa1100_register_uart(1, 3);
......
arch/arm/mach-sa1100/flexanet.c
View file @ ea1e2d62
......@@ -152,18 +152,17 @@ __initcall(flexanet_init);
static struct map_desc flexanet_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf1000000, 0x18000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Ethernet controller */
{ 0xD0000000, 0x40000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Instrument boards */
{ 0xD8000000, 0x48000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* External peripherals */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00001000, MT_DEVICE }, /* Board Control Register */
{ 0xf1000000, 0x18000000, 0x01000000, MT_DEVICE }, /* Ethernet controller */
{ 0xD0000000, 0x40000000, 0x01000000, MT_DEVICE }, /* Instrument boards */
{ 0xD8000000, 0x48000000, 0x01000000, MT_DEVICE } /* External peripherals */
};
static void __init flexanet_map_io(void)
{
sa1100_map_io();
iotable_init(flexanet_io_desc);
iotable_init(flexanet_io_desc, ARRAY_SIZE(flexanet_io_desc));
flexanet_serial_init();
/* wakeup source is GPIO-0 only */
......
arch/arm/mach-sa1100/freebird.c
View file @ ea1e2d62
......@@ -43,8 +43,6 @@ static int __init freebird_init(void)
if (machine_is_freebird()) {
sa1100fb_backlight_power = freebird_backlight_power;
sa1100fb_lcd_power = freebird_lcd_power;
set_GPIO_IRQ_edge(GPIO_FREEBIRD_UCB1300, GPIO_RISING_EDGE);
}
return 0;
}
......@@ -52,16 +50,15 @@ static int __init freebird_init(void)
__initcall(freebird_init);
static struct map_desc freebird_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x12000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Board Control Register */
{ 0xf2000000, 0x19000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0},
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x12000000, 0x00100000, MT_DEVICE }, /* Board Control Register */
{ 0xf2000000, 0x19000000, 0x00100000, MT_DEVICE }
};
static void __init freebird_map_io(void)
{
sa1100_map_io();
iotable_init(freebird_io_desc);
iotable_init(freebird_io_desc, ARRAY_SIZE(freebird_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/generic.c
View file @ ea1e2d62
......@@ -134,8 +134,6 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
*
* Typically, static virtual address mappings are as follow:
*
* 0xe8000000-0xefffffff: flash memory (especially when multiple flash
* banks need to be mapped contigously)
* 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.)
* 0xf4000000-0xf4ffffff: SA-1111
* 0xf5000000-0xf5ffffff: reserved (used by cache flushing area)
......@@ -150,17 +148,16 @@ EXPORT_SYMBOL(sa1100fb_lcd_power);
*/
static struct map_desc standard_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf8000000, 0x80000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* PCM */
{ 0xfa000000, 0x90000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCM */
{ 0xfc000000, 0xa0000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* MER */
{ 0xfe000000, 0xb0000000, 0x00200000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD + DMA */
LAST_DESC
/* virtual physical length type */
{ 0xf8000000, 0x80000000, 0x00100000, MT_DEVICE }, /* PCM */
{ 0xfa000000, 0x90000000, 0x00100000, MT_DEVICE }, /* SCM */
{ 0xfc000000, 0xa0000000, 0x00100000, MT_DEVICE }, /* MER */
{ 0xfe000000, 0xb0000000, 0x00200000, MT_DEVICE } /* LCD + DMA */
};
void __init sa1100_map_io(void)
{
iotable_init(standard_io_desc);
iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
}
/*
......@@ -203,3 +200,4 @@ void __init sa1110_mb_enable(void)
local_irq_restore(flags);
}
arch/arm/mach-sa1100/graphicsclient.c
View file @ ea1e2d62
......@@ -9,7 +9,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
......@@ -121,10 +121,9 @@ static void __init graphicsclient_init_irq(void)
static struct map_desc graphicsclient_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
{ 0xf1000000, 0x18000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CAN */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00400000, MT_DEVICE }, /* CPLD */
{ 0xf1000000, 0x18000000, 0x00400000, MT_DEVICE } /* CAN */
};
static u_int graphicsclient_get_mctrl(struct uart_port *port)
......@@ -187,7 +186,7 @@ static struct sa1100_port_fns graphicsclient_port_fns __initdata = {
static void __init graphicsclient_map_io(void)
{
sa1100_map_io();
iotable_init(graphicsclient_io_desc);
iotable_init(graphicsclient_io_desc, ARRAY_SIZE(graphicsclient_io_desc));
sa1100_register_uart_fns(&graphicsclient_port_fns);
sa1100_register_uart(0, 3);
......
arch/arm/mach-sa1100/graphicsmaster.c
View file @ ea1e2d62
......@@ -7,7 +7,7 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
......@@ -153,11 +153,10 @@ static void __init graphicsmaster_init_irq(void)
static struct map_desc graphicsmaster_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CPLD */
{ 0xf1000000, 0x40000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* CAN */
{ 0xf4000000, 0x18000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00400000, MT_DEVICE }, /* CPLD */
{ 0xf1000000, 0x40000000, 0x00400000, MT_DEVICE }, /* CAN */
{ 0xf4000000, 0x18000000, 0x00800000, MT_DEVICE } /* SA-1111 */
};
#error Old code. Someone needs to decide what to do about this.
......@@ -244,7 +243,7 @@ static struct sa1100_port_fns graphicsmaster_port_fns __initdata = {
static void __init graphicsmaster_map_io(void)
{
sa1100_map_io();
iotable_init(graphicsmaster_io_desc);
iotable_init(graphicsmaster_io_desc, ARRAY_SIZE(graphicsmaster_io_desc));
sa1100_register_uart_fns(&graphicsmaster_port_fns);
sa1100_register_uart(0, 3);
......
arch/arm/mach-sa1100/h3600.c
View file @ ea1e2d62
......@@ -434,17 +434,16 @@ static struct sa1100_port_fns h3600_port_fns __initdata = {
};
static struct map_desc h3600_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ H3600_EGPIO_VIRT, 0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 CS#5 */
{ H3600_BANK_2_VIRT, 0x10000000, 0x02800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 2 CS#2 */
{ H3600_BANK_4_VIRT, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 4 CS#4 */
LAST_DESC
/* virtual physical length type */
{ H3600_EGPIO_VIRT, 0x49000000, 0x01000000, MT_DEVICE }, /* EGPIO 0 CS#5 */
{ H3600_BANK_2_VIRT, 0x10000000, 0x02800000, MT_DEVICE }, /* static memory bank 2 CS#2 */
{ H3600_BANK_4_VIRT, 0x40000000, 0x00800000, MT_DEVICE } /* static memory bank 4 CS#4 */
};
static void __init h3600_map_io(void)
{
sa1100_map_io();
iotable_init(h3600_io_desc);
iotable_init(h3600_io_desc, ARRAY_SIZE(h3600_io_desc));
sa1100_register_uart_fns(&h3600_port_fns);
sa1100_register_uart(0, 3);
......
arch/arm/mach-sa1100/huw_webpanel.c
View file @ ea1e2d62
......@@ -60,16 +60,15 @@ __initcall(init_huw_cs3);
area size = 288 kByte (0x48000 Bytes)
**/
static struct map_desc huw_webpanel_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0xc1fb8000, 0x00048000, DOMAIN_IO, 0, 1, 0, 0 }, /* Parameter */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0xc1fb8000, 0x00048000, MT_DEVICE }, /* Parameter */
{ 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE } /* Paules CS3, write only */
};
static void __init huw_webpanel_map_io(void)
{
sa1100_map_io();
iotable_init(huw_webpanel_io_desc);
iotable_init(huw_webpanel_io_desc, ARRAY_SIZE(huw_webpanel_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/itsy.c
View file @ ea1e2d62
......@@ -18,16 +18,14 @@
/* BRADFIXME The egpio addresses aren't verifiably correct. (i.e. they're most
likely wrong. */
static struct map_desc itsy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x49000000, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x49000000, 0x01000000, MT_DEVICE } /* EGPIO 0 */
};
static void __init itsy_map_io(void)
{
sa1100_map_io();
iotable_init(itsy_io_desc);
iotable_init(itsy_io_desc, ARRAY_SIZE(itsy_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/jornada720.c
View file @ ea1e2d62
......@@ -56,17 +56,16 @@ static int __init jornada720_init(void)
__initcall(jornada720_init);
static struct map_desc jornada720_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x48000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson registers */
{ 0xf1000000, 0x48200000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Epson frame buffer */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x48000000, 0x00100000, MT_DEVICE }, /* Epson registers */
{ 0xf1000000, 0x48200000, 0x00100000, MT_DEVICE }, /* Epson frame buffer */
{ 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */
};
static void __init jornada720_map_io(void)
{
sa1100_map_io();
iotable_init(jornada720_io_desc);
iotable_init(jornada720_io_desc, ARRAY_SIZE(jornada720_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/lart.c
View file @ ea1e2d62
......@@ -17,16 +17,15 @@
static struct map_desc lart_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
{ 0xec000000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
LAST_DESC
/* virtual physical length type */
{ 0xe8000000, 0x00000000, 0x00400000, MT_DEVICE }, /* main flash memory */
{ 0xec000000, 0x08000000, 0x00400000, MT_DEVICE } /* main flash, alternative location */
};
static void __init lart_map_io(void)
{
sa1100_map_io();
iotable_init(lart_io_desc);
iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/nanoengine.c
View file @ ea1e2d62
......@@ -25,17 +25,15 @@ fixup_nanoengine(struct machine_desc *desc, struct tag *tags,
}
static struct map_desc nanoengine_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf1000000, 0x18A00000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Internal PCI Config Space */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00100000, MT_DEVICE }, /* System Registers */
{ 0xf1000000, 0x18A00000, 0x00100000, MT_DEVICE } /* Internal PCI Config Space */
};
static void __init nanoengine_map_io(void)
{
sa1100_map_io();
iotable_init(nanoengine_io_desc);
iotable_init(nanoengine_io_desc, ARRAY_SIZE(nanoengine_io_desc));
sa1100_register_uart(0, 1);
sa1100_register_uart(1, 2);
......
arch/arm/mach-sa1100/neponset.c
View file @ ea1e2d62
......@@ -2,7 +2,7 @@
* linux/arch/arm/mach-sa1100/neponset.c
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
......@@ -18,7 +18,9 @@
#include <asm/mach/irq.h>
#include <asm/mach/serial_sa1100.h>
#include <asm/arch/assabet.h>
#include <asm/arch/neponset.h>
#include <asm/hardware/sa1111.h>
#include <asm/sizes.h>
#include "sa1111.h"
......@@ -216,13 +218,12 @@ static int __init neponset_init(void)
__initcall(neponset_init);
static struct map_desc neponset_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf3000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf3000000, 0x10000000, SZ_1M, MT_DEVICE }, /* System Registers */
{ 0xf4000000, 0x40000000, SZ_1M, MT_DEVICE } /* SA-1111 */
};
void __init neponset_map_io(void)
{
iotable_init(neponset_io_desc);
iotable_init(neponset_io_desc, ARRAY_SIZE(neponset_io_desc));
}
arch/arm/mach-sa1100/omnimeter.c
View file @ ea1e2d62
......@@ -41,15 +41,14 @@ static int __init omnimeter_init(void)
__initcall(omnimeter_init);
static struct map_desc omnimeter_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xd2000000, 0x10000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* TS */
LAST_DESC
/* virtual physical length type */
{ 0xd2000000, 0x10000000, 0x02000000, MT_DEVICE } /* TS */
};
static void __init omnimeter_map_io(void)
{
sa1100_map_io();
iotable_init(omnimeter_io_desc);
iotable_init(omnimeter_io_desc, ARRAY_SIZE(omnimeter_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/pangolin.c
View file @ ea1e2d62
......@@ -16,15 +16,14 @@
#include "generic.h"
static struct map_desc pangolin_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
LAST_DESC
/* virtual physical length type */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE } /* MQ200 */
};
static void __init pangolin_map_io(void)
{
sa1100_map_io();
iotable_init(pangolin_io_desc);
iotable_init(pangolin_io_desc, ARRAY_SIZE(pangolin_io_desc));
sa1100_register_uart(0, 1);
sa1100_register_uart(1, 3);
......
arch/arm/mach-sa1100/pfs168.c
View file @ ea1e2d62
......@@ -56,28 +56,26 @@ static void __init pfs168_init_irq(void)
}
static struct map_desc pfs168_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ 0xf0000000, 0x10000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port A (COM5) */
{ 0xf0001000, 0x10800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* 16C752 DUART port B (COM6) */
{ 0xf0002000, 0x11000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 RTS control (SYSC1RTS) */
{ 0xf0003000, 0x11400000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Status LED control (SYSLED) */
{ 0xf0004000, 0x11800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* DTMF code read (SYSDTMF) */
{ 0xf0005000, 0x11c00000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD configure, enable (SYSLCDDE) */
{ 0xf0006000, 0x12000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM1 DSR and motion sense (SYSC1DSR) */
{ 0xf0007000, 0x12800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* COM3 xmit enable (SYSC3TEN) */
{ 0xf0008000, 0x13000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register A (SYSCTLA) */
{ 0xf0009000, 0x13800000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* Control register B (SYSCTLB) */
{ 0xf000a000, 0x18000000, 0x00001000, DOMAIN_IO, 0, 1, 0, 0 }, /* SMC91C96 */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
{ 0xf4000000, 0x40000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00001000, MT_DEVICE }, /* 16C752 DUART port A (COM5) */
{ 0xf0001000, 0x10800000, 0x00001000, MT_DEVICE }, /* 16C752 DUART port B (COM6) */
{ 0xf0002000, 0x11000000, 0x00001000, MT_DEVICE }, /* COM1 RTS control (SYSC1RTS) */
{ 0xf0003000, 0x11400000, 0x00001000, MT_DEVICE }, /* Status LED control (SYSLED) */
{ 0xf0004000, 0x11800000, 0x00001000, MT_DEVICE }, /* DTMF code read (SYSDTMF) */
{ 0xf0005000, 0x11c00000, 0x00001000, MT_DEVICE }, /* LCD configure, enable (SYSLCDDE) */
{ 0xf0006000, 0x12000000, 0x00001000, MT_DEVICE }, /* COM1 DSR and motion sense (SYSC1DSR) */
{ 0xf0007000, 0x12800000, 0x00001000, MT_DEVICE }, /* COM3 xmit enable (SYSC3TEN) */
{ 0xf0008000, 0x13000000, 0x00001000, MT_DEVICE }, /* Control register A (SYSCTLA) */
{ 0xf0009000, 0x13800000, 0x00001000, MT_DEVICE }, /* Control register B (SYSCTLB) */
{ 0xf000a000, 0x18000000, 0x00001000, MT_DEVICE }, /* SMC91C96 */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, /* MQ200 */
{ 0xf4000000, 0x40000000, 0x00100000, MT_DEVICE } /* SA-1111 */
};
static void __init pfs168_map_io(void)
{
sa1100_map_io();
iotable_init(pfs168_io_desc);
iotable_init(pfs168_io_desc, ARRAY_SIZE(pfs168_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/pleb.c
View file @ ea1e2d62
......@@ -15,17 +15,9 @@
#include "generic.h"
static struct map_desc pleb_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash memory */
{ 0xe8400000, 0x08000000, 0x00400000, DOMAIN_IO, 0, 1, 0, 0 }, /* main flash, alternative location */
LAST_DESC
};
static void __init pleb_map_io(void)
{
sa1100_map_io();
iotable_init(pleb_io_desc);
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/pm.c
View file @ ea1e2d62
......@@ -18,12 +18,14 @@
* 2001-08-29: Nicolas Pitre <nico@cam.org>
* Cleaned up, pushed platform dependent stuff
* in the platform specific files.
*
* 2002-05-27: Nicolas Pitre Killed sleep.h and the kmalloced save array.
* Storage is local on the stack now.
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pm.h>
#include <linux/slab.h>
#include <linux/sched.h>
#include <linux/interrupt.h>
#include <linux/sysctl.h>
......@@ -35,7 +37,6 @@
#include <asm/system.h>
#include <asm/leds.h>
#include "sleep.h"
/*
* Debug macros
......@@ -45,20 +46,32 @@
extern void sa1100_cpu_suspend(void);
extern void sa1100_cpu_resume(void);
extern unsigned long *sleep_save; /* virtual address */
extern unsigned long sleep_save_p; /* physical address */
#define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x
#define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x]
/*
* List of global SA11x0 peripheral registers to preserve.
* More ones like CP and general purpose register values are preserved
* on the stack and then the stack pointer is stored last in sleep.S.
*/
enum { SLEEP_SAVE_SP = 0,
SLEEP_SAVE_OSCR, SLEEP_SAVE_OIER,
SLEEP_SAVE_OSMR0, SLEEP_SAVE_OSMR1, SLEEP_SAVE_OSMR2, SLEEP_SAVE_OSMR3,
SLEEP_SAVE_GPDR, SLEEP_SAVE_GRER, SLEEP_SAVE_GFER, SLEEP_SAVE_GAFR,
SLEEP_SAVE_PPDR, SLEEP_SAVE_PPSR, SLEEP_SAVE_PPAR, SLEEP_SAVE_PSDR,
SLEEP_SAVE_ICMR,
SLEEP_SAVE_Ser1SDCR0,
SLEEP_SAVE_SIZE
};
int pm_do_suspend(void)
{
/* set up pointer to sleep parameters */
sleep_save = kmalloc(SLEEP_SAVE_SIZE*sizeof(long), GFP_ATOMIC);
if (!sleep_save)
return -ENOMEM;
sleep_save_p = virt_to_phys(sleep_save);
unsigned long sleep_save[SLEEP_SAVE_SIZE];
cli();
......@@ -146,8 +159,6 @@ int pm_do_suspend(void)
sti();
kfree (sleep_save);
/*
* Restore the CPU frequency settings.
*/
......@@ -158,6 +169,11 @@ int pm_do_suspend(void)
return 0;
}
unsigned long sleep_phys_sp(void *sp)
{
return virt_to_phys(sp);
}
#ifdef CONFIG_SYSCTL
/*
* ARGH! ACPI people defined CTL_ACPI in linux/acpi.h rather than
......
arch/arm/mach-sa1100/simpad.c
View file @ ea1e2d62
/*
* linux/arch/arm/mach-sa1100/simpad.c
*
*/
#include <linux/config.h>
......@@ -41,10 +40,9 @@ void clear_cs3_bit(int value)
}
static struct map_desc simpad_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf2800000, 0x4b800000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* MQ200 */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* Paules CS3, write only */
LAST_DESC
/* virtual physical length type */
{ 0xf2800000, 0x4b800000, 0x00800000, MT_DEVICE }, /* MQ200 */
{ 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE } /* Paules CS3, write only */
};
......@@ -65,7 +63,7 @@ static struct sa1100_port_fns simpad_port_fns __initdata = {
static void __init simpad_map_io(void)
{
sa1100_map_io();
iotable_init(simpad_io_desc);
iotable_init(simpad_io_desc, ARRAY_SIZE(simpad_io_desc));
PSPR = 0xc0008000;
GPDR &= ~GPIO_GPIO0;
......
arch/arm/mach-sa1100/sleep.S
View file @ ea1e2d62
......@@ -11,12 +11,20 @@
* 2001-02-06: Cliff Brake Initial code
*
* 2001-08-29: Nicolas Pitre Simplified.
*
* 2002-05-27: Nicolas Pitre Revisited, more cleanup and simplification.
* Storage is on the stack now.
*/
#include <linux/linkage.h>
#include <asm/assembler.h>
#include <asm/hardware.h>
#include "sleep.h"
.text
/*
* sa1100_cpu_suspend()
......@@ -25,35 +33,24 @@
*
*/
.text
ENTRY(sa1100_cpu_suspend)
ENTRY(sleep_save) .word 0 @ virtual address of parameter array
ENTRY(sleep_save_p) .word 0 @ physical address of parameter array
stmfd sp!, {r4 - r12, lr} @ save registers on stack
ENTRY(sa1100_cpu_suspend)
@ get coprocessor registers
mrc p15, 0, r4, c3, c0, 0 @ domain ID
mrc p15, 0, r5, c2, c0, 0 @ translation table base addr
mrc p15, 0, r6, c13, c0, 0 @ PID
mrc p15, 0, r7, c1, c0, 0 @ control reg
@ store them plus current virtual stack ptr on stack
stmfd sp!, {r4 - r7, sp}
@ save registers on stack
stmfd sp!, {r4 - r12, lr}
@ load virtual address for sleep_save array
ldr r4, sleep_save
@ save stack pointer
str sp, [r4, #(SLEEP_SAVE_SP*4)]
@ save coprocessor registers
mrc p15, 0, r1, c1, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R1*4)]
mrc p15, 0, r1, c2, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R2*4)]
mrc p15, 0, r1, c3, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R3*4)]
mrc p15, 0, r1, c5, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R5*4)]
mrc p15, 0, r1, c6, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R6*4)]
mrc p15, 0, r1, c13, c0, 0
str r1, [r4, #(SLEEP_SAVE_CP15_R13*4)]
@ preserve phys address of stack
mov r0, sp
bl sleep_phys_sp
ldr r1, =sleep_save_sp
str r0, [r1]
@ clean data cache and invalidate WB
bl cpu_sa1100_cache_clean_invalidate_all
......@@ -79,25 +76,24 @@ ENTRY(sa1100_cpu_suspend)
mov r0, #90
bl udelay
/* setup up register contents for jump to page containing SA1110 SDRAM controller bug fix suspend code
*
* r0 points to MSC0 register
* r1 points to MSC1 register
* r2 points to MSC2 register
* r3 is MSC0 value
* r4 is MSC1 value
* r5 is MSC2 value
* r6 points to MDREFR register
* r7 is first MDREFR value
* r8 is second MDREFR value
* r9 is pointer to MDCNFG register
* r10 is MDCNFG value
* r11 is third MDREFR value
* r12 is pointer to PMCR register
* r13 is PMCR value (1)
*
*/
/*
* SA1110 SDRAM controller workaround. register values:
*
* r0 = &MSC0
* r1 = &MSC1
* r2 = &MSC2
* r3 = MSC0 value
* r4 = MSC1 value
* r5 = MSC2 value
* r6 = &MDREFR
* r7 = first MDREFR value
* r8 = second MDREFR value
* r9 = &MDCNFG
* r10 = MDCNFG value
* r11 = third MDREFR value
* r12 = &PMCR
* r13 = PMCR value (1)
*/
ldr r0, =MSC0
ldr r1, =MSC1
......@@ -170,69 +166,49 @@ sa1110_sdram_controller_fix:
*
* entry point from bootloader into kernel during resume
*
* Note: Yes, part of the following code is located into the .data section.
* This is to allow sleep_save_sp to be accessed with a relative load
* while we can't rely on any MMU translation. We could have put
* sleep_save_sp in the .text section as well, but some setups might
* insist on it to be truely read-only.
*/
.data
.align 5
ENTRY(sa1100_cpu_resume)
@ set SVC, irqs off
mov r0, #PSR_F_BIT | PSR_I_BIT | MODE_SVC
msr cpsr_c, r0
@ load physical address of sleep_save
ldr r4, sleep_save_p
msr cpsr_c, r0 @ set SVC, irqs off
@ restore cp15_r3, domain id
ldr r1, [r4, #(SLEEP_SAVE_CP15_R3*4)]
mcr p15, 0, r1, c3, c0 ,0
@ restore cp15_r2, translation table base address
ldr r1, [r4, #(SLEEP_SAVE_CP15_R2*4)]
mcr p15, 0, r1, c2, c0 ,0
ldr r0, sleep_save_sp @ stack phys addr
ldr r2, =resume_after_mmu @ its absolute virtual address
ldmfd r0, {r4 - r7, sp} @ CP regs + virt stack ptr
mov r1, #0
mcr p15, 0, r1, c8, c7, 0 @ flush I+D TLBs
mcr p15, 0, r1, c7, c7, 0 @ flush I&D cache
mcr p15, 0, r1, c9, c0, 0 @ invalidate RB
mcr p15, 0, r1, c9, c0, 5 @ allow user space to use RB
@ get saved cp15 r1 (control register)
ldr r1, [r4, #(SLEEP_SAVE_CP15_R1*4)]
@ get address to jump to after turning on MMU
ldr r2, =resume_after_mmu
cmp r2, #0
b resume_turn_on_mmu
mcr p15, 0, r4, c3, c0, 0 @ domain ID
mcr p15, 0, r5, c2, c0, 0 @ translation table base addr
mcr p15, 0, r6, c13, c0, 0 @ PID
b resume_turn_on_mmu @ cache align execution
.align 5
resume_turn_on_mmu:
@ turn on mmu
mcr p15, 0, r1, c1, c0 ,0
@ jump to resume_after_mmu
mov pc, r2
mcr p15, 0, r7, c1, c0, 0 @ turn on MMU, caches, etc.
nop
mov pc, r2 @ jump to virtual addr
nop
nop
nop
.align 5
resume_after_mmu:
@ load virtual address for sleep_save array
ldr r4, sleep_save
@ restore the rest of CPU state
ldr r1, [r4, #(SLEEP_SAVE_CP15_R13*4)]
mcr p15, 0, r1, c13, c0, 0
ldr r1, [r4, #(SLEEP_SAVE_CP15_R5*4)]
mcr p15, 0, r1, c5, c0 ,0
ldr r1, [r4, #(SLEEP_SAVE_CP15_R6*4)]
mcr p15, 0, r1, c6, c0 ,0
@ restore stack pointer
ldr sp, [r4, #(SLEEP_SAVE_SP*4)]
sleep_save_sp:
.word 0 @ preserve stack phys ptr here
@ return to caller
ldmfd sp!, {r4 - r12, pc}
.text
resume_after_mmu:
mcr p15, 0, r1, c15, c1, 2 @ enable clock switching
ldmfd sp!, {r4 - r12, pc} @ return to caller
arch/arm/mach-sa1100/sleep.h deleted 100644 → 0
View file @ 5fb4864a
/*
* Offsets for register values preserved in RAM while in sleep mode
*/
#define SLEEP_SAVE_OSCR 0
#define SLEEP_SAVE_OSMR0 1
#define SLEEP_SAVE_OSMR1 2
#define SLEEP_SAVE_OSMR2 3
#define SLEEP_SAVE_OSMR3 4
#define SLEEP_SAVE_OIER 5
#define SLEEP_SAVE_GPDR 6
#define SLEEP_SAVE_GRER 7
#define SLEEP_SAVE_GFER 8
#define SLEEP_SAVE_GAFR 9
#define SLEEP_SAVE_PPDR 10
#define SLEEP_SAVE_PPSR 11
#define SLEEP_SAVE_PPAR 12
#define SLEEP_SAVE_PSDR 13
#define SLEEP_SAVE_Ser1SDCR0 14
#define SLEEP_SAVE_ICMR 15
#define SLEEP_SAVE_SP 16
#define SLEEP_SAVE_CP15_R1 17
#define SLEEP_SAVE_CP15_R2 18
#define SLEEP_SAVE_CP15_R3 19
#define SLEEP_SAVE_CP15_R5 20
#define SLEEP_SAVE_CP15_R6 21
#define SLEEP_SAVE_CP15_R13 22
#define SLEEP_SAVE_SIZE 23
arch/arm/mach-sa1100/stork.c
View file @ ea1e2d62
......@@ -304,19 +304,17 @@ stork_kbd_unexpected_up(unsigned char code)
struct map_desc stork_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x02000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash bank 0 */
{ STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO 0 */
{ 0xf1000000, 0x10000000, 0x02800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 2 */
{ 0xf3800000, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* static memory bank 4 */
LAST_DESC
/* virtual physical length type */
{ STORK_VM_BASE_CS1, STORK_VM_OFF_CS1, 0x01000000, MT_DEVICE }, /* EGPIO 0 */
{ 0xf1000000, 0x10000000, 0x02800000, MT_DEVICE }, /* static memory bank 2 */
{ 0xf3800000, 0x40000000, 0x00800000, MT_DEVICE } /* static memory bank 4 */
};
int __init
stork_map_io(void)
{
sa1100_map_io();
iotable_init(stork_io_desc);
iotable_init(stork_io_desc, ARRAY_SIZE(stork_io_desc));
sa1100_register_uart(0, 1); /* com port */
sa1100_register_uart(1, 2);
......
arch/arm/mach-sa1100/system3.c
View file @ ea1e2d62
......@@ -95,10 +95,9 @@ static void system3_backlight_power(int on);
*/
static struct map_desc system3_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf3000000, PT_CPLD_BASE, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* System Registers */
{ 0xf4000000, PT_SA1111_BASE, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf3000000, PT_CPLD_BASE, 0x00100000, MT_DEVICE }, /* System Registers */
{ 0xf4000000, PT_SA1111_BASE, 0x00100000, MT_DEVICE } /* SA-1111 */
};
static struct sa1100_port_fns system3_port_fns __initdata = {
......@@ -119,7 +118,7 @@ static void __init system3_map_io(void)
{
DPRINTK( "%s\n", "START" );
sa1100_map_io();
iotable_init(system3_io_desc);
iotable_init(system3_io_desc, ARRAY_SIZE(system3_io_desc));
sa1100_register_uart_fns(&system3_port_fns);
sa1100_register_uart(0, 1); /* com port */
......
arch/arm/mach-sa1100/xp860.c
View file @ ea1e2d62
......@@ -57,17 +57,16 @@ static int __init xp860_init(void)
__initcall(xp860_init);
static struct map_desc xp860_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xf0000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* SCSI */
{ 0xf1000000, 0x18000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* LAN */
{ 0xf4000000, 0x40000000, 0x00800000, DOMAIN_IO, 0, 1, 0, 0 }, /* SA-1111 */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x10000000, 0x00100000, MT_DEVICE }, /* SCSI */
{ 0xf1000000, 0x18000000, 0x00100000, MT_DEVICE }, /* LAN */
{ 0xf4000000, 0x40000000, 0x00800000, MT_DEVICE } /* SA-1111 */
};
static void __init xp860_map_io(void)
{
sa1100_map_io();
iotable_init(xp860_io_desc);
iotable_init(xp860_io_desc, ARRAY_SIZE(xp860_io_desc));
sa1100_register_uart(0, 3);
sa1100_register_uart(1, 1);
......
arch/arm/mach-sa1100/yopy.c
View file @ ea1e2d62
......@@ -68,18 +68,15 @@ __initcall(yopy_hw_init);
static struct map_desc yopy_io_desc[] __initdata = {
/* virtual physical length domain r w c b */
{ 0xe8000000, 0x00000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 0 */
{ 0xec000000, 0x08000000, 0x04000000, DOMAIN_IO, 0, 1, 0, 0 }, /* Flash 1 */
{ 0xf0000000, 0x48000000, 0x00300000, DOMAIN_IO, 0, 1, 0, 0 }, /* LCD */
{ 0xf1000000, 0x10000000, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 }, /* EGPIO */
LAST_DESC
/* virtual physical length type */
{ 0xf0000000, 0x48000000, 0x00300000, MT_DEVICE }, /* LCD */
{ 0xf1000000, 0x10000000, 0x00100000, MT_DEVICE } /* EGPIO */
};
static void __init yopy_map_io(void)
{
sa1100_map_io();
iotable_init(yopy_io_desc);
iotable_init(yopy_io_desc, ARRAY_SIZE(yopy_io_desc));
sa1100_register_uart(0, 3);
......
arch/arm/mach-shark/core.c
View file @ ea1e2d62
......@@ -3,18 +3,11 @@
*
* Architecture specific stuff.
*/
#include <linux/tty.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <asm/elf.h>
#include <asm/setup.h>
#include <asm/mach-types.h>
#include <asm/pgtable.h>
#include <asm/page.h>
#include <asm/io.h>
#include <asm/mach/map.h>
......@@ -23,13 +16,12 @@
extern void shark_init_irq(void);
static struct map_desc shark_io_desc[] __initdata = {
{ IO_BASE , IO_START , IO_SIZE , DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ IO_BASE , IO_START , IO_SIZE , MT_DEVICE }
};
static void __init shark_map_io(void)
{
iotable_init(shark_io_desc);
iotable_init(shark_io_desc, ARRAY_SIZE(shark_io_desc));
}
MACHINE_START(SHARK, "Shark")
......
arch/arm/mach-tbox/core.c
View file @ ea1e2d62
......@@ -6,6 +6,7 @@
*
* Extra MM routines for the Tbox architecture
*/
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/mm.h>
#include <linux/init.h>
......@@ -57,13 +58,12 @@ static void tbox_init_irq(void)
static struct map_desc tbox_io_desc[] __initdata = {
/* See hardware.h for details */
{ IO_BASE, IO_START, 0x00100000, DOMAIN_IO, 0, 1, 0, 0 },
LAST_DESC
{ IO_BASE, IO_START, 0x00100000, MT_DEVICE }
};
static void __init tbox_map_io(void)
{
iotable_init(tbox_io_desc);
iotable_init(tbox_io_desc, ARRAY_SIZE(tbox_io_desc));
}
MACHINE_START(TBOX, "unknown-TBOX")
......
arch/arm/mm/mm-armv.c
View file @ ea1e2d62
......@@ -220,16 +220,9 @@ static inline void clear_mapping(unsigned long virt)
static void __init create_mapping(struct map_desc *md)
{
unsigned long virt, length;
int prot_sect, prot_pte;
int prot_sect, prot_pte, domain;
long off;
if (md->prot_read && md->prot_write &&
!md->cacheable && !md->bufferable) {
printk(KERN_WARNING "Security risk: creating user "
"accessible mapping for 0x%08lx at 0x%08lx\n",
md->physical, md->virtual);
}
if (md->virtual != vectors_base() && md->virtual < PAGE_OFFSET) {
printk(KERN_WARNING "MM: not creating mapping for "
"0x%08lx at 0x%08lx in user region\n",
......@@ -237,24 +230,49 @@ static void __init create_mapping(struct map_desc *md)
return;
}
prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY |
(md->prot_read ? L_PTE_USER : 0) |
(md->prot_write ? L_PTE_WRITE : 0) |
(md->cacheable ? L_PTE_CACHEABLE : 0) |
(md->bufferable ? L_PTE_BUFFERABLE : 0);
prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY;
prot_sect = PMD_TYPE_SECT;
switch (md->type) {
case MT_DEVICE:
prot_pte |= L_PTE_WRITE;
prot_sect |= PMD_SECT_AP_WRITE;
domain = DOMAIN_IO;
break;
case MT_CACHECLEAN:
prot_pte |= L_PTE_CACHEABLE | L_PTE_BUFFERABLE;
prot_sect |= PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE;
domain = DOMAIN_KERNEL;
break;
case MT_MINICLEAN:
prot_pte |= L_PTE_CACHEABLE;
prot_sect |= PMD_SECT_CACHEABLE;
domain = DOMAIN_KERNEL;
break;
case MT_VECTORS:
prot_pte |= L_PTE_EXEC | L_PTE_CACHEABLE | L_PTE_BUFFERABLE;
prot_sect |= PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE;
domain = DOMAIN_USER;
break;
case MT_MEMORY:
prot_pte |= L_PTE_WRITE | L_PTE_EXEC | L_PTE_CACHEABLE | L_PTE_BUFFERABLE;
prot_sect |= PMD_SECT_AP_WRITE | PMD_SECT_CACHEABLE | PMD_SECT_BUFFERABLE;
domain = DOMAIN_KERNEL;
break;
}
prot_sect = PMD_TYPE_SECT | PMD_DOMAIN(md->domain) |
(md->prot_read ? PMD_SECT_AP_READ : 0) |
(md->prot_write ? PMD_SECT_AP_WRITE : 0) |
(md->cacheable ? PMD_SECT_CACHEABLE : 0) |
(md->bufferable ? PMD_SECT_BUFFERABLE : 0);
prot_sect |= PMD_DOMAIN(domain);
virt = md->virtual;
off = md->physical - virt;
length = md->length;
while ((virt & 0xfffff || (virt + off) & 0xfffff) && length >= PAGE_SIZE) {
alloc_init_page(virt, virt + off, md->domain, prot_pte);
alloc_init_page(virt, virt + off, domain, prot_pte);
virt += PAGE_SIZE;
length -= PAGE_SIZE;
......@@ -268,7 +286,7 @@ static void __init create_mapping(struct map_desc *md)
}
while (length >= PAGE_SIZE) {
alloc_init_page(virt, virt + off, md->domain, prot_pte);
alloc_init_page(virt, virt + off, domain, prot_pte);
virt += PAGE_SIZE;
length -= PAGE_SIZE;
......@@ -319,12 +337,7 @@ void __init memtable_init(struct meminfo *mi)
p->physical = mi->bank[i].start;
p->virtual = __phys_to_virt(p->physical);
p->length = mi->bank[i].size;
p->domain = DOMAIN_KERNEL;
p->prot_read = 0;
p->prot_write = 1;
p->cacheable = 1;
p->bufferable = 1;
p->type = MT_MEMORY;
p ++;
}
......@@ -332,12 +345,7 @@ void __init memtable_init(struct meminfo *mi)
p->physical = FLUSH_BASE_PHYS;
p->virtual = FLUSH_BASE;
p->length = PGDIR_SIZE;
p->domain = DOMAIN_KERNEL;
p->prot_read = 1;
p->prot_write = 0;
p->cacheable = 1;
p->bufferable = 1;
p->type = MT_CACHECLEAN;
p ++;
#endif
......@@ -345,12 +353,7 @@ void __init memtable_init(struct meminfo *mi)
p->physical = FLUSH_BASE_PHYS + PGDIR_SIZE;
p->virtual = FLUSH_BASE_MINICACHE;
p->length = PGDIR_SIZE;
p->domain = DOMAIN_KERNEL;
p->prot_read = 1;
p->prot_write = 0;
p->cacheable = 1;
p->bufferable = 0;
p->type = MT_MINICLEAN;
p ++;
#endif
......@@ -380,25 +383,22 @@ void __init memtable_init(struct meminfo *mi)
init_maps->physical = virt_to_phys(init_maps);
init_maps->virtual = vectors_base();
init_maps->length = PAGE_SIZE;
init_maps->domain = DOMAIN_USER;
init_maps->prot_read = 0;
init_maps->prot_write = 0;
init_maps->cacheable = 1;
init_maps->bufferable = 0;
init_maps->type = MT_VECTORS;
create_mapping(init_maps);
flush_cache_all();
flush_tlb_all();
}
/*
* Create the architecture specific mappings
*/
void __init iotable_init(struct map_desc *io_desc)
void __init iotable_init(struct map_desc *io_desc, int nr)
{
int i;
for (i = 0; io_desc[i].last == 0; i++)
for (i = 0; i < nr; i++)
create_mapping(io_desc + i);
}
......
include/asm-arm/mach/map.h
View file @ ea1e2d62
......@@ -13,20 +13,18 @@ struct map_desc {
unsigned long virtual;
unsigned long physical;
unsigned long length;
int domain:4,
prot_read:1,
prot_write:1,
cacheable:1,
bufferable:1,
last:1;
unsigned int type;
};
#define LAST_DESC \
{ last: 1 }
struct meminfo;
#define MT_DEVICE 0
#define MT_CACHECLEAN 1
#define MT_MINICLEAN 2
#define MT_VECTORS 3
#define MT_MEMORY 4
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
extern void iotable_init(struct map_desc *);
extern void iotable_init(struct map_desc *, int);
extern void setup_io_desc(void);
include/asm-arm/page.h
View file @ ea1e2d62
......@@ -30,14 +30,14 @@ extern void __cpu_copy_user_page(void *to, const void *from,
unsigned long user);
#endif
#define clear_user_page(addr,vaddr) \
#define clear_user_page(addr,vaddr,pg) \
do { \
preempt_disable(); \
__cpu_clear_user_page(addr, vaddr); \
preempt_enable(); \
} while (0)
#define copy_user_page(to,from,vaddr) \
#define copy_user_page(to,from,vaddr,pg) \
do { \
preempt_disable(); \
__cpu_copy_user_page(to, from, vaddr); \
......
include/asm-arm/thread_info.h
View file @ ea1e2d62
......@@ -86,8 +86,10 @@ extern void free_thread_info(struct thread_info *);
#define get_thread_info(ti) get_task_struct((ti)->task)
#define put_thread_info(ti) put_task_struct((ti)->task)
#define thread_saved_pc(tsk) (pc_pointer((tsk)->thread_info->cpu_context.pc))
#define thread_saved_fp(tsk) ((tsk)->thread_info->cpu_context.fp)
#define thread_saved_pc(tsk) \
((unsigned long)(pc_pointer((tsk)->thread_info->cpu_context.pc)))
#define thread_saved_fp(tsk) \
((unsigned long)((tsk)->thread_info->cpu_context.fp))
#else /* !__ASSEMBLY__ */
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment
GitLab Nexedi Edition | About GitLab | About Nexedi | 沪ICP备2021021310号-2 | 沪ICP备2021021310号-7