Commit ec34d52e authored by Dongjin Kim's avatar Dongjin Kim Committed by Kukjin Kim

ARM: dts: Fix the timing property of MSHC controller for exynos4412-odroidx

This fixes the property of dw-mshc-sdr-timing and dw-mshc-ddr-timing as per
its current binding, it only has two cells.
Signed-off-by: default avatarDongjin Kim <tobetter@gmail.com>
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
parent e88d5ae6
...@@ -49,8 +49,8 @@ mshc@12550000 { ...@@ -49,8 +49,8 @@ mshc@12550000 {
fifo-depth = <0x80>; fifo-depth = <0x80>;
card-detect-delay = <200>; card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>; samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3 3>; samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2 3>; samsung,dw-mshc-ddr-timing = <1 2>;
slot@0 { slot@0 {
reg = <0>; reg = <0>;
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment