Commit ec87c99d authored by Leo Yan's avatar Leo Yan Committed by Namhyung Kim

perf parse-regs: Always build perf register functions

Currently, the macro HAVE_PERF_REGS_SUPPORT is used as a switch to turn
on or turn off the code of perf registers. If any architecture cannot
support perf register, it disables the perf register parsing, for both
the native parsing and cross parsing for other architectures.

To support both the native parsing and cross parsing, the tool should
always build the perf regs functions. Thus, this patch removes
HAVE_PERF_REGS_SUPPORT from the perf regs files.
Signed-off-by: default avatarLeo Yan <leo.yan@linux.dev>
Reviewed-by: default avatarIan Rogers <irogers@google.com>
Cc: James Clark <james.clark@arm.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Guo Ren <guoren@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Ming Wang <wangming01@loongson.cn>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: linux-csky@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240214113947.240957-3-leo.yan@linux.dev
parent fca6af7b
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/arm64/include/uapi/asm/perf_regs.h"
......@@ -92,5 +90,3 @@ uint64_t __perf_reg_sp_arm64(void)
{
return PERF_REG_ARM64_SP;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/arm/include/uapi/asm/perf_regs.h"
......@@ -56,5 +54,3 @@ uint64_t __perf_reg_sp_arm(void)
{
return PERF_REG_ARM_SP;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../arch/csky/include/uapi/asm/perf_regs.h"
......@@ -96,5 +94,3 @@ uint64_t __perf_reg_sp_csky(void)
{
return PERF_REG_CSKY_SP;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/loongarch/include/uapi/asm/perf_regs.h"
......@@ -87,5 +85,3 @@ uint64_t __perf_reg_sp_loongarch(void)
{
return PERF_REG_LOONGARCH_R3;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/mips/include/uapi/asm/perf_regs.h"
......@@ -83,5 +81,3 @@ uint64_t __perf_reg_sp_mips(void)
{
return PERF_REG_MIPS_R29;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/powerpc/include/uapi/asm/perf_regs.h"
......@@ -141,5 +139,3 @@ uint64_t __perf_reg_sp_powerpc(void)
{
return PERF_REG_POWERPC_R1;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/riscv/include/uapi/asm/perf_regs.h"
......@@ -88,5 +86,3 @@ uint64_t __perf_reg_sp_riscv(void)
{
return PERF_REG_RISCV_SP;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/s390/include/uapi/asm/perf_regs.h"
......@@ -92,5 +90,3 @@ uint64_t __perf_reg_sp_s390(void)
{
return PERF_REG_S390_R15;
}
#endif
// SPDX-License-Identifier: GPL-2.0
#ifdef HAVE_PERF_REGS_SUPPORT
#include "../perf_regs.h"
#include "../../../arch/x86/include/uapi/asm/perf_regs.h"
......@@ -94,5 +92,3 @@ uint64_t __perf_reg_sp_x86(void)
{
return PERF_REG_X86_SP;
}
#endif
......@@ -21,8 +21,6 @@ uint64_t __weak arch__user_reg_mask(void)
return 0;
}
#ifdef HAVE_PERF_REGS_SUPPORT
const char *perf_reg_name(int id, const char *arch)
{
const char *reg_name = NULL;
......@@ -125,5 +123,3 @@ uint64_t perf_arch_reg_sp(const char *arch)
pr_err("Fail to find SP register for arch %s, returns 0\n", arch);
return 0;
}
#endif
......@@ -27,7 +27,6 @@ int arch_sdt_arg_parse_op(char *old_op, char **new_op);
uint64_t arch__intr_reg_mask(void);
uint64_t arch__user_reg_mask(void);
#ifdef HAVE_PERF_REGS_SUPPORT
extern const struct sample_reg sample_reg_masks[];
const char *perf_reg_name(int id, const char *arch);
......@@ -67,34 +66,4 @@ static inline uint64_t DWARF_MINIMAL_REGS(const char *arch)
return (1ULL << perf_arch_reg_ip(arch)) | (1ULL << perf_arch_reg_sp(arch));
}
#else
static inline uint64_t DWARF_MINIMAL_REGS(const char *arch __maybe_unused)
{
return 0;
}
static inline const char *perf_reg_name(int id __maybe_unused, const char *arch __maybe_unused)
{
return "unknown";
}
static inline int perf_reg_value(u64 *valp __maybe_unused,
struct regs_dump *regs __maybe_unused,
int id __maybe_unused)
{
return 0;
}
static inline uint64_t perf_arch_reg_ip(const char *arch __maybe_unused)
{
return 0;
}
static inline uint64_t perf_arch_reg_sp(const char *arch __maybe_unused)
{
return 0;
}
#endif /* HAVE_PERF_REGS_SUPPORT */
#endif /* __PERF_REGS_H */
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