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Commit eccec1ce authored by Martin Dalecki's avatar Martin Dalecki Committed by Linus Torvalds
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[PATCH] 2.5.21 IDE 88 

 - Bunch of cleanups by Bartlomiej (accounts for over a half of the patch):

    cmd64x.c:
	- kill SPLIT_BYTE() macro
	- kill wrappers for cmd64x_config_drive_for_dma()
	- misc cleanups

    cy82c693.c:
	- kill obsolete comments
	- clean cy82c693_tune_drive() and calc_clk()
	- misc cleanups

    hpt34x.c:
	- kill obsolete comment
	- kill SPLIT_BYTE()
	- kill hpt34x_clear_chipset()
	- simplify hpt34x_tune_drive()

    hpt366.c:
	- kill hpt_min_rev()
	- kill redundant hpt368_tune_chipset() and hpt374_tune_chipset()
	- fix badlists checking in config_chipset_for_dma()
	- misc cleanups

    pdc202xx.c:
	- clean registers decoding
	- clean pdc202xx_tune_chipset()
	- kill pdc202xx_udma_irq_status(), use generic udma_pci_irq_status()
	- rationalize pdc202xx_reset()
	- kill UDMA_SPEED_FLAG() and PDC_CLOCK() macros,
	  do it right by defining constants PDC_UDMA and PDC_CLK
	- kill init_high_16() inline, no need to hide internals
	- clean pdc202xx_init_chipset()
	- split ata66_pdc202xx() and pdc202xx_init_chipset()
	- clean config_chipset_for_dma()
	- misc cleanups

 - Fix plug in of CF cards. The previously used sub device driver attach method
   lookup was entirely hosed.

 - Enforce indentation style on ide-cs.c. Enable debugging there. (Makes the
   patch quite big...)
parent ded80dca
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Showing with 699 additions and 882 deletions
drivers/ide/cmd64x.c
View file @ eccec1ce
This diff is collapsed.
drivers/ide/cy82c693.c
View file @ eccec1ce
......@@ -21,12 +21,9 @@
* hdparm -t reports 8.17 MB/sec at about 6% CPU usage for the DTTA
* - this is my first linux driver, so there's probably a lot of room
* for optimizations and bug fixing, so feel free to do it.
* - use idebus=xx parameter to set PCI bus speed - needed to calc
* timings for PIO modes (default will be 40)
* - if using PIO mode it's a good idea to set the PIO mode and
* 32-bit I/O support (if possible), e.g. hdparm -p2 -c1 /dev/hda
* - I had some problems with my IBM DHEA with PIO modes < 2
* (lost interrupts) ?????
* FIXME: probably because we set wrong timings for 8bit --bkz
* - first tests with DMA look okay, they seem to work, but there is a
* problem with sound - the BusMaster IDE TimeOut should fixed this
*
......@@ -83,6 +80,9 @@
/* here are the offset definitions for the registers */
#define CY82_IDE_CMDREG 0x04
#define CY82_IDE_ADDRSETUP 0x48
#define CYPRESS_TIMINGS 0x4C
#define CY82_IDE_MASTER_IOR 0x4C
#define CY82_IDE_MASTER_IOW 0x4D
#define CY82_IDE_SLAVE_IOR 0x4E
......@@ -105,19 +105,20 @@
#define CY82C963_MIN_BUS_SPEED 25
#define CY82C963_MAX_BUS_SPEED 33
/* the struct for the PIO mode timings */
/* the struct for the PIO mode timings (in clocks) */
typedef struct pio_clocks_s {
byte address_time; /* Address setup (clocks) */
byte time_16r; /* clocks for 16bit IOR (0xF0=Active/data, 0x0F=Recovery) */
byte time_16w; /* clocks for 16bit IOW (0xF0=Active/data, 0x0F=Recovery) */
byte time_8; /* clocks for 8bit (0xF0=Active/data, 0x0F=Recovery) */
u8 address_time; /* Address setup */
/* 0xF0=Active/data, 0x0F=Recovery */
u8 time_16r; /* 16bit IOR */
u8 time_16w; /* 16bit IOW */
u8 time_8; /* 8bit */
} pio_clocks_t;
/*
* calc clocks using bus_speed
* returns (rounded up) time in bus clocks for time in ns
*/
static int calc_clk (int time, int bus_speed)
static u8 calc_clk(int time, int bus_speed)
{
int clocks;
......@@ -129,7 +130,7 @@ static int calc_clk (int time, int bus_speed)
if (clocks > 0x0F)
clocks = 0x0F;
return clocks;
return (u8)clocks;
}
/*
......@@ -140,7 +141,8 @@ static int calc_clk (int time, int bus_speed)
* for mode 3 and 4 drives 8 and 16-bit timings are the same
*
*/
static void compute_clocks (byte pio, pio_clocks_t *p_pclk)
/* FIXME: use generic ata-timings library --bkz */
static void compute_clocks(u8 pio, pio_clocks_t *p_pclk)
{
struct ata_timing *t;
int clk1, clk2;
......@@ -149,34 +151,33 @@ static void compute_clocks (byte pio, pio_clocks_t *p_pclk)
/* we don't check against CY82C693's min and max speed,
* so you can play with the idebus=xx parameter
* FIXME: warn about going out of specification --bkz
*/
if (pio > CY82C693_MAX_PIO)
pio = CY82C693_MAX_PIO;
/* let's calc the address setup time clocks */
p_pclk->address_time = (byte)calc_clk(t->setup, system_bus_speed);
/* address setup */
p_pclk->address_time = calc_clk(t->setup, system_bus_speed);
/* let's calc the active and recovery time clocks */
/* active */
clk1 = calc_clk(t->active, system_bus_speed);
/* calc recovery timing */
clk2 = t->cycle - t->active - t->setup;
clk2 = calc_clk(clk2, system_bus_speed);
/* FIXME: check why not t->cycle - t->active ? --bkz */
/* recovery */
clk2 = calc_clk(t->cycle - t->active - t->setup, system_bus_speed);
clk1 = (clk1<<4)|clk2; /* combine active and recovery clocks */
clk1 = (clk1 << 4) | clk2; /* combine active and recovery clocks */
/* note: we use the same values for 16bit IOR and IOW
* those are all the same, since I don't have other
* timings than those from ata-timing.h
*/
p_pclk->time_16w = p_pclk->time_16r = clk1;
p_pclk->time_16r = (byte)clk1;
p_pclk->time_16w = (byte)clk1;
/* FIXME: ugh... --bkz */
/* what are good values for 8bit ?? */
p_pclk->time_8 = (byte)clk1;
p_pclk->time_8 = clk1;
}
#ifdef CONFIG_BLK_DEV_IDEDMA
......@@ -276,7 +277,9 @@ static void cy82c693_tune_drive(struct ata_device *drive, byte pio)
struct pci_dev *dev = hwif->pci_dev;
pio_clocks_t pclk;
unsigned int addrCtrl;
u8 ior, iow, bit8;
/* FIXME: probaly broken --bkz */
/* select primary or secondary channel */
if (hwif->index > 0) { /* drive is on the secondary channel */
dev = pci_find_slot(dev->bus->number, dev->devfn+1);
......@@ -286,40 +289,41 @@ static void cy82c693_tune_drive(struct ata_device *drive, byte pio)
}
}
if (drive->select.b.unit == 0) {
ior = CY82_IDE_MASTER_IOR;
iow = CY82_IDE_MASTER_IOW;
bit8 = CY82_IDE_MASTER_8BIT;
} else {
ior = CY82_IDE_SLAVE_IOR;
iow = CY82_IDE_SLAVE_IOW;
bit8 = CY82_IDE_SLAVE_8BIT;
}
#if CY82C693_DEBUG_LOGS
/* for debug let's show the register values */
if (drive->select.b.unit == 0) {
/*
* get master drive registers
* address setup control register
* is 32 bit !!!
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= 0x0F;
/* now let's get the remaining registers */
pci_read_config_byte(dev, CY82_IDE_MASTER_IOR, &pclk.time_16r);
pci_read_config_byte(dev, CY82_IDE_MASTER_IOW, &pclk.time_16w);
pci_read_config_byte(dev, CY82_IDE_MASTER_8BIT, &pclk.time_8);
} else {
/*
* set slave drive registers
* address setup control register
* is 32 bit !!!
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
/*
* get address setup control register
* mine master or slave data
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
if (drive->select.b.unit == 0)
addrCtrl &= 0x0F;
else {
addrCtrl &= 0xF0;
addrCtrl >>= 4;
/* now let's get the remaining registers */
pci_read_config_byte(dev, CY82_IDE_SLAVE_IOR, &pclk.time_16r);
pci_read_config_byte(dev, CY82_IDE_SLAVE_IOW, &pclk.time_16w);
pci_read_config_byte(dev, CY82_IDE_SLAVE_8BIT, &pclk.time_8);
}
printk (KERN_INFO "%s (ch=%d, dev=%d): PIO timing is (addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n", drive->name, hwif->unit, drive->select.b.unit, addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
/* now let's get the remaining registers */
pci_read_config_byte(dev, ior, &pclk.time_16r);
pci_read_config_byte(dev, iow, &pclk.time_16w);
pci_read_config_byte(dev, bit8, &pclk.time_8);
printk(KERN_INFO "%s (ch=%d, dev=%d): PIO timing is (addr=0x%X,"
" ior=0x%X, iow=0x%X, 8bit=0x%X)\n",
drive->name, hwif->unit, drive->select.b.unit,
addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
#endif /* CY82C693_DEBUG_LOGS */
/* first let's calc the pio modes */
......@@ -331,65 +335,37 @@ static void cy82c693_tune_drive(struct ata_device *drive, byte pio)
compute_clocks(pio, &pclk); /* let's calc the values for this PIO mode */
/* now let's write the clocks registers */
/*
* set address setup control register
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
if (drive->select.b.unit == 0) {
/*
* set master drive
* address setup control register
* is 32 bit !!!
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF);
addrCtrl &= (~0x0F);
addrCtrl |= (unsigned int)pclk.address_time;
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
/* now let's set the remaining registers */
pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, pclk.time_16r);
pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, pclk.time_16w);
pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, pclk.time_8);
addrCtrl &= 0xF;
} else {
/*
* set slave drive
* address setup control register
* is 32 bit !!!
*/
pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
addrCtrl &= (~0xF0);
addrCtrl |= ((unsigned int)pclk.address_time<<4);
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
/* now let's set the remaining registers */
pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, pclk.time_16r);
pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, pclk.time_16w);
pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, pclk.time_8);
addrCtrl >>= 4;
addrCtrl &= 0xF;
}
pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
/* now let's set the remaining registers */
pci_write_config_byte(dev, ior, pclk.time_16r);
pci_write_config_byte(dev, iow, pclk.time_16w);
pci_write_config_byte(dev, bit8, pclk.time_8);
#if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to (addr=0x%X, ior=0x%X, iow=0x%X, 8bit=0x%X)\n", drive->name, hwif->unit, drive->select.b.unit, addrCtrl, pclk.time_16r, pclk.time_16w, pclk.time_8);
#endif /* CY82C693_DEBUG_INFO */
printk(KERN_INFO "%s (ch=%d, dev=%d): set PIO timing to (addr=0x%X,"
" ior=0x%X, iow=0x%X, 8bit=0x%X)\n", drive->name,
hwif->unit, drive->select.b.unit, addrCtrl,
pclk.time_16r, pclk.time_16w, pclk.time_8);
#endif
}
/*
* this function is called during init and is used to setup the cy82c693 chip
*/
/*
* FIXME! "pci_init_cy82c693" really should replace
* the "init_cy82c693_chip", it is the correct location to tinker/setup
* the device prior to INIT.
*/
static unsigned int __init pci_init_cy82c693(struct pci_dev *dev)
{
#ifdef CY82C693_SETDMA_CLOCK
byte data;
#endif /* CY82C693_SETDMA_CLOCK */
u8 data;
#endif
/* write info about this verion of the driver */
printk (KERN_INFO CY82_VERSION "\n");
......@@ -402,7 +378,7 @@ static unsigned int __init pci_init_cy82c693(struct pci_dev *dev)
#if CY82C693_DEBUG_INFO
printk (KERN_INFO "%s: Peripheral Configuration Register: 0x%X\n", dev->name, data);
#endif /* CY82C693_DEBUG_INFO */
#endif
/*
* for some reason sometimes the DMA controller
......
drivers/ide/hpt34x.c
View file @ eccec1ce
......@@ -5,19 +5,7 @@
* Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
* May be copied or modified under the terms of the GNU General Public License
*
*
* 00:12.0 Unknown mass storage controller:
* Triones Technologies, Inc.
* Unknown device 0003 (rev 01)
*
* hde: UDMA 2 (0x0000 0x0002) (0x0000 0x0010)
* hdf: UDMA 2 (0x0002 0x0012) (0x0010 0x0030)
* hde: DMA 2 (0x0000 0x0002) (0x0000 0x0010)
* hdf: DMA 2 (0x0002 0x0012) (0x0010 0x0030)
* hdg: DMA 1 (0x0012 0x0052) (0x0030 0x0070)
* hdh: DMA 1 (0x0052 0x0252) (0x0070 0x00f0)
*
* ide-pci.c reference
* ide-pci.c reference:
*
* Since there are two cards that report almost identically,
* the only discernable difference is the values reported in pcicmd.
......@@ -45,53 +33,34 @@
#include "ata-timing.h"
#include "pcihost.h"
#ifndef SPLIT_BYTE
# define SPLIT_BYTE(B,H,L) ((H)=(B>>4), (L)=(B-((B>>4)<<4)))
#endif
#define HPT343_DEBUG_DRIVE_INFO 0
static void hpt34x_clear_chipset(struct ata_device *drive)
{
unsigned int reg1 = 0, tmp1 = 0;
unsigned int reg2 = 0, tmp2 = 0;
pci_read_config_dword(drive->channel->pci_dev, 0x44, &reg1);
pci_read_config_dword(drive->channel->pci_dev, 0x48, &reg2);
tmp1 = ((0x00 << (3 * drive->dn)) | (reg1 & ~(7 << (3 * drive->dn))));
tmp2 = (reg2 & ~(0x11 << drive->dn));
pci_write_config_dword(drive->channel->pci_dev, 0x44, tmp1);
pci_write_config_dword(drive->channel->pci_dev, 0x48, tmp2);
}
static int hpt34x_tune_chipset(struct ata_device *drive, byte speed)
static int hpt34x_tune_chipset(struct ata_device *drive, u8 speed)
{
byte hi_speed, lo_speed;
unsigned int reg1 = 0, tmp1 = 0;
unsigned int reg2 = 0, tmp2 = 0;
SPLIT_BYTE(speed, hi_speed, lo_speed);
if (hi_speed & 7) {
hi_speed = (hi_speed & 4) ? 0x01 : 0x10;
} else {
lo_speed <<= 5;
lo_speed >>= 5;
}
struct pci_dev *dev = drive->channel->pci_dev;
u8 udma = 0, pio = 0;
u32 reg1, reg2, tmp1, tmp2;
if (speed >= XFER_UDMA_0)
udma = 0x01;
else if (speed >= XFER_SW_DMA_0)
udma = 0x10;
else
pio = speed & 7;
pci_read_config_dword(drive->channel->pci_dev, 0x44, &reg1);
pci_read_config_dword(drive->channel->pci_dev, 0x48, &reg2);
tmp1 = ((lo_speed << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn))));
tmp2 = ((hi_speed << drive->dn) | reg2);
pci_write_config_dword(drive->channel->pci_dev, 0x44, tmp1);
pci_write_config_dword(drive->channel->pci_dev, 0x48, tmp2);
pci_read_config_dword(dev, 0x44, &reg1);
pci_read_config_dword(dev, 0x48, &reg2);
tmp1 = (pio << (3*drive->dn)) | (reg1 & ~(7 << (3*drive->dn)));
tmp2 = (udma << drive->dn) | (reg2 & ~(0x11 << drive->dn));
pci_write_config_dword(dev, 0x44, tmp1);
pci_write_config_dword(dev, 0x48, tmp2);
#if HPT343_DEBUG_DRIVE_INFO
printk("%s: %02x drive%d (0x%04x 0x%04x) (0x%04x 0x%04x)" \
" (0x%02x 0x%02x) 0x%04x\n",
drive->name, speed,
drive->dn, reg1, tmp1, reg2, tmp2,
hi_speed, lo_speed, err);
udma, pio, err);
#endif
drive->current_speed = speed;
......@@ -103,7 +72,7 @@ static void config_chipset_for_pio(struct ata_device *drive)
unsigned short eide_pio_timing[6] = {960, 480, 240, 180, 120, 90};
unsigned short xfer_pio = drive->id->eide_pio_modes;
byte timing, speed, pio;
u8 timing, speed, pio;
pio = ata_timing_mode(drive, XFER_PIO | XFER_EPIO) - XFER_PIO_0;
......@@ -135,19 +104,9 @@ static void config_chipset_for_pio(struct ata_device *drive)
(void) hpt34x_tune_chipset(drive, speed);
}
static void hpt34x_tune_drive(struct ata_device *drive, byte pio)
static void hpt34x_tune_drive(struct ata_device *drive, u8 pio)
{
byte speed;
switch(pio) {
case 4: speed = XFER_PIO_4;break;
case 3: speed = XFER_PIO_3;break;
case 2: speed = XFER_PIO_2;break;
case 1: speed = XFER_PIO_1;break;
default: speed = XFER_PIO_0;break;
}
hpt34x_clear_chipset(drive);
(void) hpt34x_tune_chipset(drive, speed);
(void) hpt34x_tune_chipset(drive, XFER_PIO_0 + min_t(u8, pio, 4));
}
#ifdef CONFIG_BLK_DEV_IDEDMA
......@@ -168,7 +127,6 @@ static int config_chipset_for_dma(struct ata_device *drive, u8 udma)
if (mode < XFER_SW_DMA_0)
return 0;
hpt34x_clear_chipset(drive);
return !hpt34x_tune_chipset(drive, mode);
}
......
drivers/ide/hpt366.c
View file @ eccec1ce
This diff is collapsed.
drivers/ide/ide-cs.c
View file @ eccec1ce
This diff is collapsed.
drivers/ide/ide-taskfile.c
View file @ eccec1ce
......@@ -176,6 +176,9 @@ int drive_is_ready(struct ata_device *drive)
return 1; /* drive ready: *might* be interrupting */
}
/*
* FIXME: Channel lock should be held on entry.
*/
ide_startstop_t ata_taskfile(struct ata_device *drive,
struct ata_taskfile *ar, struct request *rq)
{
......
drivers/ide/main.c
View file @ eccec1ce
......@@ -325,7 +325,6 @@ void ide_driver_module(void)
int i;
/* Don't reinit the probe if there is already one channel detected. */
for (i = 0; i < MAX_HWIFS; ++i) {
if (ide_hwifs[i].present)
goto revalidate;
......@@ -565,33 +564,12 @@ static int subdriver_match(struct ata_channel *channel, struct ata_operations *o
if (drive->present && !drive->driver) {
(*ops->attach)(drive);
if (drive->driver != NULL)
count++;
++count;
}
}
return count;
}
static struct ata_operations * subdriver_iterator(struct ata_operations *prev)
{
struct ata_operations *tmp;
unsigned long flags;
spin_lock_irqsave(&ata_drivers_lock, flags);
/* Restart from beginning if current ata_operations was deallocated,
or if prev is NULL. */
for(tmp = ata_drivers; tmp != prev && tmp; tmp = tmp->next);
if (!tmp)
tmp = ata_drivers;
else
tmp = tmp->next;
spin_unlock_irqrestore(&ata_drivers_lock, flags);
return tmp;
}
/*
* Register an IDE interface, specifing exactly the registers etc
* Set initializing=1 iff calling before probes have taken place.
......@@ -601,7 +579,6 @@ int ide_register_hw(hw_regs_t *hw)
int h;
int retry = 1;
struct ata_channel *ch;
struct ata_operations *subdriver;
do {
for (h = 0; h < MAX_HWIFS; ++h) {
......@@ -639,12 +616,20 @@ int ide_register_hw(hw_regs_t *hw)
}
/* Look up whatever there is a subdriver, which will serve this
* device.
* device and execute the attach method it is providing.
*/
subdriver = NULL;
while ((subdriver = subdriver_iterator(subdriver))) {
if (subdriver_match(ch, subdriver) > 0)
break;
{
struct ata_operations *tmp;
unsigned long flags;
struct ata_operations *sd = NULL;
spin_lock_irqsave(&ata_drivers_lock, flags);
for(tmp = ata_drivers; tmp; tmp = tmp->next) {
if (subdriver_match(ch, tmp) > 0)
break;
}
spin_unlock_irqrestore(&ata_drivers_lock, flags);
}
return (initializing || ch->present) ? h : -1;
......
drivers/ide/pdc202xx.c
View file @ eccec1ce
This diff is collapsed.
include/linux/ide.h
View file @ eccec1ce
......@@ -613,7 +613,6 @@ extern u8 ata_dump(struct ata_device *, struct request *, const char *);
extern ide_startstop_t ata_error(struct ata_device *, struct request *rq, const char *);
extern void ide_fixstring(char *s, const int bytecount, const int byteswap);
extern int ide_wait_noerr(struct ata_device *, byte, byte, unsigned long);
/*
* This routine is called from the partition-table code in genhd.c
......
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