Commit ed824a62 authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'edac_for_3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:

 - a new synopsys_edac.c driver for the Synopsys DDR controller, from
   Punnaiah Choudary Kalluri.

 - minor fixes/cleanups all around

 - Mauro and I are adding the repo URLs to MAINTAINERS since people
   asked for trees to base upcoming work on.

* tag 'edac_for_3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
  EDAC: Add repo URLs to MAINTAINERS
  EDAC, mv64x60_edac: Fix an error code in probe()
  EDAC: edac_mc_sysfs: Make stuff static
  EDAC: Fix the leak of mci->bus->name when bus_register fails
  edac: i5100_edac: Remove unused i5100_recmema_dm_buf_id
  EDAC, synps: Add EDAC support for zynq ddr ecc controller
  mpc85xx_edac: Fix a typo in comments
  EDAC, mce_amd_inj: Fix sparse non static symbol warning
parents e07e0d4c 7a859516
...@@ -1586,6 +1586,7 @@ N: xilinx ...@@ -1586,6 +1586,7 @@ N: xilinx
F: drivers/clocksource/cadence_ttc_timer.c F: drivers/clocksource/cadence_ttc_timer.c
F: drivers/i2c/busses/i2c-cadence.c F: drivers/i2c/busses/i2c-cadence.c
F: drivers/mmc/host/sdhci-of-arasan.c F: drivers/mmc/host/sdhci-of-arasan.c
F: drivers/edac/synopsys_edac.c
ARM SMMU DRIVER ARM SMMU DRIVER
M: Will Deacon <will.deacon@arm.com> M: Will Deacon <will.deacon@arm.com>
...@@ -3513,6 +3514,8 @@ M: Borislav Petkov <bp@alien8.de> ...@@ -3513,6 +3514,8 @@ M: Borislav Petkov <bp@alien8.de>
M: Mauro Carvalho Chehab <mchehab@osg.samsung.com> M: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
L: linux-edac@vger.kernel.org L: linux-edac@vger.kernel.org
W: bluesmoke.sourceforge.net W: bluesmoke.sourceforge.net
T: git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git#for-next
T: git://git.kernel.org/pub/linux/kernel/git/mchehab/linux-edac.git#linux_next
S: Supported S: Supported
F: Documentation/edac.txt F: Documentation/edac.txt
F: drivers/edac/ F: drivers/edac/
......
...@@ -385,4 +385,11 @@ config EDAC_ALTERA_MC ...@@ -385,4 +385,11 @@ config EDAC_ALTERA_MC
preloader must initialize the SDRAM before loading preloader must initialize the SDRAM before loading
the kernel. the kernel.
config EDAC_SYNOPSYS
tristate "Synopsys DDR Memory Controller"
depends on EDAC_MM_EDAC && ARCH_ZYNQ
help
Support for error detection and correction on the Synopsys DDR
memory controller.
endif # EDAC endif # EDAC
...@@ -67,3 +67,4 @@ obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o ...@@ -67,3 +67,4 @@ obj-$(CONFIG_EDAC_OCTEON_LMC) += octeon_edac-lmc.o
obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o obj-$(CONFIG_EDAC_OCTEON_PCI) += octeon_edac-pci.o
obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o obj-$(CONFIG_EDAC_ALTERA_MC) += altera_edac.o
obj-$(CONFIG_EDAC_SYNOPSYS) += synopsys_edac.o
...@@ -157,7 +157,7 @@ struct dev_ch_attribute { ...@@ -157,7 +157,7 @@ struct dev_ch_attribute {
}; };
#define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \ #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
struct dev_ch_attribute dev_attr_legacy_##_name = \ static struct dev_ch_attribute dev_attr_legacy_##_name = \
{ __ATTR(_name, _mode, _show, _store), (_var) } { __ATTR(_name, _mode, _show, _store), (_var) }
#define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel) #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
...@@ -850,20 +850,20 @@ static const struct file_operations debug_fake_inject_fops = { ...@@ -850,20 +850,20 @@ static const struct file_operations debug_fake_inject_fops = {
#endif #endif
/* default Control file */ /* default Control file */
DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store); static DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
/* default Attribute files */ /* default Attribute files */
DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL); static DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL); static DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL); static DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL); static DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL); static DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL); static DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL); static DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL); static DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
/* memory scrubber attribute file */ /* memory scrubber attribute file */
DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL); static DEVICE_ATTR(sdram_scrub_rate, 0, NULL, NULL);
static struct attribute *mci_attrs[] = { static struct attribute *mci_attrs[] = {
&dev_attr_reset_counters.attr, &dev_attr_reset_counters.attr,
...@@ -989,7 +989,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -989,7 +989,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
err = bus_register(mci->bus); err = bus_register(mci->bus);
if (err < 0) if (err < 0)
return err; goto fail_free_name;
/* get the /sys/devices/system/edac subsys reference */ /* get the /sys/devices/system/edac subsys reference */
mci->dev.type = &mci_attr_type; mci->dev.type = &mci_attr_type;
...@@ -1005,9 +1005,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -1005,9 +1005,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
err = device_add(&mci->dev); err = device_add(&mci->dev);
if (err < 0) { if (err < 0) {
edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev)); edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
bus_unregister(mci->bus); goto fail_unregister_bus;
kfree(mci->bus->name);
return err;
} }
if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) { if (mci->set_sdram_scrub_rate || mci->get_sdram_scrub_rate) {
...@@ -1015,15 +1013,16 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -1015,15 +1013,16 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO; dev_attr_sdram_scrub_rate.attr.mode |= S_IRUGO;
dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show; dev_attr_sdram_scrub_rate.show = &mci_sdram_scrub_rate_show;
} }
if (mci->set_sdram_scrub_rate) { if (mci->set_sdram_scrub_rate) {
dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR; dev_attr_sdram_scrub_rate.attr.mode |= S_IWUSR;
dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store; dev_attr_sdram_scrub_rate.store = &mci_sdram_scrub_rate_store;
} }
err = device_create_file(&mci->dev,
&dev_attr_sdram_scrub_rate); err = device_create_file(&mci->dev, &dev_attr_sdram_scrub_rate);
if (err) { if (err) {
edac_dbg(1, "failure: create sdram_scrub_rate\n"); edac_dbg(1, "failure: create sdram_scrub_rate\n");
goto fail2; goto fail_unregister_dev;
} }
} }
/* /*
...@@ -1032,8 +1031,9 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -1032,8 +1031,9 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
for (i = 0; i < mci->tot_dimms; i++) { for (i = 0; i < mci->tot_dimms; i++) {
struct dimm_info *dimm = mci->dimms[i]; struct dimm_info *dimm = mci->dimms[i];
/* Only expose populated DIMMs */ /* Only expose populated DIMMs */
if (dimm->nr_pages == 0) if (!dimm->nr_pages)
continue; continue;
#ifdef CONFIG_EDAC_DEBUG #ifdef CONFIG_EDAC_DEBUG
edac_dbg(1, "creating dimm%d, located at ", i); edac_dbg(1, "creating dimm%d, located at ", i);
if (edac_debug_level >= 1) { if (edac_debug_level >= 1) {
...@@ -1048,14 +1048,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -1048,14 +1048,14 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
err = edac_create_dimm_object(mci, dimm, i); err = edac_create_dimm_object(mci, dimm, i);
if (err) { if (err) {
edac_dbg(1, "failure: create dimm %d obj\n", i); edac_dbg(1, "failure: create dimm %d obj\n", i);
goto fail; goto fail_unregister_dimm;
} }
} }
#ifdef CONFIG_EDAC_LEGACY_SYSFS #ifdef CONFIG_EDAC_LEGACY_SYSFS
err = edac_create_csrow_objects(mci); err = edac_create_csrow_objects(mci);
if (err < 0) if (err < 0)
goto fail; goto fail_unregister_dimm;
#endif #endif
#ifdef CONFIG_EDAC_DEBUG #ifdef CONFIG_EDAC_DEBUG
...@@ -1063,16 +1063,19 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci) ...@@ -1063,16 +1063,19 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
#endif #endif
return 0; return 0;
fail: fail_unregister_dimm:
for (i--; i >= 0; i--) { for (i--; i >= 0; i--) {
struct dimm_info *dimm = mci->dimms[i]; struct dimm_info *dimm = mci->dimms[i];
if (dimm->nr_pages == 0) if (!dimm->nr_pages)
continue; continue;
device_unregister(&dimm->dev); device_unregister(&dimm->dev);
} }
fail2: fail_unregister_dev:
device_unregister(&mci->dev); device_unregister(&mci->dev);
fail_unregister_bus:
bus_unregister(mci->bus); bus_unregister(mci->bus);
fail_free_name:
kfree(mci->bus->name); kfree(mci->bus->name);
return err; return err;
} }
......
...@@ -279,11 +279,6 @@ static inline u32 i5100_recmema_rank(u32 a) ...@@ -279,11 +279,6 @@ static inline u32 i5100_recmema_rank(u32 a)
return i5100_nrecmema_rank(a); return i5100_nrecmema_rank(a);
} }
static inline u32 i5100_recmema_dm_buf_id(u32 a)
{
return i5100_nrecmema_dm_buf_id(a);
}
static inline u32 i5100_recmemb_cas(u32 a) static inline u32 i5100_recmemb_cas(u32 a)
{ {
return i5100_nrecmemb_cas(a); return i5100_nrecmemb_cas(a);
......
...@@ -197,7 +197,7 @@ static int inj_bank_get(void *data, u64 *val) ...@@ -197,7 +197,7 @@ static int inj_bank_get(void *data, u64 *val)
DEFINE_SIMPLE_ATTRIBUTE(bank_fops, inj_bank_get, inj_bank_set, "%llu\n"); DEFINE_SIMPLE_ATTRIBUTE(bank_fops, inj_bank_get, inj_bank_set, "%llu\n");
struct dfs_node { static struct dfs_node {
char *name; char *name;
struct dentry *d; struct dentry *d;
const struct file_operations *fops; const struct file_operations *fops;
......
/* /*
* Freescale MPC85xx Memory Controller kenel module * Freescale MPC85xx Memory Controller kernel module
* *
* Parts Copyrighted (c) 2013 by Freescale Semiconductor, Inc. * Parts Copyrighted (c) 2013 by Freescale Semiconductor, Inc.
* *
......
/* /*
* Freescale MPC85xx Memory Controller kenel module * Freescale MPC85xx Memory Controller kernel module
* Author: Dave Jiang <djiang@mvista.com> * Author: Dave Jiang <djiang@mvista.com>
* *
* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
......
...@@ -789,7 +789,8 @@ static int mv64x60_mc_err_probe(struct platform_device *pdev) ...@@ -789,7 +789,8 @@ static int mv64x60_mc_err_probe(struct platform_device *pdev)
ctl = (ctl & 0xff00ffff) | 0x10000; ctl = (ctl & 0xff00ffff) | 0x10000;
out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl); out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl);
if (edac_mc_add_mc(mci)) { res = edac_mc_add_mc(mci);
if (res) {
edac_dbg(3, "failed edac_mc_add_mc()\n"); edac_dbg(3, "failed edac_mc_add_mc()\n");
goto err; goto err;
} }
......
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