Commit effc560d authored by Badal Nilawar's avatar Badal Nilawar Committed by Rodrigo Vivi

drm/xe/mtl: Use 16.67 Mhz freq scale factor to get rpX

For mtl and above 16.67 Mhz is the scale factor to calculate
rpX frequencies.

v2: Fix review comment (Ashutosh)
Signed-off-by: default avatarBadal Nilawar <badal.nilawar@intel.com>
Reviewed-by: default avatarAshutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231101163212.1629685-1-badal.nilawar@intel.comSigned-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 4d5252b4
...@@ -313,7 +313,7 @@ static void mtl_update_rpe_value(struct xe_guc_pc *pc) ...@@ -313,7 +313,7 @@ static void mtl_update_rpe_value(struct xe_guc_pc *pc)
else else
reg = xe_mmio_read32(gt, MTL_GT_RPE_FREQUENCY); reg = xe_mmio_read32(gt, MTL_GT_RPE_FREQUENCY);
pc->rpe_freq = REG_FIELD_GET(MTL_RPE_MASK, reg) * GT_FREQUENCY_MULTIPLIER; pc->rpe_freq = decode_freq(REG_FIELD_GET(MTL_RPE_MASK, reg));
} }
static void tgl_update_rpe_value(struct xe_guc_pc *pc) static void tgl_update_rpe_value(struct xe_guc_pc *pc)
...@@ -653,10 +653,10 @@ static void mtl_init_fused_rp_values(struct xe_guc_pc *pc) ...@@ -653,10 +653,10 @@ static void mtl_init_fused_rp_values(struct xe_guc_pc *pc)
reg = xe_mmio_read32(gt, MTL_MEDIAP_STATE_CAP); reg = xe_mmio_read32(gt, MTL_MEDIAP_STATE_CAP);
else else
reg = xe_mmio_read32(gt, MTL_RP_STATE_CAP); reg = xe_mmio_read32(gt, MTL_RP_STATE_CAP);
pc->rp0_freq = REG_FIELD_GET(MTL_RP0_CAP_MASK, reg) *
GT_FREQUENCY_MULTIPLIER; pc->rp0_freq = decode_freq(REG_FIELD_GET(MTL_RP0_CAP_MASK, reg));
pc->rpn_freq = REG_FIELD_GET(MTL_RPN_CAP_MASK, reg) *
GT_FREQUENCY_MULTIPLIER; pc->rpn_freq = decode_freq(REG_FIELD_GET(MTL_RPN_CAP_MASK, reg));
} }
static void tgl_init_fused_rp_values(struct xe_guc_pc *pc) static void tgl_init_fused_rp_values(struct xe_guc_pc *pc)
......
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