ARM: S3C64XX: Fix up IRQ mapping for balblair on Cragganmore

We are using S3C_EINT(4) instead of S3C_EINT(5).
Signed-off-by: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

arch/arm/mach-s3c64xx/mach-crag6410-module.c

@@ -60,7 +60,7 @@ static struct spi_board_info balblair_devs[] = {
 		.bus_num	= 0,
 		.chip_select	= 0,
 		.mode		= SPI_MODE_0,
-		.irq		= S3C_EINT(5),
+		.irq		= S3C_EINT(4),
 		.controller_data = &wm0010_spi_csinfo,
 		.platform_data = &wm0010_pdata,
 	},