Commit f047f29b authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
Browse files

Merge kroah.com:/home/greg/linux/BK/bleed-2.5

into kroah.com:/home/greg/linux/BK/pci-2.6
parents b4c64ce1 a94e02c7
......@@ -234,7 +234,7 @@ X!Isound/sound_firmware.c
<chapter id="uart16x50">
<title>16x50 UART Driver</title>
!Edrivers/serial/core.c
!Edrivers/serial/serial_core.c
!Edrivers/serial/8250.c
</chapter>
......
This diff is collapsed.
......@@ -2,7 +2,7 @@
----------------------------------------
Written by Geert Uytterhoeven <geert@linux-m68k.org>
Last revised: February 27, 2000
Last revised: September 5, 2003
1. Introduction
......@@ -75,7 +75,7 @@ they are CPU physical addresses as well.
The treatment of these regions depends on the type of Zorro space:
- Zorro II address space is always mapped and does not have to be mapped
explicitly using ioremap().
explicitly using z_ioremap().
Conversion from bus/physical Zorro II addresses to kernel virtual addresses
and vice versa is done using:
......@@ -83,22 +83,20 @@ The treatment of these regions depends on the type of Zorro space:
virt_addr = ZTWO_VADDR(bus_addr);
bus_addr = ZTWO_PADDR(virt_addr);
- Zorro III address space must be mapped explicitly using ioremap() first
- Zorro III address space must be mapped explicitly using z_ioremap() first
before it can be accessed:
virt_addr = ioremap(bus_addr, size);
virt_addr = z_ioremap(bus_addr, size);
...
iounmap(virt_addr);
z_iounmap(virt_addr);
5. References
-------------
linux/include/linux/zorro.h
linux/include/linux/ioport.h
linux/include/asm-m68k/io.h
linux/include/asm-m68k/amigahw.h
linux/include/asm-ppc/io.h
linux/include/asm-{m68k,ppc}/zorro.h
linux/include/linux/zorro_ids.h
linux/drivers/zorro
/proc/bus/zorro
......@@ -624,7 +624,7 @@ DIGIBOARD PC/XE AND PC/XI DRIVER
P: Christoph Lameter
M: christoph@lameter.com
W: http://www.digi.com
L: digilnux@dgii.com
L: digilnux@digi.com
S: Orphaned
DIRECTORY NOTIFICATION
......
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 0
EXTRAVERSION = -test5
EXTRAVERSION = -test6
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"
......
......@@ -16,7 +16,7 @@ H8S is planning.
3.H8MAX
Under development
see http://www.strawbelly-linux.com (Japanese Only)
see http://www.strawberry-linux.com (Japanese Only)
* Toolchain Version
gcc-3.1 or higher and patch
......
......@@ -1303,3 +1303,8 @@ config X86_TRAMPOLINE
bool
depends on SMP || X86_VISWS
default y
config PC
bool
depends on X86 && !EMBEDDED
default y
......@@ -238,12 +238,9 @@ static void __init init_intel(struct cpuinfo_x86 *c)
}
/* SEP CPUID bug: Pentium Pro reports SEP but doesn't have it until model 3 mask 3 */
if ( c->x86 == 6) {
unsigned model_mask = (c->x86_model << 8) + c->x86_mask;
if (model_mask < 0x0303)
clear_bit(X86_FEATURE_SEP, c->x86_capability);
}
if ((c->x86<<8 | c->x86_model<<4 | c->x86_mask) < 0x633)
clear_bit(X86_FEATURE_SEP, c->x86_capability);
/* Names for the Pentium II/Celeron processors
detectable only by also checking the cache size.
Dixon is NOT a Celeron. */
......
......@@ -17,7 +17,7 @@
#include "mce.h"
/* Machine Check Handler For AMD Athlon/Duron */
static void k7_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void k7_machine_check(struct pt_regs * regs, long error_code)
{
int recover=1;
u32 alow, ahigh, high, low;
......@@ -31,7 +31,7 @@ static void k7_machine_check(struct pt_regs * regs, long error_code)
printk (KERN_EMERG "CPU %d: Machine Check Exception: %08x%08x\n",
smp_processor_id(), mcgsth, mcgstl);
for (i=0; i<nr_mce_banks; i++) {
for (i=1; i<nr_mce_banks; i++) {
rdmsr (MSR_IA32_MC0_STATUS+i*4,low, high);
if (high&(1<<31)) {
if (high & (1<<29))
......@@ -81,6 +81,9 @@ void __init amd_mcheck_init(struct cpuinfo_x86 *c)
wrmsr (MSR_IA32_MCG_CTL, 0xffffffff, 0xffffffff);
nr_mce_banks = l & 0xff;
/* Clear status for MC index 0 separately, we don't touch CTL,
* as some Athlons cause spurious MCEs when its enabled. */
wrmsr (MSR_IA32_MC0_STATUS, 0x0, 0x0);
for (i=1; i<nr_mce_banks; i++) {
wrmsr (MSR_IA32_MC0_CTL+4*i, 0xffffffff, 0xffffffff);
wrmsr (MSR_IA32_MC0_STATUS+4*i, 0x0, 0x0);
......
......@@ -18,18 +18,13 @@ int mce_disabled __initdata = 0;
int nr_mce_banks;
/* Handle unconfigured int18 (should never happen) */
static void unexpected_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void unexpected_machine_check(struct pt_regs * regs, long error_code)
{
printk(KERN_ERR "CPU#%d: Unexpected int18 (Machine Check).\n", smp_processor_id());
}
/* Call the installed machine check handler for this CPU setup. */
void (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
asmlinkage void do_machine_check(struct pt_regs * regs, long error_code)
{
machine_check_vector(regs, error_code);
}
void asmlinkage (*machine_check_vector)(struct pt_regs *, long error_code) = unexpected_machine_check;
/* This has to be run for each processor */
void __init mcheck_init(struct cpuinfo_x86 *c)
......
......@@ -7,7 +7,7 @@ void intel_p6_mcheck_init(struct cpuinfo_x86 *c);
void winchip_mcheck_init(struct cpuinfo_x86 *c);
/* Call the installed machine check handler for this CPU setup. */
extern void (*machine_check_vector)(struct pt_regs *, long error_code);
extern asmlinkage void (*machine_check_vector)(struct pt_regs *, long error_code);
extern int mce_disabled __initdata;
extern int nr_mce_banks;
......
......@@ -148,7 +148,7 @@ static inline int intel_get_extended_msrs(struct intel_mce_extended_msrs *r)
return mce_num_extended_msrs;
}
static void intel_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void intel_machine_check(struct pt_regs * regs, long error_code)
{
int recover=1;
u32 alow, ahigh, high, low;
......
......@@ -16,7 +16,7 @@
#include "mce.h"
/* Machine check handler for Pentium class Intel */
static void pentium_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void pentium_machine_check(struct pt_regs * regs, long error_code)
{
u32 loaddr, hi, lotype;
rdmsr(MSR_IA32_P5_MC_ADDR, loaddr, hi);
......
......@@ -16,7 +16,7 @@
#include "mce.h"
/* Machine Check Handler For PII/PIII */
static void intel_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void intel_machine_check(struct pt_regs * regs, long error_code)
{
int recover=1;
u32 alow, ahigh, high, low;
......
......@@ -15,7 +15,7 @@
#include "mce.h"
/* Machine check handler for WinChip C6 */
static void winchip_machine_check(struct pt_regs * regs, long error_code)
static asmlinkage void winchip_machine_check(struct pt_regs * regs, long error_code)
{
printk(KERN_EMERG "CPU0: Machine Check Exception.\n");
}
......
......@@ -595,7 +595,7 @@ ENTRY(page_fault)
#ifdef CONFIG_X86_MCE
ENTRY(machine_check)
pushl $0
pushl $do_machine_check
pushl machine_check_vector
jmp error_code
#endif
......
......@@ -937,6 +937,7 @@ int cpu_sibling_map[NR_CPUS] __cacheline_aligned;
static void __init smp_boot_cpus(unsigned int max_cpus)
{
int apicid, cpu, bit, kicked;
unsigned long bogosum = 0;
/*
* Setup boot CPU information
......@@ -1048,26 +1049,25 @@ static void __init smp_boot_cpus(unsigned int max_cpus)
/*
* Allow the user to impress friends.
*/
Dprintk("Before bogomips.\n");
if (!cpucount) {
printk(KERN_ERR "Error: only one processor found.\n");
} else {
unsigned long bogosum = 0;
for (cpu = 0; cpu < NR_CPUS; cpu++)
if (cpu_isset(cpu, cpu_callout_map))
bogosum += cpu_data[cpu].loops_per_jiffy;
printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
cpucount+1,
bogosum/(500000/HZ),
(bogosum/(5000/HZ))%100);
Dprintk("Before bogocount - setting activated=1.\n");
}
for (cpu = 0; cpu < NR_CPUS; cpu++)
if (cpu_isset(cpu, cpu_callout_map))
bogosum += cpu_data[cpu].loops_per_jiffy;
printk(KERN_INFO
"Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
cpucount+1,
bogosum/(500000/HZ),
(bogosum/(5000/HZ))%100);
Dprintk("Before bogocount - setting activated=1.\n");
if (smp_b_stepping)
printk(KERN_WARNING "WARNING: SMP operation may be unreliable with B stepping processors.\n");
/* Don't taint if we are running SMP kernel on a single non-MP approved Athlon */
/*
* Don't taint if we are running SMP kernel on a single non-MP
* approved Athlon
*/
if (tainted & TAINT_UNSAFE_SMP) {
if (cpucount)
printk (KERN_INFO "WARNING: This combination of AMD processors is not suitable for SMP.\n");
......
......@@ -1849,18 +1849,19 @@ static struct file_operations ioc_map_fops = {
static void __init
ioc_proc_init(void)
{
if (ioc_list) {
struct proc_dir_entry *dir, *entry;
struct proc_dir_entry *dir, *entry;
dir = proc_mkdir("bus/mckinley", 0);
entry = create_proc_entry(ioc_list->name, 0, dir);
if (entry)
entry->proc_fops = &ioc_fops;
dir = proc_mkdir("bus/mckinley", 0);
if (!dir)
return;
entry = create_proc_entry("bitmap", 0, dir);
if (entry)
entry->proc_fops = &ioc_map_fops;
}
entry = create_proc_entry(ioc_list->name, 0, dir);
if (entry)
entry->proc_fops = &ioc_fops;
entry = create_proc_entry("bitmap", 0, dir);
if (entry)
entry->proc_fops = &ioc_map_fops;
}
#endif
......@@ -1946,6 +1947,8 @@ static int __init
sba_init(void)
{
acpi_bus_register_driver(&acpi_sba_ioc_driver);
if (!ioc_list)
return 0;
#ifdef CONFIG_PCI
{
......
......@@ -36,6 +36,7 @@
#include <asm/ia32.h>
#include <asm/machvec.h>
#include <asm/mca.h>
#include <asm/meminit.h>
#include <asm/page.h>
#include <asm/patch.h>
#include <asm/pgtable.h>
......@@ -83,91 +84,12 @@ unsigned long ia64_max_iommu_merge_mask = ~0UL;
char saved_command_line[COMMAND_LINE_SIZE]; /* used in proc filesystem */
/*
* Entries defined so far:
* - boot param structure itself
* - memory map
* - initrd (optional)
* - command line string
* - kernel code & data
*
* More could be added if necessary
*/
#define IA64_MAX_RSVD_REGIONS 5
struct rsvd_region {
unsigned long start; /* virtual address of beginning of element */
unsigned long end; /* virtual address of end of element + 1 */
};
/*
* We use a special marker for the end of memory and it uses the extra (+1) slot
*/
static struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
static int num_rsvd_regions;
#define IGNORE_PFN0 1 /* XXX fix me: ignore pfn 0 until TLB miss handler is updated... */
#ifndef CONFIG_DISCONTIGMEM
static unsigned long bootmap_start; /* physical address where the bootmem map is located */
static int
find_max_pfn (unsigned long start, unsigned long end, void *arg)
{
unsigned long *max_pfnp = arg, pfn;
pfn = (PAGE_ALIGN(end - 1) - PAGE_OFFSET) >> PAGE_SHIFT;
if (pfn > *max_pfnp)
*max_pfnp = pfn;
return 0;
}
struct rsvd_region rsvd_region[IA64_MAX_RSVD_REGIONS + 1];
int num_rsvd_regions;
#else /* CONFIG_DISCONTIGMEM */
/*
* efi_memmap_walk() knows nothing about layout of memory across nodes. Find
* out to which node a block of memory belongs. Ignore memory that we cannot
* identify, and split blocks that run across multiple nodes.
*
* Take this opportunity to round the start address up and the end address
* down to page boundaries.
*/
void
call_pernode_memory (unsigned long start, unsigned long end, void *arg)
{
unsigned long rs, re;
void (*func)(unsigned long, unsigned long, int, int);
int i;
start = PAGE_ALIGN(start);
end &= PAGE_MASK;
if (start >= end)
return;
func = arg;
if (!num_memblks) {
/*
* This machine doesn't have SRAT, so call func with
* nid=0, bank=0.
*/
if (start < end)
(*func)(start, end - start, 0, 0);
return;
}
for (i = 0; i < num_memblks; i++) {
rs = max(start, node_memblk[i].start_paddr);
re = min(end, node_memblk[i].start_paddr+node_memblk[i].size);
if (rs < re)
(*func)(rs, re-rs, node_memblk[i].nid,
node_memblk[i].bank);
}
}
#endif /* CONFIG_DISCONTIGMEM */
/*
* Filter incoming memory segments based on the primitive map created from the boot
......@@ -215,48 +137,6 @@ filter_rsvd_memory (unsigned long start, unsigned long end, void *arg)
return 0;
}
#ifndef CONFIG_DISCONTIGMEM
/*
* Find a place to put the bootmap and return its starting address in bootmap_start.
* This address must be page-aligned.
*/
static int
find_bootmap_location (unsigned long start, unsigned long end, void *arg)
{
unsigned long needed = *(unsigned long *)arg;
unsigned long range_start, range_end, free_start;
int i;
#if IGNORE_PFN0
if (start == PAGE_OFFSET) {
start += PAGE_SIZE;
if (start >= end) return 0;
}
#endif
free_start = PAGE_OFFSET;
for (i = 0; i < num_rsvd_regions; i++) {
range_start = max(start, free_start);
range_end = min(end, rsvd_region[i].start & PAGE_MASK);
if (range_end <= range_start) continue; /* skip over empty range */
if (range_end - range_start >= needed) {
bootmap_start = __pa(range_start);
return 1; /* done */
}
/* nothing more available in this segment */
if (range_end == end) return 0;
free_start = PAGE_ALIGN(rsvd_region[i].end);
}
return 0;
}
#endif /* !CONFIG_DISCONTIGMEM */
static void
sort_regions (struct rsvd_region *rsvd_region, int max)
{
......@@ -275,10 +155,16 @@ sort_regions (struct rsvd_region *rsvd_region, int max)
}
}
static void
find_memory (void)
/**
* reserve_memory - setup reserved memory areas
*
* Setup the reserved memory areas set aside for the boot parameters,
* initrd, etc. There are currently %IA64_MAX_RSVD_REGIONS defined,
* see include/asm-ia64/meminit.h if you need to define more.
*/
void
reserve_memory (void)
{
unsigned long bootmap_size;
int n = 0;
/*
......@@ -317,36 +203,17 @@ find_memory (void)
num_rsvd_regions = n;
sort_regions(rsvd_region, num_rsvd_regions);
}
#ifdef CONFIG_DISCONTIGMEM
{
extern void discontig_mem_init (void);
bootmap_size = max_pfn = 0; /* stop gcc warnings */
discontig_mem_init();
}
#else /* !CONFIG_DISCONTIGMEM */
/* first find highest page frame number */
max_pfn = 0;
efi_memmap_walk(find_max_pfn, &max_pfn);
/* how many bytes to cover all the pages */
bootmap_size = bootmem_bootmap_pages(max_pfn) << PAGE_SHIFT;
/* look for a location to hold the bootmap */
bootmap_start = ~0UL;
efi_memmap_walk(find_bootmap_location, &bootmap_size);
if (bootmap_start == ~0UL)
panic("Cannot find %ld bytes for bootmap\n", bootmap_size);
bootmap_size = init_bootmem(bootmap_start >> PAGE_SHIFT, max_pfn);
/* Free all available memory, then mark bootmem-map as being in use. */
efi_memmap_walk(filter_rsvd_memory, free_bootmem);
reserve_bootmem(bootmap_start, bootmap_size);
#endif /* !CONFIG_DISCONTIGMEM */
/**
* find_initrd - get initrd parameters from the boot parameter structure
*
* Grab the initrd start and end from the boot parameter struct given us by
* the boot loader.
*/
void
find_initrd (void)
{
#ifdef CONFIG_BLK_DEV_INITRD
if (ia64_boot_param->initrd_start) {
initrd_start = (unsigned long)__va(ia64_boot_param->initrd_start);
......
......@@ -335,7 +335,8 @@ handle_fpu_swa (int fp_fault, struct pt_regs *regs, unsigned long isr)
if ((fpu_swa_count < 4) && !(current->thread.flags & IA64_THREAD_FPEMU_NOPRINT)) {
last_time = jiffies;
++fpu_swa_count;
printk(KERN_WARNING "%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
printk(KERN_WARNING
"%s(%d): floating-point assist fault at ip %016lx, isr %016lx\n",
current->comm, current->pid, regs->cr_iip + ia64_psr(regs)->ri, isr);
}
......
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