Commit f0684c1a authored by Heiko Stuebner's avatar Heiko Stuebner Committed by Kishon Vijay Abraham I

phy/rockchip: inno-dsidphy: generalize parameter handling

During review it came to light that exposing the pll clock outside is
not the right approach and struct phy_configure_opts_mipi_dphy exists
just for that reason to transfer parameters to the phy.

So drop the exposed clock and rely on the phy configure options
to bring in the correct rate. That way we can also just drop the
open coded timing struct and default values function.

Fixes: b7535a3b ("phy/rockchip: Add support for Innosilicon MIPI/LVDS/TTL PHY")
Signed-off-by: default avatarHeiko Stuebner <heiko.stuebner@theobroma-systems.com>
Signed-off-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
parent cb18b9a9
......@@ -39,6 +39,7 @@ config PHY_ROCKCHIP_INNO_DSIDPHY
tristate "Rockchip Innosilicon MIPI/LVDS/TTL PHY driver"
depends on (ARCH_ROCKCHIP || COMPILE_TEST) && OF
select GENERIC_PHY
select GENERIC_PHY_MIPI_DPHY
help
Enable this to support the Rockchip MIPI/LVDS/TTL PHY with
Innosilicon IP block.
......
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