Commit f26fbc48 authored by Robin Getz's avatar Robin Getz Committed by Bryan Wu

Blackfin arch: ensure we work around ANOMALY_05000261 for null pointers

 We currently do not. Also make it easier to handle cplb violations - in traps.c
Signed-off-by: default avatarRobin Getz <robin.getz@analog.com>
Signed-off-by: default avatarBryan Wu <bryan.wu@analog.com>
parent 2ffbb837
......@@ -311,11 +311,10 @@ asmlinkage void trap_c(struct pt_regs *fp)
printk(KERN_NOTICE EXC_0x22);
CHK_DEBUGGER_TRAP();
break;
/* 0x23 - Data CPLB Protection Violation,
normal case is handled in _cplb_hdr */
/* 0x23 - Data CPLB protection violation, handled here */
case VEC_CPLB_VL:
info.si_code = ILL_CPLB_VI;
sig = SIGILL;
sig = SIGBUS;
printk(KERN_NOTICE EXC_0x23);
CHK_DEBUGGER_TRAP();
break;
......@@ -382,11 +381,10 @@ asmlinkage void trap_c(struct pt_regs *fp)
printk(KERN_NOTICE EXC_0x2A);
CHK_DEBUGGER_TRAP();
break;
/* 0x2B - Instruction CPLB protection Violation,
handled in _cplb_hdr */
/* 0x2B - Instruction CPLB protection violation, handled here */
case VEC_CPLB_I_VL:
info.si_code = ILL_CPLB_VI;
sig = SIGILL;
sig = SIGBUS;
printk(KERN_NOTICE EXC_0x2B);
CHK_DEBUGGER_TRAP();
break;
......
......@@ -71,13 +71,18 @@ ENDPROC(_safe_speculative_execution)
* This one does not lower the level to IRQ5, and thus can be used to
* patch up CPLB misses on the kernel stack.
*/
ENTRY(_ex_dcplb)
#if ANOMALY_05000261
#define _ex_dviol _ex_workaround_261
#define _ex_dmiss _ex_workaround_261
#define _ex_dmult _ex_workaround_261
ENTRY(_ex_workaround_261)
/*
* Work around an anomaly: if we see a new DCPLB fault, return
* without doing anything. Then, if we get the same fault again,
* handle it.
*/
P4 = R7; /* Store EXCAUSE */
p5.l = _last_cplb_fault_retx;
p5.h = _last_cplb_fault_retx;
r7 = [p5];
......@@ -86,10 +91,24 @@ ENTRY(_ex_dcplb)
cc = r6 == r7;
if !cc jump _return_from_exception;
/* fall through */
R7 = P4;
R6 = 0x26; /* Data CPLB Miss */
cc = R6 == R7;
if cc jump _ex_dcplb_miss (BP);
/* Handle 0x23 Data CPLB Protection Violation
* and Data CPLB Multiple Hits - Linux Trap Zero
*/
jump _ex_trap_c;
ENDPROC(_ex_workaround_261)
#else
#define _ex_dviol _ex_trap_c
#define _ex_dmiss _ex_dcplb_miss
#define _ex_dmult _ex_trap_c
#endif
ENDPROC(_ex_dcplb)
ENTRY(_ex_icplb)
ENTRY(_ex_dcplb_miss)
ENTRY(_ex_icplb_miss)
(R7:6,P5:4) = [sp++];
ASTAT = [sp++];
SAVE_ALL_SYS
......@@ -98,7 +117,7 @@ ENTRY(_ex_icplb)
RESTORE_ALL_SYS
SP = EX_SCRATCH_REG;
rtx;
ENDPROC(_ex_icplb)
ENDPROC(_ex_icplb_miss)
ENTRY(_ex_syscall)
DEBUG_START_HWTRACE(p5, r7)
......@@ -908,6 +927,7 @@ ENDPROC(_early_trap)
#else
.data
#endif
ENTRY(_ex_table)
/* entry for each EXCAUSE[5:0]
* This table must be in sync with the table in ./kernel/traps.c
......@@ -952,16 +972,16 @@ ENTRY(_ex_table)
.long _ex_trap_c /* 0x20 - Reserved */
.long _ex_trap_c /* 0x21 - Undefined Instruction */
.long _ex_trap_c /* 0x22 - Illegal Instruction Combination */
.long _ex_dcplb /* 0x23 - Data CPLB Protection Violation */
.long _ex_dviol /* 0x23 - Data CPLB Protection Violation */
.long _ex_trap_c /* 0x24 - Data access misaligned */
.long _ex_trap_c /* 0x25 - Unrecoverable Event */
.long _ex_dcplb /* 0x26 - Data CPLB Miss */
.long _ex_trap_c /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero */
.long _ex_dmiss /* 0x26 - Data CPLB Miss */
.long _ex_dmult /* 0x27 - Data CPLB Multiple Hits - Linux Trap Zero */
.long _ex_trap_c /* 0x28 - Emulation Watchpoint */
.long _ex_trap_c /* 0x29 - Instruction fetch access error (535 only) */
.long _ex_trap_c /* 0x2A - Instruction fetch misaligned */
.long _ex_icplb /* 0x2B - Instruction CPLB protection Violation */
.long _ex_icplb /* 0x2C - Instruction CPLB miss */
.long _ex_trap_c /* 0x2B - Instruction CPLB protection Violation */
.long _ex_icplb_miss /* 0x2C - Instruction CPLB miss */
.long _ex_trap_c /* 0x2D - Instruction CPLB Multiple Hits */
.long _ex_trap_c /* 0x2E - Illegal use of Supervisor Resource */
.long _ex_trap_c /* 0x2E - Illegal use of Supervisor Resource */
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment