Merge tag 'icc-5.14-rc1' of...

Merge tag 'icc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next

Georgi writes:

interconnect changes for 5.14

Here are changes for the 5.14-rc1 merge window consisting of interconnect
driver updates.

Driver changes:
- New driver for SC7280 platforms.
Signed-off-by: Georgi Djakov <djakov@kernel.org>

* tag 'icc-5.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc:
  interconnect: qcom: Add SC7280 interconnect provider driver
  dt-bindings: interconnect: Add Qualcomm SC7280 DT bindings

Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml

@@ -37,6 +37,18 @@ properties:
       - qcom,sc7180-npu-noc
       - qcom,sc7180-qup-virt
       - qcom,sc7180-system-noc
+      - qcom,sc7280-aggre1-noc
+      - qcom,sc7280-aggre2-noc
+      - qcom,sc7280-clk-virt
+      - qcom,sc7280-cnoc2
+      - qcom,sc7280-cnoc3
+      - qcom,sc7280-dc-noc
+      - qcom,sc7280-gem-noc
+      - qcom,sc7280-lpass-ag-noc
+      - qcom,sc7280-mc-virt
+      - qcom,sc7280-mmss-noc
+      - qcom,sc7280-nsp-noc
+      - qcom,sc7280-system-noc
       - qcom,sdm845-aggre1-noc
       - qcom,sdm845-aggre2-noc
       - qcom,sdm845-config-noc

drivers/interconnect/qcom/Kconfig

@@ -74,6 +74,15 @@ config INTERCONNECT_QCOM_SC7180
 	  This is a driver for the Qualcomm Network-on-Chip on sc7180-based
 	  platforms.
 
+config INTERCONNECT_QCOM_SC7280
+	tristate "Qualcomm SC7280 interconnect driver"
+	depends on INTERCONNECT_QCOM_RPMH_POSSIBLE
+	select INTERCONNECT_QCOM_RPMH
+	select INTERCONNECT_QCOM_BCM_VOTER
+	help
+	  This is a driver for the Qualcomm Network-on-Chip on sc7280-based
+	  platforms.
+
 config INTERCONNECT_QCOM_SDM660
 	tristate "Qualcomm SDM660 interconnect driver"
 	depends on INTERCONNECT_QCOM

drivers/interconnect/qcom/Makefile

@@ -8,6 +8,7 @@ icc-osm-l3-objs				:= osm-l3.o
 qnoc-qcs404-objs			:= qcs404.o
 icc-rpmh-obj				:= icc-rpmh.o
 qnoc-sc7180-objs			:= sc7180.o
+qnoc-sc7280-objs                        := sc7280.o
 qnoc-sdm660-objs			:= sdm660.o
 qnoc-sdm845-objs			:= sdm845.o
 qnoc-sdx55-objs				:= sdx55.o
@@ -24,6 +25,7 @@ obj-$(CONFIG_INTERCONNECT_QCOM_OSM_L3) += icc-osm-l3.o
 obj-$(CONFIG_INTERCONNECT_QCOM_QCS404) += qnoc-qcs404.o
 obj-$(CONFIG_INTERCONNECT_QCOM_RPMH) += icc-rpmh.o
 obj-$(CONFIG_INTERCONNECT_QCOM_SC7180) += qnoc-sc7180.o
+obj-$(CONFIG_INTERCONNECT_QCOM_SC7280) += qnoc-sc7280.o
 obj-$(CONFIG_INTERCONNECT_QCOM_SDM660) += qnoc-sdm660.o
 obj-$(CONFIG_INTERCONNECT_QCOM_SDM845) += qnoc-sdm845.o
 obj-$(CONFIG_INTERCONNECT_QCOM_SDX55) += qnoc-sdx55.o

drivers/interconnect/qcom/sc7280.h

+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Qualcomm #define SC7280 interconnect IDs
+ *
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __DRIVERS_INTERCONNECT_QCOM_SC7280_H
+#define __DRIVERS_INTERCONNECT_QCOM_SC7280_H
+
+#define SC7280_MASTER_GPU_TCU			0
+#define SC7280_MASTER_SYS_TCU			1
+#define SC7280_MASTER_APPSS_PROC			2
+#define SC7280_MASTER_LLCC			3
+#define SC7280_MASTER_CNOC_LPASS_AG_NOC			4
+#define SC7280_MASTER_CDSP_NOC_CFG			5
+#define SC7280_MASTER_QDSS_BAM			6
+#define SC7280_MASTER_QSPI_0			7
+#define SC7280_MASTER_QUP_0			8
+#define SC7280_MASTER_QUP_1			9
+#define SC7280_MASTER_A1NOC_CFG			10
+#define SC7280_MASTER_A2NOC_CFG			11
+#define SC7280_MASTER_A1NOC_SNOC			12
+#define SC7280_MASTER_A2NOC_SNOC			13
+#define SC7280_MASTER_COMPUTE_NOC			14
+#define SC7280_MASTER_CNOC2_CNOC3			15
+#define SC7280_MASTER_CNOC3_CNOC2			16
+#define SC7280_MASTER_CNOC_A2NOC			17
+#define SC7280_MASTER_CNOC_DC_NOC			18
+#define SC7280_MASTER_GEM_NOC_CFG			19
+#define SC7280_MASTER_GEM_NOC_CNOC			20
+#define SC7280_MASTER_GEM_NOC_PCIE_SNOC			21
+#define SC7280_MASTER_GFX3D			22
+#define SC7280_MASTER_CNOC_MNOC_CFG			23
+#define SC7280_MASTER_MNOC_HF_MEM_NOC			24
+#define SC7280_MASTER_MNOC_SF_MEM_NOC			25
+#define SC7280_MASTER_ANOC_PCIE_GEM_NOC			26
+#define SC7280_MASTER_SNOC_CFG			27
+#define SC7280_MASTER_SNOC_GC_MEM_NOC			28
+#define SC7280_MASTER_SNOC_SF_MEM_NOC			29
+#define SC7280_MASTER_VIDEO_P0			30
+#define SC7280_MASTER_VIDEO_PROC			31
+#define SC7280_MASTER_QUP_CORE_0			32
+#define SC7280_MASTER_QUP_CORE_1			33
+#define SC7280_MASTER_CAMNOC_HF			34
+#define SC7280_MASTER_CAMNOC_ICP			35
+#define SC7280_MASTER_CAMNOC_SF			36
+#define SC7280_MASTER_CRYPTO			37
+#define SC7280_MASTER_IPA			38
+#define SC7280_MASTER_MDP0			39
+#define SC7280_MASTER_CDSP_PROC			40
+#define SC7280_MASTER_PIMEM			41
+#define SC7280_MASTER_GIC			42
+#define SC7280_MASTER_PCIE_0			43
+#define SC7280_MASTER_PCIE_1			44
+#define SC7280_MASTER_QDSS_DAP			45
+#define SC7280_MASTER_QDSS_ETR			46
+#define SC7280_MASTER_SDCC_1			47
+#define SC7280_MASTER_SDCC_2			48
+#define SC7280_MASTER_SDCC_4			49
+#define SC7280_MASTER_UFS_MEM			50
+#define SC7280_MASTER_USB2			51
+#define SC7280_MASTER_USB3_0			52
+#define SC7280_SLAVE_EBI1			53
+#define SC7280_SLAVE_AHB2PHY_SOUTH			54
+#define SC7280_SLAVE_AHB2PHY_NORTH			55
+#define SC7280_SLAVE_AOSS			56
+#define SC7280_SLAVE_APPSS			57
+#define SC7280_SLAVE_CAMERA_CFG			58
+#define SC7280_SLAVE_CLK_CTL			59
+#define SC7280_SLAVE_CDSP_CFG			60
+#define SC7280_SLAVE_RBCPR_CX_CFG			61
+#define SC7280_SLAVE_RBCPR_MX_CFG			62
+#define SC7280_SLAVE_CRYPTO_0_CFG			63
+#define SC7280_SLAVE_CX_RDPM			64
+#define SC7280_SLAVE_DCC_CFG			65
+#define SC7280_SLAVE_DISPLAY_CFG			66
+#define SC7280_SLAVE_GFX3D_CFG			67
+#define SC7280_SLAVE_HWKM			68
+#define SC7280_SLAVE_IMEM_CFG			69
+#define SC7280_SLAVE_IPA_CFG			70
+#define SC7280_SLAVE_IPC_ROUTER_CFG			71
+#define SC7280_SLAVE_LLCC_CFG			72
+#define SC7280_SLAVE_LPASS			73
+#define SC7280_SLAVE_LPASS_CORE_CFG			74
+#define SC7280_SLAVE_LPASS_LPI_CFG			75
+#define SC7280_SLAVE_LPASS_MPU_CFG			76
+#define SC7280_SLAVE_LPASS_TOP_CFG			77
+#define SC7280_SLAVE_MSS_PROC_MS_MPU_CFG			78
+#define SC7280_SLAVE_MCDMA_MS_MPU_CFG			79
+#define SC7280_SLAVE_CNOC_MSS			80
+#define SC7280_SLAVE_MX_RDPM			81
+#define SC7280_SLAVE_PCIE_0_CFG			82
+#define SC7280_SLAVE_PCIE_1_CFG			83
+#define SC7280_SLAVE_PDM			84
+#define SC7280_SLAVE_PIMEM_CFG			85
+#define SC7280_SLAVE_PKA_WRAPPER_CFG			86
+#define SC7280_SLAVE_PMU_WRAPPER_CFG			87
+#define SC7280_SLAVE_QDSS_CFG			88
+#define SC7280_SLAVE_QSPI_0			89
+#define SC7280_SLAVE_QUP_0			90
+#define SC7280_SLAVE_QUP_1			91
+#define SC7280_SLAVE_SDCC_1			92
+#define SC7280_SLAVE_SDCC_2			93
+#define SC7280_SLAVE_SDCC_4			94
+#define SC7280_SLAVE_SECURITY			95
+#define SC7280_SLAVE_TCSR			96
+#define SC7280_SLAVE_TLMM			97
+#define SC7280_SLAVE_UFS_MEM_CFG			98
+#define SC7280_SLAVE_USB2			99
+#define SC7280_SLAVE_USB3_0			100
+#define SC7280_SLAVE_VENUS_CFG			101
+#define SC7280_SLAVE_VSENSE_CTRL_CFG			102
+#define SC7280_SLAVE_A1NOC_CFG			103
+#define SC7280_SLAVE_A1NOC_SNOC			104
+#define SC7280_SLAVE_A2NOC_CFG			105
+#define SC7280_SLAVE_A2NOC_SNOC			106
+#define SC7280_SLAVE_CNOC2_CNOC3			107
+#define SC7280_SLAVE_CNOC3_CNOC2			108
+#define SC7280_SLAVE_CNOC_A2NOC			109
+#define SC7280_SLAVE_DDRSS_CFG			110
+#define SC7280_SLAVE_GEM_NOC_CNOC			111
+#define SC7280_SLAVE_GEM_NOC_CFG			112
+#define SC7280_SLAVE_SNOC_GEM_NOC_GC			113
+#define SC7280_SLAVE_SNOC_GEM_NOC_SF			114
+#define SC7280_SLAVE_LLCC			115
+#define SC7280_SLAVE_MNOC_HF_MEM_NOC			116
+#define SC7280_SLAVE_MNOC_SF_MEM_NOC			117
+#define SC7280_SLAVE_CNOC_MNOC_CFG			118
+#define SC7280_SLAVE_CDSP_MEM_NOC			119
+#define SC7280_SLAVE_MEM_NOC_PCIE_SNOC			120
+#define SC7280_SLAVE_ANOC_PCIE_GEM_NOC			121
+#define SC7280_SLAVE_SNOC_CFG			122
+#define SC7280_SLAVE_QUP_CORE_0			123
+#define SC7280_SLAVE_QUP_CORE_1			124
+#define SC7280_SLAVE_BOOT_IMEM			125
+#define SC7280_SLAVE_IMEM			126
+#define SC7280_SLAVE_PIMEM			127
+#define SC7280_SLAVE_SERVICE_NSP_NOC			128
+#define SC7280_SLAVE_SERVICE_A1NOC			129
+#define SC7280_SLAVE_SERVICE_A2NOC			130
+#define SC7280_SLAVE_SERVICE_GEM_NOC_1			131
+#define SC7280_SLAVE_SERVICE_MNOC			132
+#define SC7280_SLAVE_SERVICES_LPASS_AML_NOC			133
+#define SC7280_SLAVE_SERVICE_LPASS_AG_NOC			134
+#define SC7280_SLAVE_SERVICE_GEM_NOC_2			135
+#define SC7280_SLAVE_SERVICE_SNOC			136
+#define SC7280_SLAVE_SERVICE_GEM_NOC			137
+#define SC7280_SLAVE_PCIE_0			138
+#define SC7280_SLAVE_PCIE_1			139
+#define SC7280_SLAVE_QDSS_STM			140
+#define SC7280_SLAVE_TCU			141
+
+#endif

include/dt-bindings/interconnect/qcom,sc7280.h

+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * Qualcomm SC7280 interconnect IDs
+ *
+ * Copyright (c) 2021, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_SC7280_H
+
+#define MASTER_QSPI_0			0
+#define MASTER_QUP_0			1
+#define MASTER_QUP_1			2
+#define MASTER_A1NOC_CFG			3
+#define MASTER_PCIE_0			4
+#define MASTER_PCIE_1			5
+#define MASTER_SDCC_1			6
+#define MASTER_SDCC_2			7
+#define MASTER_SDCC_4			8
+#define MASTER_UFS_MEM			9
+#define MASTER_USB2			10
+#define MASTER_USB3_0			11
+#define SLAVE_A1NOC_SNOC			12
+#define SLAVE_ANOC_PCIE_GEM_NOC			13
+#define SLAVE_SERVICE_A1NOC			14
+
+#define MASTER_QDSS_BAM			0
+#define MASTER_A2NOC_CFG			1
+#define MASTER_CNOC_A2NOC			2
+#define MASTER_CRYPTO			3
+#define MASTER_IPA			4
+#define MASTER_QDSS_ETR			5
+#define SLAVE_A2NOC_SNOC			6
+#define SLAVE_SERVICE_A2NOC			7
+
+#define MASTER_QUP_CORE_0			0
+#define MASTER_QUP_CORE_1		1
+#define SLAVE_QUP_CORE_0			2
+#define SLAVE_QUP_CORE_1			3
+
+#define MASTER_CNOC3_CNOC2			0
+#define MASTER_QDSS_DAP			1
+#define SLAVE_AHB2PHY_SOUTH			2
+#define SLAVE_AHB2PHY_NORTH			3
+#define SLAVE_CAMERA_CFG			4
+#define SLAVE_CLK_CTL			5
+#define SLAVE_CDSP_CFG			6
+#define SLAVE_RBCPR_CX_CFG			7
+#define SLAVE_RBCPR_MX_CFG			8
+#define SLAVE_CRYPTO_0_CFG			9
+#define SLAVE_CX_RDPM			10
+#define SLAVE_DCC_CFG			11
+#define SLAVE_DISPLAY_CFG			12
+#define SLAVE_GFX3D_CFG			13
+#define SLAVE_HWKM			14
+#define SLAVE_IMEM_CFG			15
+#define SLAVE_IPA_CFG			16
+#define SLAVE_IPC_ROUTER_CFG			17
+#define SLAVE_LPASS			18
+#define SLAVE_CNOC_MSS			19
+#define SLAVE_MX_RDPM			20
+#define SLAVE_PCIE_0_CFG			21
+#define SLAVE_PCIE_1_CFG			22
+#define SLAVE_PDM			23
+#define SLAVE_PIMEM_CFG			24
+#define SLAVE_PKA_WRAPPER_CFG			25
+#define SLAVE_PMU_WRAPPER_CFG			26
+#define SLAVE_QDSS_CFG			27
+#define SLAVE_QSPI_0			28
+#define SLAVE_QUP_0			29
+#define SLAVE_QUP_1			30
+#define SLAVE_SDCC_1			31
+#define SLAVE_SDCC_2			32
+#define SLAVE_SDCC_4			33
+#define SLAVE_SECURITY			34
+#define SLAVE_TCSR			35
+#define SLAVE_TLMM			36
+#define SLAVE_UFS_MEM_CFG			37
+#define SLAVE_USB2			38
+#define SLAVE_USB3_0			39
+#define SLAVE_VENUS_CFG			40
+#define SLAVE_VSENSE_CTRL_CFG			41
+#define SLAVE_A1NOC_CFG			42
+#define SLAVE_A2NOC_CFG			43
+#define SLAVE_CNOC2_CNOC3			44
+#define SLAVE_CNOC_MNOC_CFG			45
+#define SLAVE_SNOC_CFG			46
+
+#define MASTER_CNOC2_CNOC3			0
+#define MASTER_GEM_NOC_CNOC			1
+#define MASTER_GEM_NOC_PCIE_SNOC			2
+#define SLAVE_AOSS			3
+#define SLAVE_APPSS			4
+#define SLAVE_CNOC3_CNOC2			5
+#define SLAVE_CNOC_A2NOC			6
+#define SLAVE_DDRSS_CFG			7
+#define SLAVE_BOOT_IMEM			8
+#define SLAVE_IMEM			9
+#define SLAVE_PIMEM			10
+#define SLAVE_PCIE_0			11
+#define SLAVE_PCIE_1			12
+#define SLAVE_QDSS_STM			13
+#define SLAVE_TCU			14
+
+#define MASTER_CNOC_DC_NOC			0
+#define SLAVE_LLCC_CFG			1
+#define SLAVE_GEM_NOC_CFG			2
+
+#define MASTER_GPU_TCU			0
+#define MASTER_SYS_TCU			1
+#define MASTER_APPSS_PROC			2
+#define MASTER_COMPUTE_NOC			3
+#define MASTER_GEM_NOC_CFG			4
+#define MASTER_GFX3D			5
+#define MASTER_MNOC_HF_MEM_NOC			6
+#define MASTER_MNOC_SF_MEM_NOC			7
+#define MASTER_ANOC_PCIE_GEM_NOC			8
+#define MASTER_SNOC_GC_MEM_NOC			9
+#define MASTER_SNOC_SF_MEM_NOC			10
+#define SLAVE_MSS_PROC_MS_MPU_CFG			11
+#define SLAVE_MCDMA_MS_MPU_CFG			12
+#define SLAVE_GEM_NOC_CNOC			13
+#define SLAVE_LLCC			14
+#define SLAVE_MEM_NOC_PCIE_SNOC			15
+#define SLAVE_SERVICE_GEM_NOC_1			16
+#define SLAVE_SERVICE_GEM_NOC_2			17
+#define SLAVE_SERVICE_GEM_NOC			18
+
+#define MASTER_CNOC_LPASS_AG_NOC			0
+#define SLAVE_LPASS_CORE_CFG			1
+#define SLAVE_LPASS_LPI_CFG			2
+#define SLAVE_LPASS_MPU_CFG			3
+#define SLAVE_LPASS_TOP_CFG			4
+#define SLAVE_SERVICES_LPASS_AML_NOC			5
+#define SLAVE_SERVICE_LPASS_AG_NOC			6
+
+#define MASTER_LLCC			0
+#define SLAVE_EBI1			1
+
+#define MASTER_CNOC_MNOC_CFG			0
+#define MASTER_VIDEO_P0			1
+#define MASTER_VIDEO_PROC			2
+#define MASTER_CAMNOC_HF			3
+#define MASTER_CAMNOC_ICP			4
+#define MASTER_CAMNOC_SF			5
+#define MASTER_MDP0			6
+#define SLAVE_MNOC_HF_MEM_NOC			7
+#define SLAVE_MNOC_SF_MEM_NOC			8
+#define SLAVE_SERVICE_MNOC			9
+
+#define MASTER_CDSP_NOC_CFG			0
+#define MASTER_CDSP_PROC			1
+#define SLAVE_CDSP_MEM_NOC			2
+#define SLAVE_SERVICE_NSP_NOC			3
+
+#define MASTER_A1NOC_SNOC			0
+#define MASTER_A2NOC_SNOC			1
+#define MASTER_SNOC_CFG			2
+#define MASTER_PIMEM			3
+#define MASTER_GIC			4
+#define SLAVE_SNOC_GEM_NOC_GC			5
+#define SLAVE_SNOC_GEM_NOC_SF			6
+#define SLAVE_SERVICE_SNOC			7
+
+#endif