Commit f296a0bc authored by Prike Liang's avatar Prike Liang Committed by Alex Deucher

drm/amd/pm: skip setting gfx cgpg in the s0ix suspend-resume

In the s0ix entry need retain gfx in the gfxoff state,so here need't
set gfx cgpg in the S0ix suspend-resume process. Moreover move the S0ix
check into SMU12 can simplify the code condition check.
Signed-off-by: default avatarPrike Liang <Prike.Liang@amd.com>
Reviewed-by: default avatarEvan Quan <evan.quan@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9f952378
......@@ -1569,9 +1569,7 @@ static int smu_suspend(void *handle)
smu->watermarks_bitmap &= ~(WATERMARKS_LOADED);
/* skip CGPG when in S0ix */
if (smu->is_apu && !adev->in_s0ix)
smu_set_gfx_cgpg(&adev->smu, false);
smu_set_gfx_cgpg(&adev->smu, false);
return 0;
}
......@@ -1602,8 +1600,7 @@ static int smu_resume(void *handle)
return ret;
}
if (smu->is_apu)
smu_set_gfx_cgpg(&adev->smu, true);
smu_set_gfx_cgpg(&adev->smu, true);
smu->disable_uclk_switch = 0;
......
......@@ -120,7 +120,8 @@ int smu_v12_0_powergate_sdma(struct smu_context *smu, bool gate)
int smu_v12_0_set_gfx_cgpg(struct smu_context *smu, bool enable)
{
if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG))
/* Until now the SMU12 only implemented for Renoir series so here neen't do APU check. */
if (!(smu->adev->pg_flags & AMD_PG_SUPPORT_GFX_PG) || smu->adev->in_s0ix)
return 0;
return smu_cmn_send_smc_msg_with_param(smu,
......
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