Commit f3ae1616 authored by Alex Elder's avatar Alex Elder Committed by Jakub Kicinski

net: ipa: fix two inconsistent IPA register names

Rename two suspend IRQ registers so they follow the IPA_REG_IRQ_xxx
naming convention used elsewhere.
Signed-off-by: default avatarAlex Elder <elder@linaro.org>
Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 6833a096
...@@ -139,12 +139,12 @@ static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt, ...@@ -139,12 +139,12 @@ static void ipa_interrupt_suspend_control(struct ipa_interrupt *interrupt,
u32 val; u32 val;
/* assert(mask & ipa->available); */ /* assert(mask & ipa->available); */
val = ioread32(ipa->reg_virt + IPA_REG_SUSPEND_IRQ_EN_OFFSET); val = ioread32(ipa->reg_virt + IPA_REG_IRQ_SUSPEND_EN_OFFSET);
if (enable) if (enable)
val |= mask; val |= mask;
else else
val &= ~mask; val &= ~mask;
iowrite32(val, ipa->reg_virt + IPA_REG_SUSPEND_IRQ_EN_OFFSET); iowrite32(val, ipa->reg_virt + IPA_REG_IRQ_SUSPEND_EN_OFFSET);
} }
/* Enable TX_SUSPEND for an endpoint */ /* Enable TX_SUSPEND for an endpoint */
...@@ -168,7 +168,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt) ...@@ -168,7 +168,7 @@ void ipa_interrupt_suspend_clear_all(struct ipa_interrupt *interrupt)
u32 val; u32 val;
val = ioread32(ipa->reg_virt + IPA_REG_IRQ_SUSPEND_INFO_OFFSET); val = ioread32(ipa->reg_virt + IPA_REG_IRQ_SUSPEND_INFO_OFFSET);
iowrite32(val, ipa->reg_virt + IPA_REG_SUSPEND_IRQ_CLR_OFFSET); iowrite32(val, ipa->reg_virt + IPA_REG_IRQ_SUSPEND_CLR_OFFSET);
} }
/* Simulate arrival of an IPA TX_SUSPEND interrupt */ /* Simulate arrival of an IPA TX_SUSPEND interrupt */
......
...@@ -454,17 +454,17 @@ static inline u32 rsrc_grp_encoded(enum ipa_version version, u32 rsrc_grp) ...@@ -454,17 +454,17 @@ static inline u32 rsrc_grp_encoded(enum ipa_version version, u32 rsrc_grp)
(0x00003030 + 0x1000 * (ee)) (0x00003030 + 0x1000 * (ee))
/* ipa->available defines the valid bits in the SUSPEND_INFO register */ /* ipa->available defines the valid bits in the SUSPEND_INFO register */
#define IPA_REG_SUSPEND_IRQ_EN_OFFSET \ #define IPA_REG_IRQ_SUSPEND_EN_OFFSET \
IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(GSI_EE_AP) IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(GSI_EE_AP)
#define IPA_REG_SUSPEND_IRQ_EN_EE_N_OFFSET(ee) \ #define IPA_REG_IRQ_SUSPEND_EN_EE_N_OFFSET(ee) \
(0x00003034 + 0x1000 * (ee)) (0x00003034 + 0x1000 * (ee))
/* ipa->available defines the valid bits in the SUSPEND_IRQ_EN register */ /* ipa->available defines the valid bits in the IRQ_SUSPEND_EN register */
#define IPA_REG_SUSPEND_IRQ_CLR_OFFSET \ #define IPA_REG_IRQ_SUSPEND_CLR_OFFSET \
IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(GSI_EE_AP) IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(GSI_EE_AP)
#define IPA_REG_SUSPEND_IRQ_CLR_EE_N_OFFSET(ee) \ #define IPA_REG_IRQ_SUSPEND_CLR_EE_N_OFFSET(ee) \
(0x00003038 + 0x1000 * (ee)) (0x00003038 + 0x1000 * (ee))
/* ipa->available defines the valid bits in the SUSPEND_IRQ_CLR register */ /* ipa->available defines the valid bits in the IRQ_SUSPEND_CLR register */
/** enum ipa_cs_offload_en - checksum offload field in ENDP_INIT_CFG_N */ /** enum ipa_cs_offload_en - checksum offload field in ENDP_INIT_CFG_N */
enum ipa_cs_offload_en { enum ipa_cs_offload_en {
......
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