Commit f4bffb28 authored by Nithin Sujir's avatar Nithin Sujir Committed by David S. Miller

tg3: Refactor the 2nd type of cpu pause

For completeness and consistency, add common function
tg3_pause_cpu_and_set_pc(). This is only for existing fw and not used for the
57766.
Reviewed-by: default avatarBenjamin Li <benli@broadcom.com>
Signed-off-by: default avatarNithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 837c45bb
...@@ -3588,12 +3588,33 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base, ...@@ -3588,12 +3588,33 @@ static int tg3_load_firmware_cpu(struct tg3 *tp, u32 cpu_base,
return err; return err;
} }
/* tp->lock is held. */
static int tg3_pause_cpu_and_set_pc(struct tg3 *tp, u32 cpu_base, u32 pc)
{
int i;
const int iters = 5;
tw32(cpu_base + CPU_STATE, 0xffffffff);
tw32_f(cpu_base + CPU_PC, pc);
for (i = 0; i < iters; i++) {
if (tr32(cpu_base + CPU_PC) == pc)
break;
tw32(cpu_base + CPU_STATE, 0xffffffff);
tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
tw32_f(cpu_base + CPU_PC, pc);
udelay(1000);
}
return (i == iters) ? -EBUSY : 0;
}
/* tp->lock is held. */ /* tp->lock is held. */
static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp) static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
{ {
struct fw_info info; struct fw_info info;
const __be32 *fw_data; const __be32 *fw_data;
int err, i; int err;
fw_data = (void *)tp->fw->data; fw_data = (void *)tp->fw->data;
...@@ -3620,18 +3641,8 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp) ...@@ -3620,18 +3641,8 @@ static int tg3_load_5701_a0_firmware_fix(struct tg3 *tp)
return err; return err;
/* Now startup only the RX cpu. */ /* Now startup only the RX cpu. */
tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff); err = tg3_pause_cpu_and_set_pc(tp, RX_CPU_BASE, info.fw_base);
tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base); if (err) {
for (i = 0; i < 5; i++) {
if (tr32(RX_CPU_BASE + CPU_PC) == info.fw_base)
break;
tw32(RX_CPU_BASE + CPU_STATE, 0xffffffff);
tw32(RX_CPU_BASE + CPU_MODE, CPU_MODE_HALT);
tw32_f(RX_CPU_BASE + CPU_PC, info.fw_base);
udelay(1000);
}
if (i >= 5) {
netdev_err(tp->dev, "%s fails to set RX CPU PC, is %08x " netdev_err(tp->dev, "%s fails to set RX CPU PC, is %08x "
"should be %08x\n", __func__, "should be %08x\n", __func__,
tr32(RX_CPU_BASE + CPU_PC), info.fw_base); tr32(RX_CPU_BASE + CPU_PC), info.fw_base);
...@@ -3649,7 +3660,7 @@ static int tg3_load_tso_firmware(struct tg3 *tp) ...@@ -3649,7 +3660,7 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
struct fw_info info; struct fw_info info;
const __be32 *fw_data; const __be32 *fw_data;
unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size; unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size;
int err, i; int err;
if (!tg3_flag(tp, FW_TSO)) if (!tg3_flag(tp, FW_TSO))
return 0; return 0;
...@@ -3683,18 +3694,8 @@ static int tg3_load_tso_firmware(struct tg3 *tp) ...@@ -3683,18 +3694,8 @@ static int tg3_load_tso_firmware(struct tg3 *tp)
return err; return err;
/* Now startup the cpu. */ /* Now startup the cpu. */
tw32(cpu_base + CPU_STATE, 0xffffffff); err = tg3_pause_cpu_and_set_pc(tp, cpu_base, info.fw_base);
tw32_f(cpu_base + CPU_PC, info.fw_base); if (err) {
for (i = 0; i < 5; i++) {
if (tr32(cpu_base + CPU_PC) == info.fw_base)
break;
tw32(cpu_base + CPU_STATE, 0xffffffff);
tw32(cpu_base + CPU_MODE, CPU_MODE_HALT);
tw32_f(cpu_base + CPU_PC, info.fw_base);
udelay(1000);
}
if (i >= 5) {
netdev_err(tp->dev, netdev_err(tp->dev,
"%s fails to set CPU PC, is %08x should be %08x\n", "%s fails to set CPU PC, is %08x should be %08x\n",
__func__, tr32(cpu_base + CPU_PC), info.fw_base); __func__, tr32(cpu_base + CPU_PC), info.fw_base);
......
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