Commit f538a82c authored by Linus Torvalds's avatar Linus Torvalds

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
 "We had a small batch of fixes before -rc1, but here is a larger one.
  It contains a backmerge of 4.12-rc1 since some of the downstream
  branches we merge had that as base; at the same time we already had
  merged contents before -rc1 and rebase wasn't the right solution.

  A mix of random smaller fixes and a few things worth pointing out:

   - We've started telling people to avoid cross-tree shared branches if
     all they're doing is picking up one or two DT-used constants from a
     shared include file, and instead to use the numeric values on first
     submission. Follow-up moving over to symbolic names are sent in
     right after -rc1, i.e. here. It's only a few minor patches of this
     type.

   - Linus Walleij and others are resurrecting the 'Gemini' platform,
     and wanted a cut-down platform-specific defconfig for it. So I
     picked that up for them.

   - Rob Herring ran 'savedefconfig' on arm64, it's a bit churny but it
     helps people to prepare patches since it's a pain when defconfig
     and current savedefconfig contents differs too much.

   - Devicetree additions for some pinctrl drivers for Armada that were
     merged this window. I'd have preferred to see those earlier but
     it's not a huge deail.

  The biggest change worth pointing out though since it's touching other
  parts of the tree: We added prefixes to be used when cross-including
  DT contents between arm64 and arm, allowing someone to #include
  <arm/foo.dtsi> from arm64, and likewise. As part of that, we needed
  arm/foo.dtsi to work on arm as well. The way I suggested this to Heiko
  resulted in a recursive symlink.

  Instead, I've now moved it out of arch/*/boot/dts/include, into a
  shared location under scripts/dtc. While I was at it, I consolidated
  so all architectures now behave the same way in this manner.

  Rob Herring (DT maintainer) has acked it. I cc:d most other arch
  maintainers but nobody seems to care much; it doesn't really affect
  them since functionality is unchanged for them by default"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
  arm64: dts: rockchip: fix include reference
  firmware: ti_sci: fix strncat length check
  ARM: remove duplicate 'const' annotations'
  arm64: defconfig: enable options needed for QCom DB410c board
  arm64: defconfig: sync with savedefconfig
  ARM: configs: add a gemini defconfig
  devicetree: Move include prefixes from arch to separate directory
  ARM: dts: dra7: Reduce cpu thermal shutdown temperature
  memory: omap-gpmc: Fix debug output for access width
  ARM: dts: LogicPD Torpedo: Fix camera pin mux
  ARM: dts: omap4: enable CEC pin for Pandaboard A4 and ES
  ARM: dts: gta04: fix polarity of clocks for mcbsp4
  ARM: dts: dra7: Add power hold and power controller properties to palmas
  soc: imx: add PM dependency for IMX7_PM_DOMAINS
  ARM: dts: imx6sx-sdb: Remove OPP override
  ARM: dts: imx53-qsrb: Pulldown PMIC IRQ pin
  soc: bcm: brcmstb: Correctly match 7435 SoC
  tee: add ARM_SMCCC dependency
  ARM: omap2+: make omap4_get_cpu1_ns_pa_addr declaration usable
  ARM64: dts: mediatek: configure some fixed mmc parameters
  ...
parents 2fe296a6 6bf1c2d2
/ { / {
aliases { aliases {
ethernet = &ethernet; ethernet0 = &ethernet;
}; };
}; };
......
/ { / {
aliases { aliases {
ethernet = &ethernet; ethernet0 = &ethernet;
}; };
}; };
......
...@@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 { ...@@ -198,8 +198,8 @@ i2c0_gpio0: i2c0_gpio0 {
brcm,pins = <0 1>; brcm,pins = <0 1>;
brcm,function = <BCM2835_FSEL_ALT0>; brcm,function = <BCM2835_FSEL_ALT0>;
}; };
i2c0_gpio32: i2c0_gpio32 { i2c0_gpio28: i2c0_gpio28 {
brcm,pins = <32 34>; brcm,pins = <28 29>;
brcm,function = <BCM2835_FSEL_ALT0>; brcm,function = <BCM2835_FSEL_ALT0>;
}; };
i2c0_gpio44: i2c0_gpio44 { i2c0_gpio44: i2c0_gpio44 {
...@@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 { ...@@ -295,20 +295,28 @@ uart0_gpio14: uart0_gpio14 {
/* Separate from the uart0_gpio14 group /* Separate from the uart0_gpio14 group
* because it conflicts with spi1_gpio16, and * because it conflicts with spi1_gpio16, and
* people often run uart0 on the two pins * people often run uart0 on the two pins
* without flow contrl. * without flow control.
*/ */
uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 { uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
brcm,pins = <16 17>; brcm,pins = <16 17>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_gpio30: uart0_gpio30 { uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
brcm,pins = <30 31>; brcm,pins = <30 31>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 { uart0_gpio32: uart0_gpio32 {
brcm,pins = <32 33>; brcm,pins = <32 33>;
brcm,function = <BCM2835_FSEL_ALT3>; brcm,function = <BCM2835_FSEL_ALT3>;
}; };
uart0_gpio36: uart0_gpio36 {
brcm,pins = <36 37>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart0_ctsrts_gpio38: uart0_ctsrts_gpio38 {
brcm,pins = <38 39>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart1_gpio14: uart1_gpio14 { uart1_gpio14: uart1_gpio14 {
brcm,pins = <14 15>; brcm,pins = <14 15>;
...@@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 { ...@@ -326,10 +334,6 @@ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
brcm,pins = <30 31>; brcm,pins = <30 31>;
brcm,function = <BCM2835_FSEL_ALT5>; brcm,function = <BCM2835_FSEL_ALT5>;
}; };
uart1_gpio36: uart1_gpio36 {
brcm,pins = <36 37 38 39>;
brcm,function = <BCM2835_FSEL_ALT2>;
};
uart1_gpio40: uart1_gpio40 { uart1_gpio40: uart1_gpio40 {
brcm,pins = <40 41>; brcm,pins = <40 41>;
brcm,function = <BCM2835_FSEL_ALT5>; brcm,function = <BCM2835_FSEL_ALT5>;
......
...@@ -204,6 +204,8 @@ &i2c1 { ...@@ -204,6 +204,8 @@ &i2c1 {
tps659038: tps659038@58 { tps659038: tps659038@58 {
compatible = "ti,tps659038"; compatible = "ti,tps659038";
reg = <0x58>; reg = <0x58>;
ti,palmas-override-powerhold;
ti,system-power-controller;
tps659038_pmic { tps659038_pmic {
compatible = "ti,tps659038-pmic"; compatible = "ti,tps659038-pmic";
......
...@@ -2017,4 +2017,8 @@ &iva_thermal { ...@@ -2017,4 +2017,8 @@ &iva_thermal {
coefficients = <0 2000>; coefficients = <0 2000>;
}; };
&cpu_crit {
temperature = <120000>; /* milli Celsius */
};
/include/ "dra7xx-clocks.dtsi" /include/ "dra7xx-clocks.dtsi"
...@@ -23,7 +23,7 @@ &iomuxc { ...@@ -23,7 +23,7 @@ &iomuxc {
imx53-qsrb { imx53-qsrb {
pinctrl_pmic: pmicgrp { pinctrl_pmic: pmicgrp {
fsl,pins = < fsl,pins = <
MX53_PAD_CSI0_DAT5__GPIO5_23 0x1e4 /* IRQ */ MX53_PAD_CSI0_DAT5__GPIO5_23 0x1c4 /* IRQ */
>; >;
}; };
}; };
......
...@@ -12,23 +12,6 @@ / { ...@@ -12,23 +12,6 @@ / {
model = "Freescale i.MX6 SoloX SDB RevB Board"; model = "Freescale i.MX6 SoloX SDB RevB Board";
}; };
&cpu0 {
operating-points = <
/* kHz uV */
996000 1250000
792000 1175000
396000 1175000
198000 1175000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC uV */
996000 1250000
792000 1175000
396000 1175000
198000 1175000
>;
};
&i2c1 { &i2c1 {
clock-frequency = <100000>; clock-frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";
......
..
\ No newline at end of file
../../../../arm64/boot/dts
\ No newline at end of file
../../../../../include/dt-bindings
\ No newline at end of file
...@@ -249,9 +249,9 @@ OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */ ...@@ -249,9 +249,9 @@ OMAP3_CORE1_IOPAD(0x210e, PIN_INPUT | MUX_MODE0) /* cam_vs.cam_vs */
OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */ OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */
OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */ OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */
OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */ OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */
OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */ OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */
OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */ OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */
OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */ OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */
OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */ OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */
OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */ OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */
......
...@@ -72,6 +72,8 @@ timer { ...@@ -72,6 +72,8 @@ timer {
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>, <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
clock-frequency = <13000000>;
arm,cpu-registers-not-fw-configured;
}; };
watchdog: watchdog@10007000 { watchdog: watchdog@10007000 {
......
...@@ -55,7 +55,8 @@ sound_telephony { ...@@ -55,7 +55,8 @@ sound_telephony {
simple-audio-card,bitclock-master = <&telephony_link_master>; simple-audio-card,bitclock-master = <&telephony_link_master>;
simple-audio-card,frame-master = <&telephony_link_master>; simple-audio-card,frame-master = <&telephony_link_master>;
simple-audio-card,format = "i2s"; simple-audio-card,format = "i2s";
simple-audio-card,bitclock-inversion;
simple-audio-card,frame-inversion;
simple-audio-card,cpu { simple-audio-card,cpu {
sound-dai = <&mcbsp4>; sound-dai = <&mcbsp4>;
}; };
......
...@@ -13,7 +13,7 @@ ...@@ -13,7 +13,7 @@
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */ /* Pandaboard Rev A4+ have external pullups on SCL & SDA */
&dss_hdmi_pins { &dss_hdmi_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
>; >;
......
...@@ -34,7 +34,7 @@ &sound { ...@@ -34,7 +34,7 @@ &sound {
/* PandaboardES has external pullups on SCL & SDA */ /* PandaboardES has external pullups on SCL & SDA */
&dss_hdmi_pins { &dss_hdmi_pins {
pinctrl-single,pins = < pinctrl-single,pins = <
OMAP4_IOPAD(0x09a, PIN_INPUT_PULLUP | MUX_MODE0) /* hdmi_cec.hdmi_cec */ OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */ OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
>; >;
......
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_SYSVIPC=y
CONFIG_NO_HZ_IDLE=y
CONFIG_BSD_PROCESS_ACCT=y
CONFIG_USER_NS=y
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_PARTITION_ADVANCED=y
CONFIG_ARCH_MULTI_V4=y
# CONFIG_ARCH_MULTI_V7 is not set
CONFIG_ARCH_GEMINI=y
CONFIG_PCI=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_CMDLINE="console=ttyS0,115200n8"
CONFIG_KEXEC=y
CONFIG_BINFMT_MISC=y
CONFIG_PM=y
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_MTD=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_STAA=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_PHYSMAP_OF=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=16384
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=y
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_INPUT_MOUSE is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_GEMINI_WATCHDOG=y
CONFIG_USB=y
CONFIG_USB_MON=y
CONFIG_USB_FOTG210_HCD=y
CONFIG_USB_STORAGE=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GEMINI=y
CONFIG_DMADEVICES=y
# CONFIG_DNOTIFY is not set
CONFIG_TMPFS=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_ROMFS_FS=y
CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_DEBUG_FS=y
...@@ -335,7 +335,7 @@ static const struct ramc_info ramc_infos[] __initconst = { ...@@ -335,7 +335,7 @@ static const struct ramc_info ramc_infos[] __initconst = {
{ .idle = sama5d3_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR}, { .idle = sama5d3_ddr_standby, .memctrl = AT91_MEMCTRL_DDRSDR},
}; };
static const struct of_device_id const ramc_ids[] __initconst = { static const struct of_device_id ramc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] }, { .compatible = "atmel,at91rm9200-sdramc", .data = &ramc_infos[0] },
{ .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] }, { .compatible = "atmel,at91sam9260-sdramc", .data = &ramc_infos[1] },
{ .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] }, { .compatible = "atmel,at91sam9g45-ddramc", .data = &ramc_infos[2] },
......
...@@ -33,7 +33,7 @@ struct bcm_kona_smc_data { ...@@ -33,7 +33,7 @@ struct bcm_kona_smc_data {
unsigned result; unsigned result;
}; };
static const struct of_device_id const bcm_kona_smc_ids[] __initconst = { static const struct of_device_id bcm_kona_smc_ids[] __initconst = {
{.compatible = "brcm,kona-smc"}, {.compatible = "brcm,kona-smc"},
{.compatible = "bcm,kona-smc"}, /* deprecated name */ {.compatible = "bcm,kona-smc"}, /* deprecated name */
{}, {},
......
...@@ -346,7 +346,7 @@ static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = { ...@@ -346,7 +346,7 @@ static struct usb_ohci_pdata cns3xxx_usb_ohci_pdata = {
.power_off = csn3xxx_usb_power_off, .power_off = csn3xxx_usb_power_off,
}; };
static const struct of_dev_auxdata const cns3xxx_auxdata[] __initconst = { static const struct of_dev_auxdata cns3xxx_auxdata[] __initconst = {
{ "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata }, { "intel,usb-ehci", CNS3XXX_USB_BASE, "ehci-platform", &cns3xxx_usb_ehci_pdata },
{ "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata }, { "intel,usb-ohci", CNS3XXX_USB_OHCI_BASE, "ohci-platform", &cns3xxx_usb_ohci_pdata },
{ "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL }, { "cavium,cns3420-ahci", CNS3XXX_SATA2_BASE, "ahci", NULL },
......
...@@ -266,11 +266,12 @@ extern int omap4_cpu_kill(unsigned int cpu); ...@@ -266,11 +266,12 @@ extern int omap4_cpu_kill(unsigned int cpu);
extern const struct smp_operations omap4_smp_ops; extern const struct smp_operations omap4_smp_ops;
#endif #endif
extern u32 omap4_get_cpu1_ns_pa_addr(void);
#if defined(CONFIG_SMP) && defined(CONFIG_PM) #if defined(CONFIG_SMP) && defined(CONFIG_PM)
extern int omap4_mpuss_init(void); extern int omap4_mpuss_init(void);
extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state); extern int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state);
extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state); extern int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state);
extern u32 omap4_get_cpu1_ns_pa_addr(void);
#else #else
static inline int omap4_enter_lowpower(unsigned int cpu, static inline int omap4_enter_lowpower(unsigned int cpu,
unsigned int power_state) unsigned int power_state)
......
...@@ -213,11 +213,6 @@ static void __init save_l2x0_context(void) ...@@ -213,11 +213,6 @@ static void __init save_l2x0_context(void)
{} {}
#endif #endif
u32 omap4_get_cpu1_ns_pa_addr(void)
{
return old_cpu1_ns_pa_addr;
}
/** /**
* omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function * omap4_enter_lowpower: OMAP4 MPUSS Low Power Entry Function
* The purpose of this function is to manage low power programming * The purpose of this function is to manage low power programming
...@@ -457,6 +452,11 @@ int __init omap4_mpuss_init(void) ...@@ -457,6 +452,11 @@ int __init omap4_mpuss_init(void)
#endif #endif
u32 omap4_get_cpu1_ns_pa_addr(void)
{
return old_cpu1_ns_pa_addr;
}
/* /*
* For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to * For kexec, we must set CPU1_WAKEUP_NS_PA_ADDR to point to
* current kernel's secondary_startup() early before * current kernel's secondary_startup() early before
......
...@@ -306,7 +306,6 @@ static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c) ...@@ -306,7 +306,6 @@ static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c)
cpu1_startup_pa = readl_relaxed(cfg.wakeupgen_base + cpu1_startup_pa = readl_relaxed(cfg.wakeupgen_base +
OMAP_AUX_CORE_BOOT_1); OMAP_AUX_CORE_BOOT_1);
cpu1_ns_pa_addr = omap4_get_cpu1_ns_pa_addr();
/* Did the configured secondary_startup() get overwritten? */ /* Did the configured secondary_startup() get overwritten? */
if (!omap4_smp_cpu1_startup_valid(cpu1_startup_pa)) if (!omap4_smp_cpu1_startup_valid(cpu1_startup_pa))
...@@ -316,9 +315,13 @@ static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c) ...@@ -316,9 +315,13 @@ static void __init omap4_smp_maybe_reset_cpu1(struct omap_smp_config *c)
* If omap4 or 5 has NS_PA_ADDR configured, CPU1 may be in a * If omap4 or 5 has NS_PA_ADDR configured, CPU1 may be in a
* deeper idle state in WFI and will wake to an invalid address. * deeper idle state in WFI and will wake to an invalid address.
*/ */
if ((soc_is_omap44xx() || soc_is_omap54xx()) && if ((soc_is_omap44xx() || soc_is_omap54xx())) {
!omap4_smp_cpu1_startup_valid(cpu1_ns_pa_addr)) cpu1_ns_pa_addr = omap4_get_cpu1_ns_pa_addr();
needs_reset = true; if (!omap4_smp_cpu1_startup_valid(cpu1_ns_pa_addr))
needs_reset = true;
} else {
cpu1_ns_pa_addr = 0;
}
if (!needs_reset || !c->cpu1_rstctrl_va) if (!needs_reset || !c->cpu1_rstctrl_va)
return; return;
......
...@@ -711,7 +711,7 @@ static struct omap_prcm_init_data scrm_data __initdata = { ...@@ -711,7 +711,7 @@ static struct omap_prcm_init_data scrm_data __initdata = {
}; };
#endif #endif
static const struct of_device_id const omap_prcm_dt_match_table[] __initconst = { static const struct of_device_id omap_prcm_dt_match_table[] __initconst = {
#ifdef CONFIG_SOC_AM33XX #ifdef CONFIG_SOC_AM33XX
{ .compatible = "ti,am3-prcm", .data = &am3_prm_data }, { .compatible = "ti,am3-prcm", .data = &am3_prm_data },
#endif #endif
......
...@@ -559,7 +559,7 @@ struct i2c_init_data { ...@@ -559,7 +559,7 @@ struct i2c_init_data {
u8 hsscll_12; u8 hsscll_12;
}; };
static const struct i2c_init_data const omap4_i2c_timing_data[] __initconst = { static const struct i2c_init_data omap4_i2c_timing_data[] __initconst = {
{ {
.load = 50, .load = 50,
.loadbits = 0x3, .loadbits = 0x3,
......
...@@ -204,7 +204,7 @@ static void __init spear_clockevent_init(int irq) ...@@ -204,7 +204,7 @@ static void __init spear_clockevent_init(int irq)
setup_irq(irq, &spear_timer_irq); setup_irq(irq, &spear_timer_irq);
} }
static const struct of_device_id const timer_of_match[] __initconst = { static const struct of_device_id timer_of_match[] __initconst = {
{ .compatible = "st,spear-timer", }, { .compatible = "st,spear-timer", },
{ }, { },
}; };
......
...@@ -106,8 +106,13 @@ config ARCH_MVEBU ...@@ -106,8 +106,13 @@ config ARCH_MVEBU
select ARMADA_AP806_SYSCON select ARMADA_AP806_SYSCON
select ARMADA_CP110_SYSCON select ARMADA_CP110_SYSCON
select ARMADA_37XX_CLK select ARMADA_37XX_CLK
select GPIOLIB
select GPIOLIB_IRQCHIP
select MVEBU_ODMI select MVEBU_ODMI
select MVEBU_PIC select MVEBU_PIC
select OF_GPIO
select PINCTRL
select PINCTRL_ARMADA_37XX
help help
This enables support for Marvell EBU familly, including: This enables support for Marvell EBU familly, including:
- Armada 3700 SoC Family - Armada 3700 SoC Family
......
../../../../arm/boot/dts
\ No newline at end of file
..
\ No newline at end of file
../../../../../include/dt-bindings
\ No newline at end of file
...@@ -79,6 +79,8 @@ usb3_phy: usb3-phy { ...@@ -79,6 +79,8 @@ usb3_phy: usb3-phy {
}; };
&i2c0 { &i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay"; status = "okay";
gpio_exp: pca9555@22 { gpio_exp: pca9555@22 {
...@@ -113,6 +115,8 @@ &sata { ...@@ -113,6 +115,8 @@ &sata {
&spi0 { &spi0 {
status = "okay"; status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&spi_quad_pins>;
m25p80@0 { m25p80@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
...@@ -143,6 +147,8 @@ partition@210000 { ...@@ -143,6 +147,8 @@ partition@210000 {
/* Exported on the micro USB connector CON32 through an FTDI */ /* Exported on the micro USB connector CON32 through an FTDI */
&uart0 { &uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay"; status = "okay";
}; };
...@@ -184,6 +190,8 @@ phy1: ethernet-phy@1 { ...@@ -184,6 +190,8 @@ phy1: ethernet-phy@1 {
}; };
&eth0 { &eth0 {
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
phy = <&phy0>; phy = <&phy0>;
status = "okay"; status = "okay";
......
...@@ -161,16 +161,83 @@ tbg: tbg@13200 { ...@@ -161,16 +161,83 @@ tbg: tbg@13200 {
#clock-cells = <1>; #clock-cells = <1>;
}; };
gpio1: gpio@13800 { pinctrl_nb: pinctrl@13800 {
compatible = "marvell,mvebu-gpio-3700", compatible = "marvell,armada3710-nb-pinctrl",
"syscon", "simple-mfd"; "syscon", "simple-mfd";
reg = <0x13800 0x500>; reg = <0x13800 0x100>, <0x13C00 0x20>;
gpionb: gpio {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_nb 0 0 36>;
gpio-controller;
interrupts =
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
};
xtalclk: xtal-clk { xtalclk: xtal-clk {
compatible = "marvell,armada-3700-xtal-clock"; compatible = "marvell,armada-3700-xtal-clock";
clock-output-names = "xtal"; clock-output-names = "xtal";
#clock-cells = <0>; #clock-cells = <0>;
}; };
spi_quad_pins: spi-quad-pins {
groups = "spi_quad";
function = "spi";
};
i2c1_pins: i2c1-pins {
groups = "i2c1";
function = "i2c";
};
i2c2_pins: i2c2-pins {
groups = "i2c2";
function = "i2c";
};
uart1_pins: uart1-pins {
groups = "uart1";
function = "uart";
};
uart2_pins: uart2-pins {
groups = "uart2";
function = "uart";
};
};
pinctrl_sb: pinctrl@18800 {
compatible = "marvell,armada3710-sb-pinctrl",
"syscon", "simple-mfd";
reg = <0x18800 0x100>, <0x18C00 0x20>;
gpiosb: gpio {
#gpio-cells = <2>;
gpio-ranges = <&pinctrl_sb 0 0 29>;
gpio-controller;
interrupts =
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
};
rgmii_pins: mii-pins {
groups = "rgmii";
function = "mii";
};
}; };
eth0: ethernet@30000 { eth0: ethernet@30000 {
......
...@@ -134,6 +134,9 @@ &mmc0 { ...@@ -134,6 +134,9 @@ &mmc0 {
bus-width = <8>; bus-width = <8>;
max-frequency = <50000000>; max-frequency = <50000000>;
cap-mmc-highspeed; cap-mmc-highspeed;
mediatek,hs200-cmd-int-delay=<26>;
mediatek,hs400-cmd-int-delay=<14>;
mediatek,hs400-cmd-resp-sel-rising;
vmmc-supply = <&mt6397_vemc_3v3_reg>; vmmc-supply = <&mt6397_vemc_3v3_reg>;
vqmmc-supply = <&mt6397_vio18_reg>; vqmmc-supply = <&mt6397_vio18_reg>;
non-removable; non-removable;
......
...@@ -44,7 +44,7 @@ ...@@ -44,7 +44,7 @@
/dts-v1/; /dts-v1/;
#include "rk3399-gru.dtsi" #include "rk3399-gru.dtsi"
#include <include/dt-bindings/input/linux-event-codes.h> #include <dt-bindings/input/linux-event-codes.h>
/* /*
* Kevin-specific things * Kevin-specific things
......
...@@ -30,7 +30,6 @@ CONFIG_PROFILING=y ...@@ -30,7 +30,6 @@ CONFIG_PROFILING=y
CONFIG_JUMP_LABEL=y CONFIG_JUMP_LABEL=y
CONFIG_MODULES=y CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_DEADLINE is not set
CONFIG_ARCH_SUNXI=y CONFIG_ARCH_SUNXI=y
CONFIG_ARCH_ALPINE=y CONFIG_ARCH_ALPINE=y
...@@ -62,16 +61,15 @@ CONFIG_ARCH_XGENE=y ...@@ -62,16 +61,15 @@ CONFIG_ARCH_XGENE=y
CONFIG_ARCH_ZX=y CONFIG_ARCH_ZX=y
CONFIG_ARCH_ZYNQMP=y CONFIG_ARCH_ZYNQMP=y
CONFIG_PCI=y CONFIG_PCI=y
CONFIG_PCI_MSI=y
CONFIG_PCI_IOV=y CONFIG_PCI_IOV=y
CONFIG_PCI_AARDVARK=y
CONFIG_PCIE_RCAR=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_XGENE=y
CONFIG_PCI_LAYERSCAPE=y CONFIG_PCI_LAYERSCAPE=y
CONFIG_PCI_HISI=y CONFIG_PCI_HISI=y
CONFIG_PCIE_QCOM=y CONFIG_PCIE_QCOM=y
CONFIG_PCIE_ARMADA_8K=y CONFIG_PCIE_ARMADA_8K=y
CONFIG_PCI_AARDVARK=y
CONFIG_PCIE_RCAR=y
CONFIG_PCI_HOST_GENERIC=y
CONFIG_PCI_XGENE=y
CONFIG_ARM64_VA_BITS_48=y CONFIG_ARM64_VA_BITS_48=y
CONFIG_SCHED_MC=y CONFIG_SCHED_MC=y
CONFIG_NUMA=y CONFIG_NUMA=y
...@@ -80,12 +78,11 @@ CONFIG_KSM=y ...@@ -80,12 +78,11 @@ CONFIG_KSM=y
CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_CMA=y CONFIG_CMA=y
CONFIG_SECCOMP=y CONFIG_SECCOMP=y
CONFIG_XEN=y
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y CONFIG_CRASH_DUMP=y
CONFIG_XEN=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_COMPAT=y CONFIG_COMPAT=y
CONFIG_CPU_IDLE=y
CONFIG_HIBERNATION=y CONFIG_HIBERNATION=y
CONFIG_ARM_CPUIDLE=y CONFIG_ARM_CPUIDLE=y
CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ=y
...@@ -155,8 +152,8 @@ CONFIG_MTD_SPI_NOR=y ...@@ -155,8 +152,8 @@ CONFIG_MTD_SPI_NOR=y
CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_NBD=m CONFIG_BLK_DEV_NBD=m
CONFIG_VIRTIO_BLK=y CONFIG_VIRTIO_BLK=y
CONFIG_EEPROM_AT25=m
CONFIG_SRAM=y CONFIG_SRAM=y
CONFIG_EEPROM_AT25=m
# CONFIG_SCSI_PROC_FS is not set # CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_SAS_ATA=y CONFIG_SCSI_SAS_ATA=y
...@@ -168,8 +165,8 @@ CONFIG_AHCI_CEVA=y ...@@ -168,8 +165,8 @@ CONFIG_AHCI_CEVA=y
CONFIG_AHCI_MVEBU=y CONFIG_AHCI_MVEBU=y
CONFIG_AHCI_XGENE=y CONFIG_AHCI_XGENE=y
CONFIG_AHCI_QORIQ=y CONFIG_AHCI_QORIQ=y
CONFIG_SATA_RCAR=y
CONFIG_SATA_SIL24=y CONFIG_SATA_SIL24=y
CONFIG_SATA_RCAR=y
CONFIG_PATA_PLATFORM=y CONFIG_PATA_PLATFORM=y
CONFIG_PATA_OF_PLATFORM=y CONFIG_PATA_OF_PLATFORM=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
...@@ -186,18 +183,17 @@ CONFIG_HNS_ENET=y ...@@ -186,18 +183,17 @@ CONFIG_HNS_ENET=y
CONFIG_E1000E=y CONFIG_E1000E=y
CONFIG_IGB=y CONFIG_IGB=y
CONFIG_IGBVF=y CONFIG_IGBVF=y
CONFIG_MVPP2=y
CONFIG_MVNETA=y CONFIG_MVNETA=y
CONFIG_MVPP2=y
CONFIG_SKY2=y CONFIG_SKY2=y
CONFIG_RAVB=y CONFIG_RAVB=y
CONFIG_SMC91X=y CONFIG_SMC91X=y
CONFIG_SMSC911X=y CONFIG_SMSC911X=y
CONFIG_STMMAC_ETH=m CONFIG_STMMAC_ETH=m
CONFIG_REALTEK_PHY=m CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_MESON_GXL_PHY=m CONFIG_MESON_GXL_PHY=m
CONFIG_MICREL_PHY=y CONFIG_MICREL_PHY=y
CONFIG_MDIO_BUS_MUX=y CONFIG_REALTEK_PHY=m
CONFIG_MDIO_BUS_MUX_MMIOREG=y
CONFIG_USB_PEGASUS=m CONFIG_USB_PEGASUS=m
CONFIG_USB_RTL8150=m CONFIG_USB_RTL8150=m
CONFIG_USB_RTL8152=m CONFIG_USB_RTL8152=m
...@@ -230,14 +226,14 @@ CONFIG_SERIAL_8250_UNIPHIER=y ...@@ -230,14 +226,14 @@ CONFIG_SERIAL_8250_UNIPHIER=y
CONFIG_SERIAL_OF_PLATFORM=y CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_AMBA_PL011=y CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MESON=y
CONFIG_SERIAL_MESON_CONSOLE=y
CONFIG_SERIAL_SAMSUNG=y CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_SERIAL_TEGRA=y CONFIG_SERIAL_TEGRA=y
CONFIG_SERIAL_SH_SCI=y CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=11 CONFIG_SERIAL_SH_SCI_NR_UARTS=11
CONFIG_SERIAL_SH_SCI_CONSOLE=y CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_MESON=y
CONFIG_SERIAL_MESON_CONSOLE=y
CONFIG_SERIAL_MSM=y CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SERIAL_XILINX_PS_UART=y CONFIG_SERIAL_XILINX_PS_UART=y
...@@ -261,14 +257,14 @@ CONFIG_I2C_UNIPHIER_F=y ...@@ -261,14 +257,14 @@ CONFIG_I2C_UNIPHIER_F=y
CONFIG_I2C_RCAR=y CONFIG_I2C_RCAR=y
CONFIG_I2C_CROS_EC_TUNNEL=y CONFIG_I2C_CROS_EC_TUNNEL=y
CONFIG_SPI=y CONFIG_SPI=y
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_BCM2835=m CONFIG_SPI_BCM2835=m
CONFIG_SPI_BCM2835AUX=m CONFIG_SPI_BCM2835AUX=m
CONFIG_SPI_MESON_SPIFC=m
CONFIG_SPI_ORION=y CONFIG_SPI_ORION=y
CONFIG_SPI_PL022=y CONFIG_SPI_PL022=y
CONFIG_SPI_QUP=y CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=m
CONFIG_SPI_S3C64XX=y CONFIG_SPI_S3C64XX=y
CONFIG_SPI_SPIDEV=m
CONFIG_SPMI=y CONFIG_SPMI=y
CONFIG_PINCTRL_SINGLE=y CONFIG_PINCTRL_SINGLE=y
CONFIG_PINCTRL_MAX77620=y CONFIG_PINCTRL_MAX77620=y
...@@ -286,33 +282,30 @@ CONFIG_GPIO_PCA953X=y ...@@ -286,33 +282,30 @@ CONFIG_GPIO_PCA953X=y
CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PCA953X_IRQ=y
CONFIG_GPIO_MAX77620=y CONFIG_GPIO_MAX77620=y
CONFIG_POWER_RESET_MSM=y CONFIG_POWER_RESET_MSM=y
CONFIG_BATTERY_BQ27XXX=y
CONFIG_POWER_RESET_XGENE=y CONFIG_POWER_RESET_XGENE=y
CONFIG_POWER_RESET_SYSCON=y CONFIG_POWER_RESET_SYSCON=y
CONFIG_BATTERY_BQ27XXX=y
CONFIG_SENSORS_ARM_SCPI=y
CONFIG_SENSORS_LM90=m CONFIG_SENSORS_LM90=m
CONFIG_SENSORS_INA2XX=m CONFIG_SENSORS_INA2XX=m
CONFIG_SENSORS_ARM_SCPI=y
CONFIG_THERMAL=y
CONFIG_THERMAL_EMULATION=y
CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y
CONFIG_CPU_THERMAL=y CONFIG_CPU_THERMAL=y
CONFIG_BCM2835_THERMAL=y CONFIG_THERMAL_EMULATION=y
CONFIG_EXYNOS_THERMAL=y CONFIG_EXYNOS_THERMAL=y
CONFIG_WATCHDOG=y CONFIG_WATCHDOG=y
CONFIG_BCM2835_WDT=y
CONFIG_RENESAS_WDT=y
CONFIG_S3C2410_WATCHDOG=y CONFIG_S3C2410_WATCHDOG=y
CONFIG_MESON_GXBB_WATCHDOG=m CONFIG_MESON_GXBB_WATCHDOG=m
CONFIG_MESON_WATCHDOG=m CONFIG_MESON_WATCHDOG=m
CONFIG_RENESAS_WDT=y
CONFIG_BCM2835_WDT=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_I2C=y
CONFIG_MFD_EXYNOS_LPASS=m CONFIG_MFD_EXYNOS_LPASS=m
CONFIG_MFD_HI655X_PMIC=y
CONFIG_MFD_MAX77620=y CONFIG_MFD_MAX77620=y
CONFIG_MFD_RK808=y
CONFIG_MFD_SPMI_PMIC=y CONFIG_MFD_SPMI_PMIC=y
CONFIG_MFD_RK808=y
CONFIG_MFD_SEC_CORE=y CONFIG_MFD_SEC_CORE=y
CONFIG_MFD_HI655X_PMIC=y
CONFIG_REGULATOR=y
CONFIG_MFD_CROS_EC=y
CONFIG_MFD_CROS_EC_I2C=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_HI655X=y CONFIG_REGULATOR_HI655X=y
...@@ -345,13 +338,12 @@ CONFIG_DRM_EXYNOS_DSI=y ...@@ -345,13 +338,12 @@ CONFIG_DRM_EXYNOS_DSI=y
CONFIG_DRM_EXYNOS_HDMI=y CONFIG_DRM_EXYNOS_HDMI=y
CONFIG_DRM_EXYNOS_MIC=y CONFIG_DRM_EXYNOS_MIC=y
CONFIG_DRM_RCAR_DU=m CONFIG_DRM_RCAR_DU=m
CONFIG_DRM_RCAR_HDMI=y
CONFIG_DRM_RCAR_LVDS=y CONFIG_DRM_RCAR_LVDS=y
CONFIG_DRM_RCAR_VSP=y CONFIG_DRM_RCAR_VSP=y
CONFIG_DRM_TEGRA=m CONFIG_DRM_TEGRA=m
CONFIG_DRM_VC4=m
CONFIG_DRM_PANEL_SIMPLE=m CONFIG_DRM_PANEL_SIMPLE=m
CONFIG_DRM_I2C_ADV7511=m CONFIG_DRM_I2C_ADV7511=m
CONFIG_DRM_VC4=m
CONFIG_DRM_HISI_KIRIN=m CONFIG_DRM_HISI_KIRIN=m
CONFIG_DRM_MESON=m CONFIG_DRM_MESON=m
CONFIG_FB=y CONFIG_FB=y
...@@ -366,39 +358,37 @@ CONFIG_SOUND=y ...@@ -366,39 +358,37 @@ CONFIG_SOUND=y
CONFIG_SND=y CONFIG_SND=y
CONFIG_SND_SOC=y CONFIG_SND_SOC=y
CONFIG_SND_BCM2835_SOC_I2S=m CONFIG_SND_BCM2835_SOC_I2S=m
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_SAMSUNG=y CONFIG_SND_SOC_SAMSUNG=y
CONFIG_SND_SOC_RCAR=y
CONFIG_SND_SOC_AK4613=y CONFIG_SND_SOC_AK4613=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_OTG=y CONFIG_USB_OTG=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_PLATFORM=y
CONFIG_USB_XHCI_RCAR=y
CONFIG_USB_EHCI_EXYNOS=y
CONFIG_USB_XHCI_TEGRA=y CONFIG_USB_XHCI_TEGRA=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MSM=y CONFIG_USB_EHCI_MSM=y
CONFIG_USB_EHCI_EXYNOS=y
CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_EXYNOS=y
CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_EXYNOS=y
CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_RENESAS_USBHS=m CONFIG_USB_RENESAS_USBHS=m
CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y
CONFIG_USB_DWC2=y
CONFIG_USB_CHIPIDEA=y CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_UDC=y CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_CHIPIDEA_HOST=y CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_ISP1760=y CONFIG_USB_ISP1760=y
CONFIG_USB_HSIC_USB3503=y CONFIG_USB_HSIC_USB3503=y
CONFIG_USB_MSM_OTG=y CONFIG_USB_MSM_OTG=y
CONFIG_USB_QCOM_8X16_PHY=y
CONFIG_USB_ULPI=y CONFIG_USB_ULPI=y
CONFIG_USB_GADGET=y CONFIG_USB_GADGET=y
CONFIG_USB_RENESAS_USBHS_UDC=m CONFIG_USB_RENESAS_USBHS_UDC=m
CONFIG_MMC=y CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=32 CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_ARMMMCI=y CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_MESON_GX=y
CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ACPI=y CONFIG_MMC_SDHCI_ACPI=y
CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_PLTFM=y
...@@ -406,6 +396,7 @@ CONFIG_MMC_SDHCI_OF_ARASAN=y ...@@ -406,6 +396,7 @@ CONFIG_MMC_SDHCI_OF_ARASAN=y
CONFIG_MMC_SDHCI_OF_ESDHC=y CONFIG_MMC_SDHCI_OF_ESDHC=y
CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_MMC_SDHCI_TEGRA=y CONFIG_MMC_SDHCI_TEGRA=y
CONFIG_MMC_MESON_GX=y
CONFIG_MMC_SDHCI_MSM=y CONFIG_MMC_SDHCI_MSM=y
CONFIG_MMC_SPI=y CONFIG_MMC_SPI=y
CONFIG_MMC_SDHI=y CONFIG_MMC_SDHI=y
...@@ -414,32 +405,31 @@ CONFIG_MMC_DW_EXYNOS=y ...@@ -414,32 +405,31 @@ CONFIG_MMC_DW_EXYNOS=y
CONFIG_MMC_DW_K3=y CONFIG_MMC_DW_K3=y
CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_DW_ROCKCHIP=y
CONFIG_MMC_SUNXI=y CONFIG_MMC_SUNXI=y
CONFIG_MMC_SDHCI_XENON=y
CONFIG_MMC_BCM2835=y CONFIG_MMC_BCM2835=y
CONFIG_MMC_SDHCI_XENON=y
CONFIG_NEW_LEDS=y CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y CONFIG_LEDS_CLASS=y
CONFIG_LEDS_GPIO=y CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y CONFIG_LEDS_PWM=y
CONFIG_LEDS_SYSCON=y CONFIG_LEDS_SYSCON=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_CPU=y CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MAX77686=y CONFIG_RTC_DRV_MAX77686=y
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_S5M=y CONFIG_RTC_DRV_S5M=y
CONFIG_RTC_DRV_DS3232=y CONFIG_RTC_DRV_DS3232=y
CONFIG_RTC_DRV_EFI=y CONFIG_RTC_DRV_EFI=y
CONFIG_RTC_DRV_S3C=y
CONFIG_RTC_DRV_PL031=y CONFIG_RTC_DRV_PL031=y
CONFIG_RTC_DRV_SUN6I=y CONFIG_RTC_DRV_SUN6I=y
CONFIG_RTC_DRV_RK808=m
CONFIG_RTC_DRV_TEGRA=y CONFIG_RTC_DRV_TEGRA=y
CONFIG_RTC_DRV_XGENE=y CONFIG_RTC_DRV_XGENE=y
CONFIG_RTC_DRV_S3C=y
CONFIG_DMADEVICES=y CONFIG_DMADEVICES=y
CONFIG_DMA_BCM2835=m
CONFIG_MV_XOR_V2=y CONFIG_MV_XOR_V2=y
CONFIG_PL330_DMA=y CONFIG_PL330_DMA=y
CONFIG_DMA_BCM2835=m
CONFIG_TEGRA20_APB_DMA=y CONFIG_TEGRA20_APB_DMA=y
CONFIG_QCOM_BAM_DMA=y CONFIG_QCOM_BAM_DMA=y
CONFIG_QCOM_HIDMA_MGMT=y CONFIG_QCOM_HIDMA_MGMT=y
...@@ -452,52 +442,53 @@ CONFIG_VIRTIO_BALLOON=y ...@@ -452,52 +442,53 @@ CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_MMIO=y
CONFIG_XEN_GNTDEV=y CONFIG_XEN_GNTDEV=y
CONFIG_XEN_GRANT_DEV_ALLOC=y CONFIG_XEN_GRANT_DEV_ALLOC=y
CONFIG_COMMON_CLK_RK808=y
CONFIG_COMMON_CLK_SCPI=y CONFIG_COMMON_CLK_SCPI=y
CONFIG_COMMON_CLK_CS2000_CP=y CONFIG_COMMON_CLK_CS2000_CP=y
CONFIG_COMMON_CLK_S2MPS11=y CONFIG_COMMON_CLK_S2MPS11=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_COMMON_CLK_RK808=y
CONFIG_CLK_QORIQ=y CONFIG_CLK_QORIQ=y
CONFIG_COMMON_CLK_PWM=y
CONFIG_COMMON_CLK_QCOM=y CONFIG_COMMON_CLK_QCOM=y
CONFIG_QCOM_CLK_SMD_RPM=y
CONFIG_MSM_GCC_8916=y CONFIG_MSM_GCC_8916=y
CONFIG_MSM_GCC_8994=y CONFIG_MSM_GCC_8994=y
CONFIG_MSM_MMCC_8996=y CONFIG_MSM_MMCC_8996=y
CONFIG_HWSPINLOCK_QCOM=y CONFIG_HWSPINLOCK_QCOM=y
CONFIG_MAILBOX=y
CONFIG_ARM_MHU=y CONFIG_ARM_MHU=y
CONFIG_PLATFORM_MHU=y CONFIG_PLATFORM_MHU=y
CONFIG_BCM2835_MBOX=y CONFIG_BCM2835_MBOX=y
CONFIG_HI6220_MBOX=y CONFIG_HI6220_MBOX=y
CONFIG_ARM_SMMU=y CONFIG_ARM_SMMU=y
CONFIG_ARM_SMMU_V3=y CONFIG_ARM_SMMU_V3=y
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_RASPBERRYPI_POWER=y CONFIG_RASPBERRYPI_POWER=y
CONFIG_QCOM_SMEM=y CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMD=y
CONFIG_QCOM_SMD_RPM=y CONFIG_QCOM_SMD_RPM=y
CONFIG_QCOM_SMP2P=y
CONFIG_QCOM_SMSM=y
CONFIG_ROCKCHIP_PM_DOMAINS=y CONFIG_ROCKCHIP_PM_DOMAINS=y
CONFIG_ARCH_TEGRA_132_SOC=y CONFIG_ARCH_TEGRA_132_SOC=y
CONFIG_ARCH_TEGRA_210_SOC=y CONFIG_ARCH_TEGRA_210_SOC=y
CONFIG_ARCH_TEGRA_186_SOC=y CONFIG_ARCH_TEGRA_186_SOC=y
CONFIG_EXTCON_USB_GPIO=y CONFIG_EXTCON_USB_GPIO=y
CONFIG_IIO=y
CONFIG_EXYNOS_ADC=y
CONFIG_PWM=y CONFIG_PWM=y
CONFIG_PWM_BCM2835=m CONFIG_PWM_BCM2835=m
CONFIG_PWM_MESON=m
CONFIG_PWM_ROCKCHIP=y CONFIG_PWM_ROCKCHIP=y
CONFIG_PWM_SAMSUNG=y
CONFIG_PWM_TEGRA=m CONFIG_PWM_TEGRA=m
CONFIG_PWM_MESON=m
CONFIG_COMMON_RESET_HI6220=y
CONFIG_PHY_RCAR_GEN3_USB2=y CONFIG_PHY_RCAR_GEN3_USB2=y
CONFIG_PHY_HI6220_USB=y CONFIG_PHY_HI6220_USB=y
CONFIG_PHY_SUN4I_USB=y
CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y
CONFIG_PHY_ROCKCHIP_EMMC=y CONFIG_PHY_ROCKCHIP_EMMC=y
CONFIG_PHY_SUN4I_USB=y
CONFIG_PHY_XGENE=y CONFIG_PHY_XGENE=y
CONFIG_PHY_TEGRA_XUSB=y CONFIG_PHY_TEGRA_XUSB=y
CONFIG_ARM_SCPI_PROTOCOL=y CONFIG_ARM_SCPI_PROTOCOL=y
CONFIG_ACPI=y
CONFIG_IIO=y
CONFIG_EXYNOS_ADC=y
CONFIG_PWM_SAMSUNG=y
CONFIG_RASPBERRYPI_FIRMWARE=y CONFIG_RASPBERRYPI_FIRMWARE=y
CONFIG_ACPI=y
CONFIG_EXT2_FS=y CONFIG_EXT2_FS=y
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y CONFIG_EXT4_FS_POSIX_ACL=y
...@@ -511,7 +502,6 @@ CONFIG_FUSE_FS=m ...@@ -511,7 +502,6 @@ CONFIG_FUSE_FS=m
CONFIG_CUSE=m CONFIG_CUSE=m
CONFIG_OVERLAY_FS=m CONFIG_OVERLAY_FS=m
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
CONFIG_TMPFS=y
CONFIG_HUGETLBFS=y CONFIG_HUGETLBFS=y
CONFIG_CONFIGFS_FS=y CONFIG_CONFIGFS_FS=y
CONFIG_EFIVAR_FS=y CONFIG_EFIVAR_FS=y
...@@ -539,11 +529,9 @@ CONFIG_MEMTEST=y ...@@ -539,11 +529,9 @@ CONFIG_MEMTEST=y
CONFIG_SECURITY=y CONFIG_SECURITY=y
CONFIG_CRYPTO_ECHAINIV=y CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DEV_SAFEXCEL=m
CONFIG_ARM64_CRYPTO=y CONFIG_ARM64_CRYPTO=y
CONFIG_CRYPTO_SHA1_ARM64_CE=y CONFIG_CRYPTO_SHA1_ARM64_CE=y
CONFIG_CRYPTO_SHA2_ARM64_CE=y CONFIG_CRYPTO_SHA2_ARM64_CE=y
CONFIG_CRYPTO_GHASH_ARM64_CE=y CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_CCM=y CONFIG_CRYPTO_AES_ARM64_CE_CCM=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
# CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set
../../../../../include/dt-bindings
\ No newline at end of file
../../../../../include/dt-bindings
\ No newline at end of file
../../../../../include/dt-bindings
\ No newline at end of file
../../../../../include/dt-bindings
\ No newline at end of file
...@@ -202,7 +202,8 @@ static int ti_sci_debugfs_create(struct platform_device *pdev, ...@@ -202,7 +202,8 @@ static int ti_sci_debugfs_create(struct platform_device *pdev,
info->debug_buffer[info->debug_region_size] = 0; info->debug_buffer[info->debug_region_size] = 0;
info->d = debugfs_create_file(strncat(debug_name, dev_name(dev), info->d = debugfs_create_file(strncat(debug_name, dev_name(dev),
sizeof(debug_name)), sizeof(debug_name) -
sizeof("ti_sci_debug@")),
0444, NULL, info, &ti_sci_debug_fops); 0444, NULL, info, &ti_sci_debug_fops);
if (IS_ERR(info->d)) if (IS_ERR(info->d))
return PTR_ERR(info->d); return PTR_ERR(info->d);
......
...@@ -512,7 +512,7 @@ static void gpmc_cs_show_timings(int cs, const char *desc) ...@@ -512,7 +512,7 @@ static void gpmc_cs_show_timings(int cs, const char *desc)
pr_info("gpmc cs%i access configuration:\n", cs); pr_info("gpmc cs%i access configuration:\n", cs);
GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity"); GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 4, 4, "time-para-granularity");
GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data"); GPMC_GET_RAW(GPMC_CS_CONFIG1, 8, 9, "mux-add-data");
GPMC_GET_RAW_MAX(GPMC_CS_CONFIG1, 12, 13, GPMC_GET_RAW_SHIFT_MAX(GPMC_CS_CONFIG1, 12, 13, 1,
GPMC_CONFIG1_DEVICESIZE_MAX, "device-width"); GPMC_CONFIG1_DEVICESIZE_MAX, "device-width");
GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin"); GPMC_GET_RAW(GPMC_CS_CONFIG1, 16, 17, "wait-pin");
GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write"); GPMC_GET_RAW_BOOL(GPMC_CS_CONFIG1, 21, 21, "wait-on-write");
......
...@@ -49,7 +49,7 @@ static const struct of_device_id sun_top_ctrl_match[] = { ...@@ -49,7 +49,7 @@ static const struct of_device_id sun_top_ctrl_match[] = {
{ .compatible = "brcm,bcm7420-sun-top-ctrl", }, { .compatible = "brcm,bcm7420-sun-top-ctrl", },
{ .compatible = "brcm,bcm7425-sun-top-ctrl", }, { .compatible = "brcm,bcm7425-sun-top-ctrl", },
{ .compatible = "brcm,bcm7429-sun-top-ctrl", }, { .compatible = "brcm,bcm7429-sun-top-ctrl", },
{ .compatible = "brcm,bcm7425-sun-top-ctrl", }, { .compatible = "brcm,bcm7435-sun-top-ctrl", },
{ .compatible = "brcm,brcmstb-sun-top-ctrl", }, { .compatible = "brcm,brcmstb-sun-top-ctrl", },
{ } { }
}; };
......
...@@ -2,8 +2,9 @@ menu "i.MX SoC drivers" ...@@ -2,8 +2,9 @@ menu "i.MX SoC drivers"
config IMX7_PM_DOMAINS config IMX7_PM_DOMAINS
bool "i.MX7 PM domains" bool "i.MX7 PM domains"
select PM_GENERIC_DOMAINS
depends on SOC_IMX7D || (COMPILE_TEST && OF) depends on SOC_IMX7D || (COMPILE_TEST && OF)
depends on PM
select PM_GENERIC_DOMAINS
default y if SOC_IMX7D default y if SOC_IMX7D
endmenu endmenu
# Generic Trusted Execution Environment Configuration # Generic Trusted Execution Environment Configuration
config TEE config TEE
tristate "Trusted Execution Environment support" tristate "Trusted Execution Environment support"
depends on HAVE_ARM_SMCCC || COMPILE_TEST
select DMA_SHARED_BUFFER select DMA_SHARED_BUFFER
select GENERIC_ALLOCATOR select GENERIC_ALLOCATOR
help help
......
#ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__ #ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__
#define __LINUX_SOC_RENESAS_RCAR_RST_H__ #define __LINUX_SOC_RENESAS_RCAR_RST_H__
#if defined(CONFIG_ARCH_RCAR_GEN1) || defined(CONFIG_ARCH_RCAR_GEN2) || \
defined(CONFIG_ARCH_R8A7795) || defined(CONFIG_ARCH_R8A7796)
int rcar_rst_read_mode_pins(u32 *mode); int rcar_rst_read_mode_pins(u32 *mode);
#else
static inline int rcar_rst_read_mode_pins(u32 *mode) { return -ENODEV; }
#endif
#endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */ #endif /* __LINUX_SOC_RENESAS_RCAR_RST_H__ */
...@@ -175,7 +175,7 @@ ld_flags = $(LDFLAGS) $(ldflags-y) ...@@ -175,7 +175,7 @@ ld_flags = $(LDFLAGS) $(ldflags-y)
dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \ dtc_cpp_flags = -Wp,-MD,$(depfile).pre.tmp -nostdinc \
-I$(srctree)/arch/$(SRCARCH)/boot/dts \ -I$(srctree)/arch/$(SRCARCH)/boot/dts \
-I$(srctree)/arch/$(SRCARCH)/boot/dts/include \ -I$(srctree)/scripts/dtc/include-prefixes \
-I$(srctree)/drivers/of/testcase-data \ -I$(srctree)/drivers/of/testcase-data \
-undef -D__DTS__ -undef -D__DTS__
......
../../../arch/arc/boot/dts
\ No newline at end of file
../../../arch/arm/boot/dts
\ No newline at end of file
../../../arch/arm64/boot/dts
\ No newline at end of file
../../../arch/c6x/boot/dts
\ No newline at end of file
../../../arch/cris/boot/dts
\ No newline at end of file
../../../include/dt-bindings
\ No newline at end of file
../../../arch/h8300/boot/dts
\ No newline at end of file
../../../arch/metag/boot/dts
\ No newline at end of file
../../../arch/microblaze/boot/dts
\ No newline at end of file
../../../arch/mips/boot/dts
\ No newline at end of file
../../../arch/nios2/boot/dts
\ No newline at end of file
../../../arch/openrisc/boot/dts
\ No newline at end of file
../../../arch/powerpc/boot/dts
\ No newline at end of file
../../../arch/sh/boot/dts
\ No newline at end of file
../../../arch/xtensa/boot/dts
\ No newline at end of file
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