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Commit f7fb92cd authored by Ville Syrjälä's avatar Ville Syrjälä
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drm/i915: Move the color stuff under INTEL_INFO->display 

The LUTs are a display feature so move the details into
the display portion of the device info.
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220623130900.26078-10-ville.syrjala@linux.intel.comReviewed-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 95be40c8
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Showing with 42 additions and 39 deletions
drivers/gpu/drm/i915/display/intel_color.c
View file @ f7fb92cd
...@@ -841,7 +841,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state) ...@@ -841,7 +841,7 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.degamma_lut_size;
const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data; const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
/* /*
...@@ -883,7 +883,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat ...@@ -883,7 +883,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.degamma_lut_size;
/* /*
* When setting the auto-increment bit, the hardware seems to * When setting the auto-increment bit, the hardware seems to
...@@ -1335,10 +1335,10 @@ static int check_luts(const struct intel_crtc_state *crtc_state) ...@@ -1335,10 +1335,10 @@ static int check_luts(const struct intel_crtc_state *crtc_state)
return -EINVAL; return -EINVAL;
} }
degamma_length = INTEL_INFO(dev_priv)->color.degamma_lut_size; degamma_length = INTEL_INFO(dev_priv)->display.color.degamma_lut_size;
gamma_length = INTEL_INFO(dev_priv)->color.gamma_lut_size; gamma_length = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
degamma_tests = INTEL_INFO(dev_priv)->color.degamma_lut_tests; degamma_tests = INTEL_INFO(dev_priv)->display.color.degamma_lut_tests;
gamma_tests = INTEL_INFO(dev_priv)->color.gamma_lut_tests; gamma_tests = INTEL_INFO(dev_priv)->display.color.gamma_lut_tests;
if (check_lut_size(degamma_lut, degamma_length) || if (check_lut_size(degamma_lut, degamma_length) ||
check_lut_size(gamma_lut, gamma_length)) check_lut_size(gamma_lut, gamma_length))
...@@ -1874,7 +1874,7 @@ static void i9xx_read_luts(struct intel_crtc_state *crtc_state) ...@@ -1874,7 +1874,7 @@ static void i9xx_read_luts(struct intel_crtc_state *crtc_state)
static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc) static struct drm_property_blob *i965_read_lut_10p6(struct intel_crtc *crtc)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob; struct drm_property_blob *blob;
struct drm_color_lut *lut; struct drm_color_lut *lut;
...@@ -1917,7 +1917,7 @@ static void i965_read_luts(struct intel_crtc_state *crtc_state) ...@@ -1917,7 +1917,7 @@ static void i965_read_luts(struct intel_crtc_state *crtc_state)
static struct drm_property_blob *chv_read_cgm_gamma(struct intel_crtc *crtc) static struct drm_property_blob *chv_read_cgm_gamma(struct intel_crtc *crtc)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob; struct drm_property_blob *blob;
struct drm_color_lut *lut; struct drm_color_lut *lut;
...@@ -1978,7 +1978,7 @@ static struct drm_property_blob *ilk_read_lut_8(struct intel_crtc *crtc) ...@@ -1978,7 +1978,7 @@ static struct drm_property_blob *ilk_read_lut_8(struct intel_crtc *crtc)
static struct drm_property_blob *ilk_read_lut_10(struct intel_crtc *crtc) static struct drm_property_blob *ilk_read_lut_10(struct intel_crtc *crtc)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob; struct drm_property_blob *blob;
struct drm_color_lut *lut; struct drm_color_lut *lut;
...@@ -2029,7 +2029,7 @@ static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc, ...@@ -2029,7 +2029,7 @@ static struct drm_property_blob *bdw_read_lut_10(struct intel_crtc *crtc,
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, hw_lut_size = ivb_lut_10_size(prec_index); int i, hw_lut_size = ivb_lut_10_size(prec_index);
int lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; int lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob; struct drm_property_blob *blob;
struct drm_color_lut *lut; struct drm_color_lut *lut;
...@@ -2082,7 +2082,7 @@ static struct drm_property_blob * ...@@ -2082,7 +2082,7 @@ static struct drm_property_blob *
icl_read_lut_multi_segment(struct intel_crtc *crtc) icl_read_lut_multi_segment(struct intel_crtc *crtc)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size; int i, lut_size = INTEL_INFO(dev_priv)->display.color.gamma_lut_size;
enum pipe pipe = crtc->pipe; enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob; struct drm_property_blob *blob;
struct drm_color_lut *lut; struct drm_color_lut *lut;
...@@ -2219,7 +2219,7 @@ static const struct intel_color_funcs ilk_color_funcs = { ...@@ -2219,7 +2219,7 @@ static const struct intel_color_funcs ilk_color_funcs = {
void intel_color_init(struct intel_crtc *crtc) void intel_color_init(struct intel_crtc *crtc)
{ {
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
bool has_ctm = INTEL_INFO(dev_priv)->color.degamma_lut_size != 0; bool has_ctm = INTEL_INFO(dev_priv)->display.color.degamma_lut_size != 0;
drm_mode_crtc_set_gamma_size(&crtc->base, 256); drm_mode_crtc_set_gamma_size(&crtc->base, 256);
...@@ -2250,7 +2250,7 @@ void intel_color_init(struct intel_crtc *crtc) ...@@ -2250,7 +2250,7 @@ void intel_color_init(struct intel_crtc *crtc)
} }
drm_crtc_enable_color_mgmt(&crtc->base, drm_crtc_enable_color_mgmt(&crtc->base,
INTEL_INFO(dev_priv)->color.degamma_lut_size, INTEL_INFO(dev_priv)->display.color.degamma_lut_size,
has_ctm, has_ctm,
INTEL_INFO(dev_priv)->color.gamma_lut_size); INTEL_INFO(dev_priv)->display.color.gamma_lut_size);
} }
drivers/gpu/drm/i915/i915_pci.c
View file @ f7fb92cd
...@@ -127,30 +127,33 @@ ...@@ -127,30 +127,33 @@
} }
#define I9XX_COLORS \ #define I9XX_COLORS \
.color = { .gamma_lut_size = 256 } .display.color = { .gamma_lut_size = 256 }
#define I965_COLORS \ #define I965_COLORS \
.color = { .gamma_lut_size = 129, \ .display.color = { .gamma_lut_size = 129, \
.gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \ .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
} }
#define ILK_COLORS \ #define ILK_COLORS \
.color = { .gamma_lut_size = 1024 } .display.color = { .gamma_lut_size = 1024 }
#define IVB_COLORS \ #define IVB_COLORS \
.color = { .degamma_lut_size = 1024, .gamma_lut_size = 1024 } .display.color = { .degamma_lut_size = 1024, .gamma_lut_size = 1024 }
#define CHV_COLORS \ #define CHV_COLORS \
.color = { .degamma_lut_size = 65, .gamma_lut_size = 257, \ .display.color = { \
.degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \ .degamma_lut_size = 65, .gamma_lut_size = 257, \
.gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
.gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
} }
#define GLK_COLORS \ #define GLK_COLORS \
.color = { .degamma_lut_size = 33, .gamma_lut_size = 1024, \ .display.color = { \
.degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \ .degamma_lut_size = 33, .gamma_lut_size = 1024, \
DRM_COLOR_LUT_EQUAL_CHANNELS, \ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
DRM_COLOR_LUT_EQUAL_CHANNELS, \
} }
#define ICL_COLORS \ #define ICL_COLORS \
.color = { .degamma_lut_size = 33, .gamma_lut_size = 262145, \ .display.color = { \
.degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \ .degamma_lut_size = 33, .gamma_lut_size = 262145, \
DRM_COLOR_LUT_EQUAL_CHANNELS, \ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
.gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \ DRM_COLOR_LUT_EQUAL_CHANNELS, \
.gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
} }
/* Keep in gen based order, and chronological order within a gen */ /* Keep in gen based order, and chronological order within a gen */
...@@ -930,9 +933,10 @@ static const struct intel_device_info adl_s_info = { ...@@ -930,9 +933,10 @@ static const struct intel_device_info adl_s_info = {
#define XE_LPD_FEATURES \ #define XE_LPD_FEATURES \
.display.abox_mask = GENMASK(1, 0), \ .display.abox_mask = GENMASK(1, 0), \
.color = { .degamma_lut_size = 128, .gamma_lut_size = 1024, \ .display.color = { \
.degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \ .degamma_lut_size = 128, .gamma_lut_size = 1024, \
DRM_COLOR_LUT_EQUAL_CHANNELS, \ .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
DRM_COLOR_LUT_EQUAL_CHANNELS, \
}, \ }, \
.display.dbuf.size = 4096, \ .display.dbuf.size = 4096, \
.display.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \ .display.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) | \
......
drivers/gpu/drm/i915/intel_device_info.h
View file @ f7fb92cd
...@@ -239,15 +239,14 @@ struct intel_device_info { ...@@ -239,15 +239,14 @@ struct intel_device_info {
u32 pipe_offsets[I915_MAX_TRANSCODERS]; u32 pipe_offsets[I915_MAX_TRANSCODERS];
u32 trans_offsets[I915_MAX_TRANSCODERS]; u32 trans_offsets[I915_MAX_TRANSCODERS];
u32 cursor_offsets[I915_MAX_PIPES]; u32 cursor_offsets[I915_MAX_PIPES];
} display;
struct color_luts { struct {
u32 degamma_lut_size; u32 degamma_lut_size;
u32 gamma_lut_size; u32 gamma_lut_size;
u32 degamma_lut_tests; u32 degamma_lut_tests;
u32 gamma_lut_tests; u32 gamma_lut_tests;
} color; } color;
} display;
}; };
struct intel_runtime_info { struct intel_runtime_info {
......
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