Commit f83b6b64 authored by Adrian Hunter's avatar Adrian Hunter Committed by Arnaldo Carvalho de Melo

x86/insn: perf tools: Add new xsave instructions

Add xsavec, xsaves and xrstors to the op code map and the perf tools new
instructions test.  To run the test:

  $ tools/perf/perf test "x86 ins"
  39: Test x86 instruction decoder - new instructions          : Ok

Or to see the details:

  $ tools/perf/perf test -v "x86 ins" 2>&1 | grep 'xsave\|xrst'

For information about xsavec, xsaves and xrstors, refer the Intel SDM.
Signed-off-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Acked-by: default avatarMasami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Qiaowei Ren <qiaowei.ren@intel.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/1441196131-20632-8-git-send-email-adrian.hunter@intel.comSigned-off-by: default avatarArnaldo Carvalho de Melo <acme@redhat.com>
parent 978260cd
......@@ -899,6 +899,9 @@ EndTable
GrpTable: Grp9
1: CMPXCHG8B/16B Mq/Mdq
3: xrstors
4: xsavec
5: xsaves
6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
EndTable
......
......@@ -636,5 +636,23 @@
"0f ae 30 \txsaveopt (%eax)",},
{{0x0f, 0xae, 0xf0, }, 3, 0, "", "",
"0f ae f0 \tmfence ",},
{{0x0f, 0xc7, 0x20, }, 3, 0, "", "",
"0f c7 20 \txsavec (%eax)",},
{{0x0f, 0xc7, 0x25, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
"0f c7 25 78 56 34 12 \txsavec 0x12345678",},
{{0x0f, 0xc7, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 a4 c8 78 56 34 12 \txsavec 0x12345678(%eax,%ecx,8)",},
{{0x0f, 0xc7, 0x28, }, 3, 0, "", "",
"0f c7 28 \txsaves (%eax)",},
{{0x0f, 0xc7, 0x2d, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
"0f c7 2d 78 56 34 12 \txsaves 0x12345678",},
{{0x0f, 0xc7, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 ac c8 78 56 34 12 \txsaves 0x12345678(%eax,%ecx,8)",},
{{0x0f, 0xc7, 0x18, }, 3, 0, "", "",
"0f c7 18 \txrstors (%eax)",},
{{0x0f, 0xc7, 0x1d, 0x78, 0x56, 0x34, 0x12, }, 7, 0, "", "",
"0f c7 1d 78 56 34 12 \txrstors 0x12345678",},
{{0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%eax,%ecx,8)",},
{{0x66, 0x0f, 0xae, 0xf8, }, 4, 0, "", "",
"66 0f ae f8 \tpcommit ",},
......@@ -734,5 +734,35 @@
"41 0f ae 30 \txsaveopt (%r8)",},
{{0x0f, 0xae, 0xf0, }, 3, 0, "", "",
"0f ae f0 \tmfence ",},
{{0x0f, 0xc7, 0x20, }, 3, 0, "", "",
"0f c7 20 \txsavec (%rax)",},
{{0x41, 0x0f, 0xc7, 0x20, }, 4, 0, "", "",
"41 0f c7 20 \txsavec (%r8)",},
{{0x0f, 0xc7, 0x24, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 24 25 78 56 34 12 \txsavec 0x12345678",},
{{0x0f, 0xc7, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 a4 c8 78 56 34 12 \txsavec 0x12345678(%rax,%rcx,8)",},
{{0x41, 0x0f, 0xc7, 0xa4, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"41 0f c7 a4 c8 78 56 34 12 \txsavec 0x12345678(%r8,%rcx,8)",},
{{0x0f, 0xc7, 0x28, }, 3, 0, "", "",
"0f c7 28 \txsaves (%rax)",},
{{0x41, 0x0f, 0xc7, 0x28, }, 4, 0, "", "",
"41 0f c7 28 \txsaves (%r8)",},
{{0x0f, 0xc7, 0x2c, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 2c 25 78 56 34 12 \txsaves 0x12345678",},
{{0x0f, 0xc7, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 ac c8 78 56 34 12 \txsaves 0x12345678(%rax,%rcx,8)",},
{{0x41, 0x0f, 0xc7, 0xac, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"41 0f c7 ac c8 78 56 34 12 \txsaves 0x12345678(%r8,%rcx,8)",},
{{0x0f, 0xc7, 0x18, }, 3, 0, "", "",
"0f c7 18 \txrstors (%rax)",},
{{0x41, 0x0f, 0xc7, 0x18, }, 4, 0, "", "",
"41 0f c7 18 \txrstors (%r8)",},
{{0x0f, 0xc7, 0x1c, 0x25, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 1c 25 78 56 34 12 \txrstors 0x12345678",},
{{0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 8, 0, "", "",
"0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%rax,%rcx,8)",},
{{0x41, 0x0f, 0xc7, 0x9c, 0xc8, 0x78, 0x56, 0x34, 0x12, }, 9, 0, "", "",
"41 0f c7 9c c8 78 56 34 12 \txrstors 0x12345678(%r8,%rcx,8)",},
{{0x66, 0x0f, 0xae, 0xf8, }, 4, 0, "", "",
"66 0f ae f8 \tpcommit ",},
......@@ -445,6 +445,30 @@ int main(void)
asm volatile("xsaveopt (%r8)");
asm volatile("mfence");
/* xsavec mem */
asm volatile("xsavec (%rax)");
asm volatile("xsavec (%r8)");
asm volatile("xsavec (0x12345678)");
asm volatile("xsavec 0x12345678(%rax,%rcx,8)");
asm volatile("xsavec 0x12345678(%r8,%rcx,8)");
/* xsaves mem */
asm volatile("xsaves (%rax)");
asm volatile("xsaves (%r8)");
asm volatile("xsaves (0x12345678)");
asm volatile("xsaves 0x12345678(%rax,%rcx,8)");
asm volatile("xsaves 0x12345678(%r8,%rcx,8)");
/* xrstors mem */
asm volatile("xrstors (%rax)");
asm volatile("xrstors (%r8)");
asm volatile("xrstors (0x12345678)");
asm volatile("xrstors 0x12345678(%rax,%rcx,8)");
asm volatile("xrstors 0x12345678(%r8,%rcx,8)");
#else /* #ifdef __x86_64__ */
/* bndmk m32, bnd */
......@@ -822,6 +846,24 @@ int main(void)
asm volatile("xsaveopt (%eax)");
asm volatile("mfence");
/* xsavec mem */
asm volatile("xsavec (%eax)");
asm volatile("xsavec (0x12345678)");
asm volatile("xsavec 0x12345678(%eax,%ecx,8)");
/* xsaves mem */
asm volatile("xsaves (%eax)");
asm volatile("xsaves (0x12345678)");
asm volatile("xsaves 0x12345678(%eax,%ecx,8)");
/* xrstors mem */
asm volatile("xrstors (%eax)");
asm volatile("xrstors (0x12345678)");
asm volatile("xrstors 0x12345678(%eax,%ecx,8)");
#endif /* #ifndef __x86_64__ */
/* pcommit */
......
......@@ -899,6 +899,9 @@ EndTable
GrpTable: Grp9
1: CMPXCHG8B/16B Mq/Mdq
3: xrstors
4: xsavec
5: xsaves
6: VMPTRLD Mq | VMCLEAR Mq (66) | VMXON Mq (F3) | RDRAND Rv (11B)
7: VMPTRST Mq | VMPTRST Mq (F3) | RDSEED Rv (11B)
EndTable
......
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