Commit f9e2df82 authored by Robert Marko's avatar Robert Marko Committed by Bjorn Andersson

arm64: dts: qcom: ipq8074: add crypto nodes

IPQ8074 uses Qualcom QCE crypto engine v5.1
which is already supported.

So simply add nodes for its DMA and QCE itself.
Signed-off-by: default avatarRobert Marko <robimarko@gmail.com>
Link: https://lore.kernel.org/r/20210518181618.3238386-1-robimarko@gmail.comSigned-off-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
parent 06bf656e
...@@ -204,6 +204,30 @@ pcie_phy1: phy@8e000 { ...@@ -204,6 +204,30 @@ pcie_phy1: phy@8e000 {
status = "disabled"; status = "disabled";
}; };
cryptobam: dma@704000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x00704000 0x20000>;
interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
clock-names = "bam_clk";
#dma-cells = <1>;
qcom,ee = <1>;
qcom,controlled-remotely = <1>;
status = "disabled";
};
crypto: crypto@73a000 {
compatible = "qcom,crypto-v5.1";
reg = <0x0073a000 0x6000>;
clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
<&gcc GCC_CRYPTO_AXI_CLK>,
<&gcc GCC_CRYPTO_CLK>;
clock-names = "iface", "bus", "core";
dmas = <&cryptobam 2>, <&cryptobam 3>;
dma-names = "rx", "tx";
status = "disabled";
};
tlmm: pinctrl@1000000 { tlmm: pinctrl@1000000 {
compatible = "qcom,ipq8074-pinctrl"; compatible = "qcom,ipq8074-pinctrl";
reg = <0x01000000 0x300000>; reg = <0x01000000 0x300000>;
......
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