Commit fa4de7cc authored by Martin J. Bligh's avatar Martin J. Bligh Committed by Linus Torvalds

[PATCH] NUMA-Q fixes

This patch basically just renames usages of CONFIG_MULTIQUAD to
CONFIG_X86_NUMAQ. The original multiquad option covered a variety
of sins, and just made a mess (my fault). After extensive community
discussion, this is the naming scheme everyone agreed to - the
CONFIG_X86_NUMAQ option already exists, we're just renaming usages
of MULTIQUAD to it, and removing the MULTIQUAD option.

Stuff that's really to do with clustered APIC mode is put under
CONFIG_CLUSTERED_APIC instead, as it's not specific to the NUMA-Q.

Note that the definitions of clustered_apic_mode are still duplicated,
so the changes appear twice.  I'm not making it worse, just haven't
fixed this one yet, will do that next.

Patch was written by Matt Dobson.
parent fe0eee23
......@@ -120,7 +120,7 @@ static char *vidmem = (char *)0xb8000;
static int vidport;
static int lines, cols;
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_X86_NUMAQ
static void * xquad_portio = NULL;
#endif
......
......@@ -174,7 +174,7 @@ else
#Platform Choices
bool 'Multiquad (IBM/Sequent) NUMAQ support' CONFIG_X86_NUMAQ
if [ "$CONFIG_X86_NUMAQ" = "y" ]; then
define_bool CONFIG_MULTIQUAD y
define_bool CONFIG_CLUSTERED_APIC y
fi
# Common NUMA Features
if [ "$CONFIG_X86_NUMAQ" = "y" ]; then
......
......@@ -300,7 +300,7 @@ static inline void slow_down_io(void) {
: : );
}
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_X86_NUMAQ
extern void *xquad_portio; /* Where the IO area was mapped */
#define XQUAD_PORT_ADDR(port, quad) (xquad_portio + (XQUAD_PORTIO_QUAD*quad) + port)
#define __BUILDIO(bwl,bw,type) \
......
......@@ -16,11 +16,11 @@
/*
* a maximum of 16 APICs with the current APIC ID architecture.
*/
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_X86_NUMAQ
#define MAX_APICS 256
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_X86_NUMAQ */
#define MAX_APICS 16
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_X86_NUMAQ */
#define MAX_MPC_ENTRY 1024
......@@ -184,11 +184,11 @@ struct mpc_config_translation
* 7 2 CPU MCA+PCI
*/
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_X86_NUMAQ
#define MAX_IRQ_SOURCES 512
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_X86_NUMAQ */
#define MAX_IRQ_SOURCES 256
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_X86_NUMAQ */
#define MAX_MP_BUSSES 32
enum mp_bustype {
......
......@@ -22,7 +22,7 @@
#endif
#ifdef CONFIG_SMP
# ifdef CONFIG_MULTIQUAD
# ifdef CONFIG_CLUSTERED_APIC
# define TARGET_CPUS 0xf /* all CPUs in *THIS* quad */
# define INT_DELIVERY_MODE 0 /* physical delivery on LOCAL quad */
# else
......@@ -35,13 +35,13 @@
#endif
#ifndef clustered_apic_mode
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_CLUSTERED_APIC
#define clustered_apic_mode (1)
#define esr_disable (1)
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_CLUSTERED_APIC */
#define clustered_apic_mode (0)
#define esr_disable (0)
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
#endif
#ifdef CONFIG_SMP
......
......@@ -2,35 +2,35 @@
#define __ASM_SMPBOOT_H
#ifndef clustered_apic_mode
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_CLUSTERED_APIC
#define clustered_apic_mode (1)
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_CLUSTERED_APIC */
#define clustered_apic_mode (0)
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
#endif
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_CLUSTERED_APIC
#define TRAMPOLINE_LOW phys_to_virt(0x8)
#define TRAMPOLINE_HIGH phys_to_virt(0xa)
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_CLUSTERED_APIC */
#define TRAMPOLINE_LOW phys_to_virt(0x467)
#define TRAMPOLINE_HIGH phys_to_virt(0x469)
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_CLUSTERED_APIC
#define boot_cpu_apicid boot_cpu_logical_apicid
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_CLUSTERED_APIC */
#define boot_cpu_apicid boot_cpu_physical_apicid
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
/*
* How to map from the cpu_present_map
*/
#ifdef CONFIG_MULTIQUAD
#ifdef CONFIG_CLUSTERED_APIC
#define cpu_present_to_apicid(mps_cpu) ( ((mps_cpu/4)*16) + (1<<(mps_cpu%4)) )
#else /* !CONFIG_MULTIQUAD */
#else /* !CONFIG_CLUSTERED_APIC */
#define cpu_present_to_apicid(apicid) (apicid)
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
/*
* Mappings between logical cpu number and logical / physical apicid
......@@ -45,18 +45,13 @@ extern volatile int cpu_2_physical_apicid[];
#define cpu_to_logical_apicid(cpu) cpu_2_logical_apicid[cpu]
#define physical_apicid_to_cpu(apicid) physical_apicid_2_cpu[apicid]
#define cpu_to_physical_apicid(cpu) cpu_2_physical_apicid[cpu]
#ifdef CONFIG_MULTIQUAD /* use logical IDs to bootstrap */
#ifdef CONFIG_CLUSTERED_APIC /* use logical IDs to bootstrap */
#define boot_apicid_to_cpu(apicid) logical_apicid_2_cpu[apicid]
#define cpu_to_boot_apicid(cpu) cpu_2_logical_apicid[cpu]
#else /* !CONFIG_MULTIQUAD */ /* use physical IDs to bootstrap */
#else /* !CONFIG_CLUSTERED_APIC */ /* use physical IDs to bootstrap */
#define boot_apicid_to_cpu(apicid) physical_apicid_2_cpu[apicid]
#define cpu_to_boot_apicid(cpu) cpu_2_physical_apicid[cpu]
#endif /* CONFIG_MULTIQUAD */
#ifdef CONFIG_MULTIQUAD
#else /* !CONFIG_MULTIQUAD */
#endif /* CONFIG_MULTIQUAD */
#endif /* CONFIG_CLUSTERED_APIC */
#endif
......@@ -30,7 +30,7 @@
#include <asm/uaccess.h>
#if defined(CONFIG_MULTIQUAD) || defined(CONFIG_IA64)
#if defined(CONFIG_X86_NUMAQ) || defined(CONFIG_IA64)
#define LOG_BUF_LEN (65536)
#elif defined(CONFIG_ARCH_S390)
#define LOG_BUF_LEN (131072)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment