Commit fb6c5037 authored by Maciej W. Rozycki's avatar Maciej W. Rozycki Committed by Sasha Levin

MIPS: Fix unaligned PC interpretation in `compute_return_epc'

[ Upstream commit 11a3799d ]

Fix a regression introduced with commit fb6883e5 ("MIPS: microMIPS:
Support handling of delay slots.") and defer to `__compute_return_epc'
if the ISA bit is set in EPC with non-MIPS16, non-microMIPS hardware,
which will then arrange for a SIGBUS due to an unaligned instruction
reference.  Returning EPC here is never correct as the API defines this
function's result to be either a negative error code on failure or one
of 0 and BRANCH_LIKELY_TAKEN on success.

Fixes: fb6883e5 ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: default avatarMaciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16395/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Signed-off-by: default avatarSasha Levin <alexander.levin@verizon.com>
parent 512a16d0
...@@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs) ...@@ -74,10 +74,7 @@ static inline int compute_return_epc(struct pt_regs *regs)
return __microMIPS_compute_return_epc(regs); return __microMIPS_compute_return_epc(regs);
if (cpu_has_mips16) if (cpu_has_mips16)
return __MIPS16e_compute_return_epc(regs); return __MIPS16e_compute_return_epc(regs);
return regs->cp0_epc; } else if (!delay_slot(regs)) {
}
if (!delay_slot(regs)) {
regs->cp0_epc += 4; regs->cp0_epc += 4;
return 0; return 0;
} }
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment