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Commit fc72053b authored by Linus Torvalds's avatar Linus Torvalds
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc 

Pull ARM SoC fixes and straggler patches from Olof Johansson:
 "A collection of fixes for fall out from 3.10 merge window, some build
  fixes and warning cleanups and a small handful of patches that were
  small and contained and made sense to still include in 3.10 (some of
  these have also been in -next since the merge window opened).

  Largest continous series is for OMAP, but there's a handful for other
  platforms.

  For i.MX, one of the patches are framebuffer fixups due to fallout
  during the merge window, and the other removes some stale and broken
  code."

* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: dts: Fixed vbus-gpios
  ARM: EXYNOS5: Fix kernel dump in AFTR idle mode
  ARM: ux500: Rid ignored return value of regulator_enable() compiler warning
  ARM: ux500: read the correct soc_id number
  ARM: exynos: dts: cros5250: add cyapa trackpad
  video: mxsfb: Adapt to new videomode API
  ARM: imx: Select GENERIC_ALLOCATOR
  ARM: imx: compile fix for hotplug.c
  ARM: dts: don't assume boards are using twl4030 for omap3
  ARM: OMAP2+: Remove bogus IS_ERR_OR_NULL checking from id.c
  ARM: dts: Configure and fix the McSPI pins for 4430sdp
  ARM: dts: AM33XX: Add GPMC node
  ARM: dts: OMAP4460: Fix CPU OPP voltages
  ARM: dts: OMAP36xx: Fix CPU OPP voltages
  ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as module
  ARM: OMAP2: AM33XX: id: Add support for new AM335x PG2.1 Si
  omap: mux: add AM/DM37x gpios
  ARM: OMAP1: DMA: fix error handling in omap1_system_dma_init()
  ARM: OMAP2+: omap_device: use late_initcall_sync
  ARM: OMAP: RX-51: change probe order of touchscreen and panel SPI devices
  ...
parents c61c48df c58c1a4c
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Showing with 173 additions and 235 deletions
Documentation/devicetree/bindings/mtd/gpmc-nand.txt
View file @ fc72053b
......@@ -56,20 +56,20 @@ Example for an AM33xx board:
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
gpmc,sync-clk = <0>;
gpmc,cs-on = <0>;
gpmc,cs-rd-off = <44>;
gpmc,cs-wr-off = <44>;
gpmc,adv-on = <6>;
gpmc,adv-rd-off = <34>;
gpmc,adv-wr-off = <44>;
gpmc,we-off = <40>;
gpmc,oe-off = <54>;
gpmc,access = <64>;
gpmc,rd-cycle = <82>;
gpmc,wr-cycle = <82>;
gpmc,wr-access = <40>;
gpmc,wr-data-mux-bus = <0>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-off-ns = <40>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
#address-cells = <1>;
#size-cells = <1>;
......
Documentation/devicetree/bindings/net/gpmc-eth.txt
View file @ fc72053b
......@@ -26,16 +26,16 @@ Required properties:
- bank-width: Address width of the device in bytes. GPMC supports 8-bit
and 16-bit devices and so must be either 1 or 2 bytes.
- compatible: Compatible string property for the ethernet child device.
- gpmc,cs-on: Chip-select assertion time
- gpmc,cs-rd-off: Chip-select de-assertion time for reads
- gpmc,cs-wr-off: Chip-select de-assertion time for writes
- gpmc,oe-on: Output-enable assertion time
- gpmc,oe-off Output-enable de-assertion time
- gpmc,we-on: Write-enable assertion time
- gpmc,we-off: Write-enable de-assertion time
- gpmc,access: Start cycle to first data capture (read access)
- gpmc,rd-cycle: Total read cycle time
- gpmc,wr-cycle: Total write cycle time
- gpmc,cs-on-ns: Chip-select assertion time
- gpmc,cs-rd-off-ns: Chip-select de-assertion time for reads
- gpmc,cs-wr-off-ns: Chip-select de-assertion time for writes
- gpmc,oe-on-ns: Output-enable assertion time
- gpmc,oe-off-ns: Output-enable de-assertion time
- gpmc,we-on-ns: Write-enable assertion time
- gpmc,we-off-ns: Write-enable de-assertion time
- gpmc,access-ns: Start cycle to first data capture (read access)
- gpmc,rd-cycle-ns: Total read cycle time
- gpmc,wr-cycle-ns: Total write cycle time
- reg: Chip-select, base address (relative to chip-select)
and size of the memory mapped for the device.
Note that base address will be typically 0 as this
......@@ -65,24 +65,24 @@ gpmc: gpmc@6e000000 {
bank-width = <2>;
gpmc,mux-add-data;
gpmc,cs-on = <0>;
gpmc,cs-rd-off = <186>;
gpmc,cs-wr-off = <186>;
gpmc,adv-on = <12>;
gpmc,adv-rd-off = <48>;
gpmc,adv-wr-off = <48>;
gpmc,oe-on = <54>;
gpmc,oe-off = <168>;
gpmc,we-on = <54>;
gpmc,we-off = <168>;
gpmc,rd-cycle = <186>;
gpmc,wr-cycle = <186>;
gpmc,access = <114>;
gpmc,page-burst-access = <6>;
gpmc,bus-turnaround = <12>;
gpmc,cycle2cycle-delay = <18>;
gpmc,wr-data-mux-bus = <90>;
gpmc,wr-access = <186>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <186>;
gpmc,cs-wr-off-ns = <186>;
gpmc,adv-on-ns = <12>;
gpmc,adv-rd-off-ns = <48>;
gpmc,adv-wr-off-ns = <48>;
gpmc,oe-on-ns = <54>;
gpmc,oe-off-ns = <168>;
gpmc,we-on-ns = <54>;
gpmc,we-off-ns = <168>;
gpmc,rd-cycle-ns = <186>;
gpmc,wr-cycle-ns = <186>;
gpmc,access-ns = <114>;
gpmc,page-burst-access-ns = <6>;
gpmc,bus-turnaround-ns = <12>;
gpmc,cycle2cycle-delay-ns = <18>;
gpmc,wr-data-mux-bus-ns = <90>;
gpmc,wr-access-ns = <186>;
gpmc,cycle2cycle-samecsen;
gpmc,cycle2cycle-diffcsen;
......
arch/arm/Kconfig
View file @ fc72053b
......@@ -897,7 +897,6 @@ config ARCH_MULTI_V7
bool "ARMv7 based platforms (Cortex-A, PJ4, Scorpion, Krait)"
default y
select ARCH_MULTI_V6_V7
select ARCH_VEXPRESS
select CPU_V7
config ARCH_MULTI_V6_V7
......
arch/arm/boot/dts/am33xx.dtsi
View file @ fc72053b
......@@ -403,5 +403,17 @@ wkup_m3: wkup_m3@44d00000 {
0x44d80000 0x2000>; /* M3 DMEM */
ti,hwmods = "wkup_m3";
};
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
reg = <0x50000000 0x2000>;
interrupts = <100>;
num-cs = <7>;
num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";
};
};
};
arch/arm/boot/dts/cros5250-common.dtsi
View file @ fc72053b
......@@ -175,6 +175,14 @@ buck8_reg: BUCK8 {
i2c@12C70000 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-max-bus-freq = <378000>;
trackpad {
reg = <0x67>;
compatible = "cypress,cyapa";
interrupts = <2 0>;
interrupt-parent = <&gpx1>;
wakeup-source;
};
};
i2c@12C80000 {
......
arch/arm/boot/dts/exynos5250-smdk5250.dts
View file @ fc72053b
......@@ -214,7 +214,7 @@ sound {
};
usb@12110000 {
samsung,vbus-gpio = <&gpx2 6 1 3 3>;
samsung,vbus-gpio = <&gpx2 6 0>;
};
dp-controller {
......
arch/arm/boot/dts/exynos5250-snow.dts
View file @ fc72053b
......@@ -183,7 +183,7 @@ slot@0 {
};
usb@12110000 {
samsung,vbus-gpio = <&gpx1 1 1 3 3>;
samsung,vbus-gpio = <&gpx1 1 0>;
};
fixed-rate-clocks {
......
arch/arm/boot/dts/omap3-beagle-xm.dts
View file @ fc72053b
......@@ -122,6 +122,7 @@ &twl_gpio {
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
arch/arm/boot/dts/omap3-evm.dts
View file @ fc72053b
......@@ -68,6 +68,7 @@ &twl_gpio {
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
arch/arm/boot/dts/omap3-overo.dtsi
View file @ fc72053b
......@@ -73,6 +73,7 @@ &twl_gpio {
&usb_otg_hs {
interface-type = <0>;
usb-phy = <&usb2_phy>;
mode = <3>;
power = <50>;
};
arch/arm/boot/dts/omap3.dtsi
View file @ fc72053b
......@@ -519,7 +519,6 @@ usb_otg_hs: usb_otg_hs@480ab000 {
interrupts = <0 92 0x4>, <0 93 0x4>;
interrupt-names = "mc", "dma";
ti,hwmods = "usb_otg_hs";
usb-phy = <&usb2_phy>;
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
......
arch/arm/boot/dts/omap36xx.dtsi
View file @ fc72053b
......@@ -20,9 +20,9 @@ cpus {
cpu@0 {
operating-points = <
/* kHz uV */
300000 975000
600000 1075000
800000 1200000
300000 1012500
600000 1200000
800000 1325000
>;
clock-latency = <300000>; /* From legacy driver */
};
......
arch/arm/boot/dts/omap4-sdp.dts
View file @ fc72053b
......@@ -223,6 +223,15 @@ mcbsp2_pins: pinmux_mcbsp2_pins {
>;
};
mcspi1_pins: pinmux_mcspi1_pins {
pinctrl-single,pins = <
0xf2 0x100 /* mcspi1_clk.mcspi1_clk INPUT | MODE0 */
0xf4 0x100 /* mcspi1_somi.mcspi1_somi INPUT | MODE0 */
0xf6 0x100 /* mcspi1_simo.mcspi1_simo INPUT | MODE0 */
0xf8 0x100 /* mcspi1_cs0.mcspi1_cs0 INPUT | MODE0*/
>;
};
dss_hdmi_pins: pinmux_dss_hdmi_pins {
pinctrl-single,pins = <
0x5a 0x118 /* hdmi_cec.hdmi_cec INPUT PULLUP | MODE 0 */
......@@ -358,12 +367,15 @@ hmc5843@1e {
};
&mcspi1 {
pinctrl-names = "default";
pinctrl-0 = <&mcspi1_pins>;
eth@0 {
compatible = "ks8851";
spi-max-frequency = <24000000>;
reg = <0>;
interrupt-parent = <&gpio2>;
interrupts = <2>; /* gpio line 34 */
interrupts = <2 8>; /* gpio line 34, low triggered */
vdd-supply = <&vdd_eth>;
};
};
......
arch/arm/boot/dts/omap4-var-som.dts
View file @ fc72053b
......@@ -68,7 +68,7 @@ eth@0 {
spi-max-frequency = <24000000>;
reg = <0>;
interrupt-parent = <&gpio6>;
interrupts = <11>; /* gpio line 171 */
interrupts = <11 8>; /* gpio line 171, low triggered */
vdd-supply = <&vdd_eth>;
};
};
......
arch/arm/boot/dts/omap4460.dtsi
View file @ fc72053b
......@@ -15,9 +15,9 @@ cpus {
cpu@0 {
operating-points = <
/* kHz uV */
350000 975000
700000 1075000
920000 1200000
350000 1025000
700000 1200000
920000 1313000
>;
clock-latency = <300000>; /* From legacy driver */
};
......
arch/arm/configs/omap2plus_defconfig
View file @ fc72053b
......@@ -137,6 +137,8 @@ CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_OMAP=y
CONFIG_SERIAL_OMAP_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C_CHARDEV=y
CONFIG_SPI=y
......@@ -153,6 +155,7 @@ CONFIG_OMAP_WATCHDOG=y
CONFIG_TWL4030_WATCHDOG=y
CONFIG_MFD_TPS65217=y
CONFIG_MFD_TPS65910=y
CONFIG_TWL6040_CORE=y
CONFIG_REGULATOR_TWL4030=y
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
......@@ -195,6 +198,7 @@ CONFIG_SND_USB_AUDIO=m
CONFIG_SND_SOC=m
CONFIG_SND_OMAP_SOC=m
CONFIG_SND_OMAP_SOC_OMAP_TWL4030=m
CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040=m
CONFIG_SND_OMAP_SOC_OMAP3_PANDORA=m
CONFIG_USB=y
CONFIG_USB_DEBUG=y
......
arch/arm/kernel/devtree.c
View file @ fc72053b
......@@ -180,6 +180,13 @@ struct machine_desc * __init setup_machine_fdt(unsigned int dt_phys)
unsigned long dt_root;
const char *model;
#ifdef CONFIG_ARCH_MULTIPLATFORM
DT_MACHINE_START(GENERIC_DT, "Generic DT based system")
MACHINE_END
mdesc_best = (struct machine_desc *)&__mach_desc_GENERIC_DT;
#endif
if (!dt_phys)
return NULL;
......
arch/arm/kernel/setup.c
View file @ fc72053b
......@@ -18,6 +18,7 @@
#include <linux/bootmem.h>
#include <linux/seq_file.h>
#include <linux/screen_info.h>
#include <linux/of_platform.h>
#include <linux/init.h>
#include <linux/kexec.h>
#include <linux/of_fdt.h>
......@@ -659,9 +660,19 @@ struct screen_info screen_info = {
static int __init customize_machine(void)
{
/* customizes platform devices, or adds new ones */
/*
* customizes platform devices, or adds new ones
* On DT based machines, we fall back to populating the
* machine from the device tree, if no callback is provided,
* otherwise we would always need an init_machine callback.
*/
if (machine_desc->init_machine)
machine_desc->init_machine();
#ifdef CONFIG_OF
else
of_platform_populate(NULL, of_default_bus_match_table,
NULL, NULL);
#endif
return 0;
}
arch_initcall(customize_machine);
......
arch/arm/mach-exynos/include/mach/regs-pmu.h
View file @ fc72053b
......@@ -344,6 +344,7 @@
#define EXYNOS5_FSYS_ARM_OPTION S5P_PMUREG(0x2208)
#define EXYNOS5_ISP_ARM_OPTION S5P_PMUREG(0x2288)
#define EXYNOS5_ARM_COMMON_OPTION S5P_PMUREG(0x2408)
#define EXYNOS5_ARM_L2_OPTION S5P_PMUREG(0x2608)
#define EXYNOS5_TOP_PWR_OPTION S5P_PMUREG(0x2C48)
#define EXYNOS5_TOP_PWR_SYSMEM_OPTION S5P_PMUREG(0x2CC8)
#define EXYNOS5_JPEG_MEM_OPTION S5P_PMUREG(0x2F48)
......
arch/arm/mach-exynos/pmu.c
View file @ fc72053b
......@@ -228,6 +228,7 @@ static struct exynos_pmu_conf exynos5250_pmu_config[] = {
{ EXYNOS5_DIS_IRQ_ISP_ARM_CENTRAL_SYS_PWR_REG, { 0x0, 0x0, 0x0} },
{ EXYNOS5_ARM_COMMON_SYS_PWR_REG, { 0x0, 0x0, 0x2} },
{ EXYNOS5_ARM_L2_SYS_PWR_REG, { 0x3, 0x3, 0x3} },
{ EXYNOS5_ARM_L2_OPTION, { 0x10, 0x10, 0x0 } },
{ EXYNOS5_CMU_ACLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
{ EXYNOS5_CMU_SCLKSTOP_SYS_PWR_REG, { 0x1, 0x0, 0x1} },
{ EXYNOS5_CMU_RESET_SYS_PWR_REG, { 0x1, 0x1, 0x0} },
......@@ -353,11 +354,9 @@ static void exynos5_init_pmu(void)
/*
* SKIP_DEACTIVATE_ACEACP_IN_PWDN_BITFIELD Enable
* MANUAL_L2RSTDISABLE_CONTROL_BITFIELD Enable
*/
tmp = __raw_readl(EXYNOS5_ARM_COMMON_OPTION);
tmp |= (EXYNOS5_MANUAL_L2RSTDISABLE_CONTROL |
EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN);
tmp |= EXYNOS5_SKIP_DEACTIVATE_ACEACP_IN_PWDN;
__raw_writel(tmp, EXYNOS5_ARM_COMMON_OPTION);
/*
......
arch/arm/mach-imx/Kconfig
View file @ fc72053b
......@@ -5,6 +5,7 @@ config ARCH_MXC
select AUTO_ZRELADDR if !ZBOOT_ROM
select CLKDEV_LOOKUP
select CLKSRC_MMIO
select GENERIC_ALLOCATOR
select GENERIC_CLOCKEVENTS
select GENERIC_IRQ_CHIP
select MULTI_IRQ_HANDLER
......@@ -61,10 +62,6 @@ config MXC_ULPI
config ARCH_HAS_RNGA
bool
config IRAM_ALLOC
bool
select GENERIC_ALLOCATOR
config HAVE_IMX_ANATOP
bool
......
arch/arm/mach-imx/Makefile
View file @ fc72053b
......@@ -23,7 +23,6 @@ obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
obj-$(CONFIG_MXC_TZIC) += tzic.o
obj-$(CONFIG_MXC_AVIC) += avic.o
obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
obj-$(CONFIG_MXC_ULPI) += ulpi.o
obj-$(CONFIG_MXC_USE_EPIT) += epit.o
obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
......
arch/arm/mach-imx/common.h
View file @ fc72053b
......@@ -12,6 +12,7 @@
#define __ASM_ARCH_MXC_COMMON_H__
struct platform_device;
struct pt_regs;
struct clk;
enum mxc_cpu_pwr_mode;
......
arch/arm/mach-imx/headsmp.S
View file @ fc72053b
......@@ -24,7 +24,7 @@ ENTRY(v7_secondary_startup)
ENDPROC(v7_secondary_startup)
#endif
#ifdef CONFIG_PM
#ifdef CONFIG_ARM_CPU_SUSPEND
/*
* The following code must assume it is running from physical address
* where absolute virtual addresses to the data section have to be
......
arch/arm/mach-imx/hotplug.c
View file @ fc72053b
......@@ -11,7 +11,9 @@
*/
#include <linux/errno.h>
#include <linux/jiffies.h>
#include <asm/cp15.h>
#include <asm/proc-fns.h>
#include "common.h"
......
arch/arm/mach-imx/iram_alloc.c deleted 100644 → 0
View file @ c61c48df
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/kernel.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/spinlock.h>
#include <linux/genalloc.h>
#include "linux/platform_data/imx-iram.h"
static unsigned long iram_phys_base;
static void __iomem *iram_virt_base;
static struct gen_pool *iram_pool;
static inline void __iomem *iram_phys_to_virt(unsigned long p)
{
return iram_virt_base + (p - iram_phys_base);
}
void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr)
{
if (!iram_pool)
return NULL;
*dma_addr = gen_pool_alloc(iram_pool, size);
pr_debug("iram alloc - %dB@0x%lX\n", size, *dma_addr);
if (!*dma_addr)
return NULL;
return iram_phys_to_virt(*dma_addr);
}
EXPORT_SYMBOL(iram_alloc);
void iram_free(unsigned long addr, unsigned int size)
{
if (!iram_pool)
return;
gen_pool_free(iram_pool, addr, size);
}
EXPORT_SYMBOL(iram_free);
int __init iram_init(unsigned long base, unsigned long size)
{
iram_phys_base = base;
iram_pool = gen_pool_create(PAGE_SHIFT, -1);
if (!iram_pool)
return -ENOMEM;
gen_pool_add(iram_pool, base, size, -1);
iram_virt_base = ioremap(iram_phys_base, size);
if (!iram_virt_base)
return -EIO;
pr_debug("i.MX IRAM pool: %ld KB@0x%p\n", size / 1024, iram_virt_base);
return 0;
}
arch/arm/mach-omap1/dma.c
View file @ fc72053b
......@@ -301,7 +301,7 @@ static int __init omap1_system_dma_init(void)
if (ret) {
dev_err(&pdev->dev, "%s: Unable to add resources for %s%d\n",
__func__, pdev->name, pdev->id);
goto exit_device_put;
goto exit_iounmap;
}
p = kzalloc(sizeof(struct omap_system_dma_plat_info), GFP_KERNEL);
......@@ -309,7 +309,7 @@ static int __init omap1_system_dma_init(void)
dev_err(&pdev->dev, "%s: Unable to allocate 'p' for %s\n",
__func__, pdev->name);
ret = -ENOMEM;
goto exit_device_del;
goto exit_iounmap;
}
d = kzalloc(sizeof(struct omap_dma_dev_attr), GFP_KERNEL);
......@@ -402,8 +402,8 @@ static int __init omap1_system_dma_init(void)
kfree(d);
exit_release_p:
kfree(p);
exit_device_del:
platform_device_del(pdev);
exit_iounmap:
iounmap(dma_base);
exit_device_put:
platform_device_put(pdev);
......
arch/arm/mach-omap2/Kconfig
View file @ fc72053b
......@@ -37,8 +37,6 @@ config ARCH_OMAP2PLUS_TYPICAL
select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
select PM_RUNTIME
select REGULATOR
select SERIAL_OMAP
select SERIAL_OMAP_CONSOLE
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
select VFP
......
arch/arm/mach-omap2/Makefile
View file @ fc72053b
......@@ -32,12 +32,12 @@ obj-$(CONFIG_SOC_HAS_OMAP2_SDRC) += sdrc.o
# SMP support ONLY available for OMAP4
obj-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
smp-$(CONFIG_SMP) += omap-smp.o omap-headsmp.o
smp-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o
omap-4-5-common = omap4-common.o omap-wakeupgen.o \
sleep44xx.o
obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common)
obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common)
obj-$(CONFIG_ARCH_OMAP4) += $(omap-4-5-common) $(smp-y)
obj-$(CONFIG_SOC_OMAP5) += $(omap-4-5-common) $(smp-y)
plus_sec := $(call as-instr,.arch_extension sec,+sec)
AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a$(plus_sec)
......
arch/arm/mach-omap2/board-omap3beagle.c
View file @ fc72053b
......@@ -112,13 +112,13 @@ static u8 omap3_beagle_version;
*/
static struct {
int mmc1_gpio_wp;
int usb_pwr_level;
bool usb_pwr_level; /* 0 - Active Low, 1 - Active High */
int dvi_pd_gpio;
int usr_button_gpio;
int mmc_caps;
} beagle_config = {
.mmc1_gpio_wp = -EINVAL,
.usb_pwr_level = GPIOF_OUT_INIT_LOW,
.usb_pwr_level = 0,
.dvi_pd_gpio = -EINVAL,
.usr_button_gpio = 4,
.mmc_caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
......@@ -178,7 +178,7 @@ static void __init omap3_beagle_init_rev(void)
case 0:
printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n");
omap3_beagle_version = OMAP3BEAGLE_BOARD_XM;
beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH;
beagle_config.usb_pwr_level = 1;
beagle_config.mmc_caps &= ~MMC_CAP_8_BIT_DATA;
break;
case 2:
......
arch/arm/mach-omap2/board-rx51-peripherals.c
View file @ fc72053b
......@@ -73,11 +73,11 @@
#define LIS302_IRQ1_GPIO 181
#define LIS302_IRQ2_GPIO 180 /* Not yet in use */
/* list all spi devices here */
/* List all SPI devices here. Note that the list/probe order seems to matter! */
enum {
RX51_SPI_WL1251,
RX51_SPI_MIPID, /* LCD panel */
RX51_SPI_TSC2005, /* Touch Controller */
RX51_SPI_MIPID, /* LCD panel */
};
static struct wl12xx_platform_data wl1251_pdata;
......
arch/arm/mach-omap2/gpmc.c
View file @ fc72053b
......@@ -1520,36 +1520,22 @@ static int gpmc_probe_dt(struct platform_device *pdev)
return ret;
}
for_each_node_by_name(child, "nand") {
ret = gpmc_probe_nand_child(pdev, child);
if (ret < 0) {
of_node_put(child);
return ret;
}
}
for_each_child_of_node(pdev->dev.of_node, child) {
for_each_node_by_name(child, "onenand") {
ret = gpmc_probe_onenand_child(pdev, child);
if (ret < 0) {
of_node_put(child);
return ret;
}
}
if (!child->name)
continue;
for_each_node_by_name(child, "nor") {
ret = gpmc_probe_generic_child(pdev, child);
if (ret < 0) {
of_node_put(child);
return ret;
}
}
if (of_node_cmp(child->name, "nand") == 0)
ret = gpmc_probe_nand_child(pdev, child);
else if (of_node_cmp(child->name, "onenand") == 0)
ret = gpmc_probe_onenand_child(pdev, child);
else if (of_node_cmp(child->name, "ethernet") == 0 ||
of_node_cmp(child->name, "nor") == 0)
ret = gpmc_probe_generic_child(pdev, child);
for_each_node_by_name(child, "ethernet") {
ret = gpmc_probe_generic_child(pdev, child);
if (ret < 0) {
if (WARN(ret < 0, "%s: probing gpmc child %s failed\n",
__func__, child->full_name))
of_node_put(child);
return ret;
}
}
return 0;
......
arch/arm/mach-omap2/id.c
View file @ fc72053b
......@@ -419,11 +419,15 @@ void __init omap3xxx_check_revision(void)
cpu_rev = "1.0";
break;
case 1:
/* FALLTHROUGH */
default:
omap_revision = AM335X_REV_ES2_0;
cpu_rev = "2.0";
break;
case 2:
/* FALLTHROUGH */
default:
omap_revision = AM335X_REV_ES2_1;
cpu_rev = "2.1";
break;
}
break;
case 0xb8f2:
......@@ -644,13 +648,12 @@ void __init omap_soc_device_init(void)
soc_dev_attr->revision = soc_rev;
soc_dev = soc_device_register(soc_dev_attr);
if (IS_ERR_OR_NULL(soc_dev)) {
if (IS_ERR(soc_dev)) {
kfree(soc_dev_attr);
return;
}
parent = soc_device_to_device(soc_dev);
if (!IS_ERR_OR_NULL(parent))
device_create_file(parent, &omap_soc_attr);
device_create_file(parent, &omap_soc_attr);
}
#endif /* CONFIG_SOC_BUS */
arch/arm/mach-omap2/mux34xx.h
View file @ fc72053b
......@@ -393,6 +393,10 @@
#define OMAP3_CONTROL_PADCONF_SAD2D_SWAKEUP_OFFSET 0xa1c
#define OMAP3_CONTROL_PADCONF_JTAG_RTCK_OFFSET 0xa1e
#define OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET 0xa20
#define OMAP3_CONTROL_PADCONF_GPIO_127 0xa24
#define OMAP3_CONTROL_PADCONF_GPIO_126 0xa26
#define OMAP3_CONTROL_PADCONF_GPIO_128 0xa28
#define OMAP3_CONTROL_PADCONF_GPIO_129 0xa2a
#define OMAP3_CONTROL_PADCONF_MUX_SIZE \
(OMAP3_CONTROL_PADCONF_JTAG_TDO_OFFSET + 0x2)
(OMAP3_CONTROL_PADCONF_GPIO_129 + 0x2)
arch/arm/mach-omap2/omap_device.c
View file @ fc72053b
......@@ -876,4 +876,4 @@ static int __init omap_device_late_init(void)
bus_for_each_dev(&platform_bus_type, NULL, NULL, omap_device_late_idle);
return 0;
}
omap_late_initcall(omap_device_late_init);
omap_late_initcall_sync(omap_device_late_init);
arch/arm/mach-omap2/soc.h
View file @ fc72053b
......@@ -396,6 +396,7 @@ IS_OMAP_TYPE(3430, 0x3430)
#define AM335X_CLASS 0x33500033
#define AM335X_REV_ES1_0 AM335X_CLASS
#define AM335X_REV_ES2_0 (AM335X_CLASS | (0x1 << 8))
#define AM335X_REV_ES2_1 (AM335X_CLASS | (0x2 << 8))
#define OMAP443X_CLASS 0x44300044
#define OMAP4430_REV_ES1_0 (OMAP443X_CLASS | (0x10 << 8))
......@@ -496,6 +497,7 @@ level(__##fn);
#define omap_subsys_initcall(fn) omap_initcall(subsys_initcall, fn)
#define omap_device_initcall(fn) omap_initcall(device_initcall, fn)
#define omap_late_initcall(fn) omap_initcall(late_initcall, fn)
#define omap_late_initcall_sync(fn) omap_initcall(late_initcall_sync, fn)
#endif /* __ASSEMBLY__ */
arch/arm/mach-prima2/Kconfig
View file @ fc72053b
......@@ -38,7 +38,7 @@ config ARCH_MARCO
select CPU_V7
select HAVE_ARM_SCU if SMP
select HAVE_SMP
select SMP_ON_UP
select SMP_ON_UP if SMP
help
Support for CSR SiRFSoC ARM Cortex A9 Platform
......
arch/arm/mach-spear/spear13xx.c
View file @ fc72053b
......@@ -35,6 +35,8 @@ void __init spear13xx_l2x0_init(void)
* write alloc and 'Full line of zero' options
*
*/
if (!IS_ENABLED(CONFIG_CACHE_L2X0))
return;
writel_relaxed(0x06, VA_L2CC_BASE + L2X0_PREFETCH_CTRL);
......
arch/arm/mach-tegra/Kconfig
View file @ fc72053b
......@@ -63,6 +63,7 @@ config ARCH_TEGRA_114_SOC
select ARM_ARCH_TIMER
select ARM_GIC
select ARM_L1_CACHE_SHIFT_6
select CPU_FREQ_TABLE if CPU_FREQ
select CPU_V7
select PINCTRL
select PINCTRL_TEGRA114
......
arch/arm/mach-ux500/Kconfig
View file @ fc72053b
......@@ -19,6 +19,8 @@ if ARCH_U8500
config UX500_SOC_COMMON
bool
default y
select ABX500_CORE
select AB8500_CORE
select ARM_ERRATA_754322
select ARM_ERRATA_764369 if SMP
select ARM_GIC
......
arch/arm/mach-ux500/board-mop500.c
View file @ fc72053b
......@@ -403,8 +403,8 @@ static int mop500_prox_activate(struct device *dev)
"no regulator\n");
return PTR_ERR(prox_regulator);
}
regulator_enable(prox_regulator);
return 0;
return regulator_enable(prox_regulator);
}
static void mop500_prox_deactivate(struct device *dev)
......
arch/arm/mach-ux500/cpu-db8500.c
View file @ fc72053b
......@@ -191,7 +191,7 @@ static const char *db8500_read_soc_id(void)
/* Throw these device-specific numbers into the entropy pool */
add_device_randomness(uid, 0x14);
return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
readl((u32 *)uid+1),
readl((u32 *)uid+0),
readl((u32 *)uid+1), readl((u32 *)uid+2),
readl((u32 *)uid+3), readl((u32 *)uid+4));
}
......
drivers/video/Kconfig
View file @ fc72053b
......@@ -2429,7 +2429,7 @@ config FB_MXS
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
select FB_MODE_HELPERS
select OF_VIDEOMODE
select VIDEOMODE_HELPERS
help
Framebuffer support for the MXS SoC.
......
drivers/video/mxsfb.c
View file @ fc72053b
......@@ -42,7 +42,6 @@
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/of_device.h>
#include <video/of_display_timing.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/dma-mapping.h>
......@@ -50,6 +49,7 @@
#include <linux/pinctrl/consumer.h>
#include <linux/fb.h>
#include <linux/regulator/consumer.h>
#include <video/of_display_timing.h>
#include <video/videomode.h>
#define REG_SET 4
......@@ -777,16 +777,16 @@ static int mxsfb_init_fbinfo_dt(struct mxsfb_info *host)
struct videomode vm;
struct fb_videomode fb_vm;
ret = videomode_from_timing(timings, &vm, i);
ret = videomode_from_timings(timings, &vm, i);
if (ret < 0)
goto put_timings_node;
ret = fb_videomode_from_videomode(&vm, &fb_vm);
if (ret < 0)
goto put_timings_node;
if (vm.data_flags & DISPLAY_FLAGS_DE_HIGH)
if (vm.flags & DISPLAY_FLAGS_DE_HIGH)
host->sync |= MXSFB_SYNC_DATA_ENABLE_HIGH_ACT;
if (vm.data_flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
if (vm.flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
host->sync |= MXSFB_SYNC_DOTCLK_FALLING_ACT;
fb_add_videomode(&fb_vm, &fb_info->modelist);
}
......
include/linux/platform_data/imx-iram.h deleted 100644 → 0
View file @ c61c48df
/*
* Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/errno.h>
#ifdef CONFIG_IRAM_ALLOC
int __init iram_init(unsigned long base, unsigned long size);
void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr);
void iram_free(unsigned long dma_addr, unsigned int size);
#else
static inline int __init iram_init(unsigned long base, unsigned long size)
{
return -ENOMEM;
}
static inline void __iomem *iram_alloc(unsigned int size, unsigned long *dma_addr)
{
return NULL;
}
static inline void iram_free(unsigned long base, unsigned long size) {}
#endif
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