Commit fc7c0be0 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'arm-soc/for-4.8/soc-arm64-part2' of http://github.com/Broadcom/stblinux into next/arm64

Merge "Broadcom ARM64-based SoC changes for 4.8 second part" from Florian Fainelli:

- Eric updates the bcm2836 interrupt controller driver not to rely on ARM/Linux specific functions
  in preparation for using it on ARM64

- Eric also adds a Kconfig entry for the BCM2835 Raspberry Pi family in the ARM64 Kconfig.platforms
  file

- Eric cherry picked a patch from Alexander Graf with Acks from ARM64 maintainers to support different
  DMA and bus offsets, required for the Raspberry Pi 3 SoC

* tag 'arm-soc/for-4.8/soc-arm64-part2' of http://github.com/Broadcom/stblinux:
  arm64: Add platform selection for BCM2835.
  arm64: Allow for different DMA and CPU bus offsets
  irqchip: bcm2835: Avoid arch/arm-specific handle_IRQ
parents 623149b0 c4c0e260
......@@ -13,6 +13,19 @@ config ARCH_ALPINE
This enables support for the Annapurna Labs Alpine
Soc family.
config ARCH_BCM2835
bool "Broadcom BCM2835 family"
select ARCH_REQUIRE_GPIOLIB
select CLKSRC_OF
select PINCTRL
select PINCTRL_BCM2835
select ARM_AMBA
select ARM_TIMER_SP804
select HAVE_ARM_ARCH_TIMER
help
This enables support for the Broadcom BCM2837 SoC.
This SoC is used in the Raspberry Pi 3 device.
config ARCH_BCM_IPROC
bool "Broadcom iProc SoC Family"
select COMMON_CLK_IPROC
......
......@@ -66,12 +66,16 @@ static inline bool is_device_dma_coherent(struct device *dev)
static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
{
return (dma_addr_t)paddr;
dma_addr_t dev_addr = (dma_addr_t)paddr;
return dev_addr - ((dma_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
}
static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t dev_addr)
{
return (phys_addr_t)dev_addr;
phys_addr_t paddr = (phys_addr_t)dev_addr;
return paddr + ((phys_addr_t)dev->dma_pfn_offset << PAGE_SHIFT);
}
static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
......@@ -86,5 +90,14 @@ static inline void dma_mark_clean(void *addr, size_t size)
{
}
/* Override for dma_max_pfn() */
static inline unsigned long dma_max_pfn(struct device *dev)
{
dma_addr_t dma_max = (dma_addr_t)*dev->dma_mask;
return (ulong)dma_to_phys(dev, dma_max) >> PAGE_SHIFT;
}
#define dma_max_pfn(dev) dma_max_pfn(dev)
#endif /* __KERNEL__ */
#endif /* __ASM_DMA_MAPPING_H */
......@@ -52,7 +52,6 @@
#include <linux/irqdomain.h>
#include <asm/exception.h>
#include <asm/mach/irq.h>
/* Put the bank and irq (32 bits) into the hwirq */
#define MAKE_HWIRQ(b, n) ((b << 5) | (n))
......@@ -242,7 +241,7 @@ static void __exception_irq_entry bcm2835_handle_irq(
u32 hwirq;
while ((hwirq = get_next_armctrl_hwirq()) != ~0)
handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs);
handle_domain_irq(intc.domain, hwirq, regs);
}
static void bcm2836_chained_handle_irq(struct irq_desc *desc)
......
......@@ -180,7 +180,7 @@ __exception_irq_entry bcm2836_arm_irqchip_handle_irq(struct pt_regs *regs)
} else if (stat) {
u32 hwirq = ffs(stat) - 1;
handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs);
handle_domain_irq(intc.domain, hwirq, regs);
}
}
......
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