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Kirill Smelkov
linux
Commits
fdc07cc1
Commit
fdc07cc1
authored
Sep 27, 2013
by
Linus Walleij
Browse files
Options
Browse Files
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Plain Diff
Merge branch 'pinmux/next' of
git://linuxtv.org/pinchartl/fbdev
into devel
parents
6090e9a6
f6aaaac9
Changes
4
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Showing
4 changed files
with
239 additions
and
5 deletions
+239
-5
drivers/pinctrl/pinconf.c
drivers/pinctrl/pinconf.c
+2
-2
drivers/pinctrl/pinctrl-tegra114.c
drivers/pinctrl/pinctrl-tegra114.c
+2
-3
drivers/pinctrl/sh-pfc/pfc-r8a7778.c
drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+125
-0
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+110
-0
No files found.
drivers/pinctrl/pinconf.c
View file @
fdc07cc1
...
...
@@ -490,7 +490,7 @@ static int pinconf_dbg_config_print(struct seq_file *s, void *d)
* <devicename> <state> <pinname> are values that should match the pinctrl-maps
* <newvalue> reflects the new config and is driver dependant
*/
static
in
t
pinconf_dbg_config_write
(
struct
file
*
file
,
static
ssize_
t
pinconf_dbg_config_write
(
struct
file
*
file
,
const
char
__user
*
user_buf
,
size_t
count
,
loff_t
*
ppos
)
{
struct
pinctrl_maps
*
maps_node
;
...
...
@@ -508,7 +508,7 @@ static int pinconf_dbg_config_write(struct file *file,
int
i
;
/* Get userspace string and assure termination */
buf_size
=
min
(
count
,
(
size_t
)(
sizeof
(
buf
)
-
1
)
);
buf_size
=
min
(
count
,
sizeof
(
buf
)
-
1
);
if
(
copy_from_user
(
buf
,
user_buf
,
buf_size
))
return
-
EFAULT
;
buf
[
buf_size
]
=
0
;
...
...
drivers/pinctrl/pinctrl-tegra114.c
View file @
fdc07cc1
...
...
@@ -3,7 +3,7 @@
*
* Copyright (c) 2012-2013, NVIDIA CORPORATION. All rights reserved.
*
* A
rthu
r: Pritesh Raithatha <praithatha@nvidia.com>
* A
utho
r: Pritesh Raithatha <praithatha@nvidia.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,
...
...
@@ -2763,7 +2763,6 @@ static struct platform_driver tegra114_pinctrl_driver = {
};
module_platform_driver
(
tegra114_pinctrl_driver
);
MODULE_ALIAS
(
"platform:tegra114-pinctrl"
);
MODULE_AUTHOR
(
"Pritesh Raithatha <praithatha@nvidia.com>"
);
MODULE_DESCRIPTION
(
"NVIDIA Tegra114 pinc
ontro
l driver"
);
MODULE_DESCRIPTION
(
"NVIDIA Tegra114 pinc
tr
l driver"
);
MODULE_LICENSE
(
"GPL v2"
);
drivers/pinctrl/sh-pfc/pfc-r8a7778.c
View file @
fdc07cc1
...
...
@@ -1288,6 +1288,22 @@ static struct sh_pfc_pin pinmux_pins[] = {
arg5##_MARK, arg6##_MARK, \
arg7##_MARK, arg8##_MARK, }
/* - AUDIO macro -------------------------------------------------------------*/
#define AUDIO_PFC_PIN(name, pin) SH_PFC_PINS(name, pin)
#define AUDIO_PFC_DAT(name, pin) SH_PFC_MUX1(name, pin)
/* - AUDIO clock -------------------------------------------------------------*/
AUDIO_PFC_PIN
(
audio_clk_a
,
RCAR_GP_PIN
(
2
,
22
));
AUDIO_PFC_DAT
(
audio_clk_a
,
AUDIO_CLKA
);
AUDIO_PFC_PIN
(
audio_clk_b
,
RCAR_GP_PIN
(
2
,
23
));
AUDIO_PFC_DAT
(
audio_clk_b
,
AUDIO_CLKB
);
AUDIO_PFC_PIN
(
audio_clk_c
,
RCAR_GP_PIN
(
2
,
7
));
AUDIO_PFC_DAT
(
audio_clk_c
,
AUDIO_CLKC
);
AUDIO_PFC_PIN
(
audio_clkout_a
,
RCAR_GP_PIN
(
2
,
16
));
AUDIO_PFC_DAT
(
audio_clkout_a
,
AUDIO_CLKOUT_A
);
AUDIO_PFC_PIN
(
audio_clkout_b
,
RCAR_GP_PIN
(
1
,
16
));
AUDIO_PFC_DAT
(
audio_clkout_b
,
AUDIO_CLKOUT_B
);
/* - Ether ------------------------------------------------------------------ */
SH_PFC_PINS
(
ether_rmii
,
RCAR_GP_PIN
(
4
,
10
),
RCAR_GP_PIN
(
4
,
11
),
RCAR_GP_PIN
(
4
,
13
),
RCAR_GP_PIN
(
4
,
9
),
...
...
@@ -1577,6 +1593,59 @@ SDHI_PFC_WPPN(sdhi2_wp_a, SD2_WP_A);
SDHI_PFC_PINS
(
sdhi2_wp_b
,
RCAR_GP_PIN
(
3
,
28
));
SDHI_PFC_WPPN
(
sdhi2_wp_b
,
SD2_WP_B
);
/* - SSI macro -------------------------------------------------------------- */
#define SSI_PFC_PINS(name, args...) SH_PFC_PINS(name, args)
#define SSI_PFC_CTRL(name, sck, ws) SH_PFC_MUX2(name, sck, ws)
#define SSI_PFC_DATA(name, d) SH_PFC_MUX1(name, d)
/* - SSI 0/1/2 -------------------------------------------------------------- */
SSI_PFC_PINS
(
ssi012_ctrl
,
RCAR_GP_PIN
(
3
,
6
),
RCAR_GP_PIN
(
3
,
7
));
SSI_PFC_CTRL
(
ssi012_ctrl
,
SSI_SCK012
,
SSI_WS012
);
SSI_PFC_PINS
(
ssi0_data
,
RCAR_GP_PIN
(
3
,
10
));
SSI_PFC_DATA
(
ssi0_data
,
SSI_SDATA0
);
SSI_PFC_PINS
(
ssi1_a_ctrl
,
RCAR_GP_PIN
(
2
,
20
),
RCAR_GP_PIN
(
2
,
21
));
SSI_PFC_CTRL
(
ssi1_a_ctrl
,
SSI_SCK1_A
,
SSI_WS1_A
);
SSI_PFC_PINS
(
ssi1_b_ctrl
,
PIN_NUMBER
(
3
,
20
),
RCAR_GP_PIN
(
1
,
3
));
SSI_PFC_CTRL
(
ssi1_b_ctrl
,
SSI_SCK1_B
,
SSI_WS1_B
);
SSI_PFC_PINS
(
ssi1_data
,
RCAR_GP_PIN
(
3
,
9
));
SSI_PFC_DATA
(
ssi1_data
,
SSI_SDATA1
);
SSI_PFC_PINS
(
ssi2_a_ctrl
,
RCAR_GP_PIN
(
2
,
26
),
RCAR_GP_PIN
(
3
,
4
));
SSI_PFC_CTRL
(
ssi2_a_ctrl
,
SSI_SCK2_A
,
SSI_WS2_A
);
SSI_PFC_PINS
(
ssi2_b_ctrl
,
RCAR_GP_PIN
(
2
,
6
),
RCAR_GP_PIN
(
2
,
17
));
SSI_PFC_CTRL
(
ssi2_b_ctrl
,
SSI_SCK2_B
,
SSI_WS2_B
);
SSI_PFC_PINS
(
ssi2_data
,
RCAR_GP_PIN
(
3
,
8
));
SSI_PFC_DATA
(
ssi2_data
,
SSI_SDATA2
);
/* - SSI 3/4 ---------------------------------------------------------------- */
SSI_PFC_PINS
(
ssi34_ctrl
,
RCAR_GP_PIN
(
3
,
2
),
RCAR_GP_PIN
(
3
,
3
));
SSI_PFC_CTRL
(
ssi34_ctrl
,
SSI_SCK34
,
SSI_WS34
);
SSI_PFC_PINS
(
ssi3_data
,
RCAR_GP_PIN
(
3
,
5
));
SSI_PFC_DATA
(
ssi3_data
,
SSI_SDATA3
);
SSI_PFC_PINS
(
ssi4_ctrl
,
RCAR_GP_PIN
(
1
,
22
),
RCAR_GP_PIN
(
1
,
23
));
SSI_PFC_CTRL
(
ssi4_ctrl
,
SSI_SCK4
,
SSI_WS4
);
SSI_PFC_PINS
(
ssi4_data
,
RCAR_GP_PIN
(
3
,
4
));
SSI_PFC_DATA
(
ssi4_data
,
SSI_SDATA4
);
/* - SSI 5 ------------------------------------------------------------------ */
SSI_PFC_PINS
(
ssi5_ctrl
,
RCAR_GP_PIN
(
2
,
31
),
RCAR_GP_PIN
(
3
,
0
));
SSI_PFC_CTRL
(
ssi5_ctrl
,
SSI_SCK5
,
SSI_WS5
);
SSI_PFC_PINS
(
ssi5_data
,
RCAR_GP_PIN
(
3
,
1
));
SSI_PFC_DATA
(
ssi5_data
,
SSI_SDATA5
);
/* - SSI 6 ------------------------------------------------------------------ */
SSI_PFC_PINS
(
ssi6_ctrl
,
RCAR_GP_PIN
(
2
,
28
),
RCAR_GP_PIN
(
2
,
29
));
SSI_PFC_CTRL
(
ssi6_ctrl
,
SSI_SCK6
,
SSI_WS6
);
SSI_PFC_PINS
(
ssi6_data
,
RCAR_GP_PIN
(
2
,
30
));
SSI_PFC_DATA
(
ssi6_data
,
SSI_SDATA6
);
/* - SSI 7/8 --------------------------------------------------------------- */
SSI_PFC_PINS
(
ssi78_ctrl
,
RCAR_GP_PIN
(
2
,
24
),
RCAR_GP_PIN
(
2
,
25
));
SSI_PFC_CTRL
(
ssi78_ctrl
,
SSI_SCK78
,
SSI_WS78
);
SSI_PFC_PINS
(
ssi7_data
,
RCAR_GP_PIN
(
2
,
27
));
SSI_PFC_DATA
(
ssi7_data
,
SSI_SDATA7
);
SSI_PFC_PINS
(
ssi8_data
,
RCAR_GP_PIN
(
2
,
26
));
SSI_PFC_DATA
(
ssi8_data
,
SSI_SDATA8
);
/* - USB0 ------------------------------------------------------------------- */
SH_PFC_PINS
(
usb0
,
RCAR_GP_PIN
(
0
,
1
));
SH_PFC_MUX1
(
usb0
,
PENC0
);
...
...
@@ -1624,6 +1693,11 @@ VIN_PFC_PINS(vin1_sync, RCAR_GP_PIN(3, 21), RCAR_GP_PIN(3, 22));
VIN_PFC_SYNC
(
vin1_sync
,
VI1_HSYNC
,
VI1_VSYNC
);
static
const
struct
sh_pfc_pin_group
pinmux_groups
[]
=
{
SH_PFC_PIN_GROUP
(
audio_clk_a
),
SH_PFC_PIN_GROUP
(
audio_clk_b
),
SH_PFC_PIN_GROUP
(
audio_clk_c
),
SH_PFC_PIN_GROUP
(
audio_clkout_a
),
SH_PFC_PIN_GROUP
(
audio_clkout_b
),
SH_PFC_PIN_GROUP
(
ether_rmii
),
SH_PFC_PIN_GROUP
(
ether_link
),
SH_PFC_PIN_GROUP
(
ether_magic
),
...
...
@@ -1713,6 +1787,25 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP
(
sdhi2_data4_b
),
SH_PFC_PIN_GROUP
(
sdhi2_wp_a
),
SH_PFC_PIN_GROUP
(
sdhi2_wp_b
),
SH_PFC_PIN_GROUP
(
ssi012_ctrl
),
SH_PFC_PIN_GROUP
(
ssi0_data
),
SH_PFC_PIN_GROUP
(
ssi1_a_ctrl
),
SH_PFC_PIN_GROUP
(
ssi1_b_ctrl
),
SH_PFC_PIN_GROUP
(
ssi1_data
),
SH_PFC_PIN_GROUP
(
ssi2_a_ctrl
),
SH_PFC_PIN_GROUP
(
ssi2_b_ctrl
),
SH_PFC_PIN_GROUP
(
ssi2_data
),
SH_PFC_PIN_GROUP
(
ssi34_ctrl
),
SH_PFC_PIN_GROUP
(
ssi3_data
),
SH_PFC_PIN_GROUP
(
ssi4_ctrl
),
SH_PFC_PIN_GROUP
(
ssi4_data
),
SH_PFC_PIN_GROUP
(
ssi5_ctrl
),
SH_PFC_PIN_GROUP
(
ssi5_data
),
SH_PFC_PIN_GROUP
(
ssi6_ctrl
),
SH_PFC_PIN_GROUP
(
ssi6_data
),
SH_PFC_PIN_GROUP
(
ssi78_ctrl
),
SH_PFC_PIN_GROUP
(
ssi7_data
),
SH_PFC_PIN_GROUP
(
ssi8_data
),
SH_PFC_PIN_GROUP
(
usb0
),
SH_PFC_PIN_GROUP
(
usb0_ovc
),
SH_PFC_PIN_GROUP
(
usb1
),
...
...
@@ -1725,6 +1818,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP
(
vin1_sync
),
};
static
const
char
*
const
audio_clk_groups
[]
=
{
"audio_clk_a"
,
"audio_clk_b"
,
"audio_clk_c"
,
"audio_clkout_a"
,
"audio_clkout_b"
,
};
static
const
char
*
const
ether_groups
[]
=
{
"ether_rmii"
,
"ether_link"
,
...
...
@@ -1875,6 +1976,28 @@ static const char * const sdhi2_groups[] = {
"sdhi2_wp_b"
,
};
static
const
char
*
const
ssi_groups
[]
=
{
"ssi012_ctrl"
,
"ssi0_data"
,
"ssi1_a_ctrl"
,
"ssi1_b_ctrl"
,
"ssi1_data"
,
"ssi2_a_ctrl"
,
"ssi2_b_ctrl"
,
"ssi2_data"
,
"ssi34_ctrl"
,
"ssi3_data"
,
"ssi4_ctrl"
,
"ssi4_data"
,
"ssi5_ctrl"
,
"ssi5_data"
,
"ssi6_ctrl"
,
"ssi6_data"
,
"ssi78_ctrl"
,
"ssi7_data"
,
"ssi8_data"
,
};
static
const
char
*
const
usb0_groups
[]
=
{
"usb0"
,
"usb0_ovc"
,
...
...
@@ -1898,6 +2021,7 @@ static const char * const vin1_groups[] = {
};
static
const
struct
sh_pfc_function
pinmux_functions
[]
=
{
SH_PFC_FUNCTION
(
audio_clk
),
SH_PFC_FUNCTION
(
ether
),
SH_PFC_FUNCTION
(
hscif0
),
SH_PFC_FUNCTION
(
hscif1
),
...
...
@@ -1918,6 +2042,7 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION
(
sdhi0
),
SH_PFC_FUNCTION
(
sdhi1
),
SH_PFC_FUNCTION
(
sdhi2
),
SH_PFC_FUNCTION
(
ssi
),
SH_PFC_FUNCTION
(
usb0
),
SH_PFC_FUNCTION
(
usb1
),
SH_PFC_FUNCTION
(
vin0
),
...
...
drivers/pinctrl/sh-pfc/pfc-r8a7790.c
View file @
fdc07cc1
...
...
@@ -781,6 +781,8 @@ enum {
ADICS_SAMP_MARK
,
DU2_CDE_MARK
,
QPOLB_MARK
,
SCIFA2_RXD_B_MARK
,
USB1_PWEN_MARK
,
AUDIO_CLKOUT_D_MARK
,
USB1_OVC_MARK
,
TCLK1_B_MARK
,
I2C3_SCL_MARK
,
I2C3_SDA_MARK
,
PINMUX_MARK_END
,
};
...
...
@@ -1719,10 +1721,22 @@ static const u16 pinmux_data[] = {
PINMUX_IPSR_DATA
(
IP16_6
,
AUDIO_CLKOUT_D
),
PINMUX_IPSR_DATA
(
IP16_7
,
USB1_OVC
),
PINMUX_IPSR_MODSEL_DATA
(
IP16_7
,
TCLK1_B
,
SEL_TMU1_1
),
PINMUX_DATA
(
I2C3_SCL_MARK
,
FN_SEL_IICDVFS_1
),
PINMUX_DATA
(
I2C3_SDA_MARK
,
FN_SEL_IICDVFS_1
),
};
/* R8A7790 has 6 banks with 32 GPIOs in each = 192 GPIOs */
#define ROW_GROUP_A(r) ('Z' - 'A' + 1 + (r))
#define PIN_NUMBER(r, c) (((r) - 'A') * 31 + (c) + 200)
#define PIN_A_NUMBER(r, c) PIN_NUMBER(ROW_GROUP_A(r), c)
static
struct
sh_pfc_pin
pinmux_pins
[]
=
{
PINMUX_GPIO_GP_ALL
(),
/* Pins not associated with a GPIO port */
SH_PFC_PIN_NAMED
(
ROW_GROUP_A
(
'J'
),
15
,
AJ15
),
SH_PFC_PIN_NAMED
(
ROW_GROUP_A
(
'H'
),
15
,
AH15
),
};
/* - DU RGB ----------------------------------------------------------------- */
...
...
@@ -1990,6 +2004,72 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
static
const
unsigned
int
hscif1_ctrl_b_mux
[]
=
{
HRTS1_N_B_MARK
,
HCTS1_N_B_MARK
,
};
/* - I2C1 ------------------------------------------------------------------- */
static
const
unsigned
int
i2c1_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
1
,
16
),
RCAR_GP_PIN
(
1
,
17
),
};
static
const
unsigned
int
i2c1_mux
[]
=
{
I2C1_SCL_MARK
,
I2C1_SDA_MARK
,
};
static
const
unsigned
int
i2c1_b_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
3
,
6
),
RCAR_GP_PIN
(
3
,
7
),
};
static
const
unsigned
int
i2c1_b_mux
[]
=
{
I2C1_SCL_B_MARK
,
I2C1_SDA_B_MARK
,
};
static
const
unsigned
int
i2c1_c_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
4
,
30
),
RCAR_GP_PIN
(
4
,
27
),
};
static
const
unsigned
int
i2c1_c_mux
[]
=
{
I2C1_SCL_C_MARK
,
I2C1_SDA_C_MARK
,
};
/* - I2C2 ------------------------------------------------------------------- */
static
const
unsigned
int
i2c2_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
5
,
5
),
RCAR_GP_PIN
(
5
,
6
),
};
static
const
unsigned
int
i2c2_mux
[]
=
{
I2C2_SCL_MARK
,
I2C2_SDA_MARK
,
};
static
const
unsigned
int
i2c2_b_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
4
,
0
),
RCAR_GP_PIN
(
4
,
1
),
};
static
const
unsigned
int
i2c2_b_mux
[]
=
{
I2C2_SCL_B_MARK
,
I2C2_SDA_B_MARK
,
};
static
const
unsigned
int
i2c2_c_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
0
,
6
),
RCAR_GP_PIN
(
0
,
7
),
};
static
const
unsigned
int
i2c2_c_mux
[]
=
{
I2C2_SCL_C_MARK
,
I2C2_SDA_C_MARK
,
};
static
const
unsigned
int
i2c2_d_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
3
,
14
),
RCAR_GP_PIN
(
3
,
15
),
};
static
const
unsigned
int
i2c2_d_mux
[]
=
{
I2C2_SCL_D_MARK
,
I2C2_SDA_D_MARK
,
};
static
const
unsigned
int
i2c2_e_pins
[]
=
{
/* SCL, SDA */
RCAR_GP_PIN
(
2
,
18
),
RCAR_GP_PIN
(
2
,
19
),
};
static
const
unsigned
int
i2c2_e_mux
[]
=
{
I2C2_SCL_E_MARK
,
I2C2_SDA_E_MARK
,
};
/* - I2C3 ------------------------------------------------------------------- */
static
const
unsigned
int
i2c3_pins
[]
=
{
/* SCL, SDA */
PIN_A_NUMBER
(
'J'
,
15
),
PIN_A_NUMBER
(
'H'
,
15
),
};
static
const
unsigned
int
i2c3_mux
[]
=
{
I2C3_SCL_MARK
,
I2C3_SDA_MARK
,
};
/* - INTC ------------------------------------------------------------------- */
static
const
unsigned
int
intc_irq0_pins
[]
=
{
/* IRQ */
...
...
@@ -3047,6 +3127,15 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP
(
hscif1_data_b
),
SH_PFC_PIN_GROUP
(
hscif1_clk_b
),
SH_PFC_PIN_GROUP
(
hscif1_ctrl_b
),
SH_PFC_PIN_GROUP
(
i2c1
),
SH_PFC_PIN_GROUP
(
i2c1_b
),
SH_PFC_PIN_GROUP
(
i2c1_c
),
SH_PFC_PIN_GROUP
(
i2c2
),
SH_PFC_PIN_GROUP
(
i2c2_b
),
SH_PFC_PIN_GROUP
(
i2c2_c
),
SH_PFC_PIN_GROUP
(
i2c2_d
),
SH_PFC_PIN_GROUP
(
i2c2_e
),
SH_PFC_PIN_GROUP
(
i2c3
),
SH_PFC_PIN_GROUP
(
intc_irq0
),
SH_PFC_PIN_GROUP
(
intc_irq1
),
SH_PFC_PIN_GROUP
(
intc_irq2
),
...
...
@@ -3243,6 +3332,24 @@ static const char * const hscif1_groups[] = {
"hscif1_ctrl_b"
,
};
static
const
char
*
const
i2c1_groups
[]
=
{
"i2c1"
,
"i2c1_b"
,
"i2c1_c"
,
};
static
const
char
*
const
i2c2_groups
[]
=
{
"i2c2"
,
"i2c2_b"
,
"i2c2_c"
,
"i2c2_d"
,
"i2c2_e"
,
};
static
const
char
*
const
i2c3_groups
[]
=
{
"i2c3"
,
};
static
const
char
*
const
intc_groups
[]
=
{
"intc_irq0"
,
"intc_irq1"
,
...
...
@@ -3469,6 +3576,9 @@ static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION
(
eth
),
SH_PFC_FUNCTION
(
hscif0
),
SH_PFC_FUNCTION
(
hscif1
),
SH_PFC_FUNCTION
(
i2c1
),
SH_PFC_FUNCTION
(
i2c2
),
SH_PFC_FUNCTION
(
i2c3
),
SH_PFC_FUNCTION
(
intc
),
SH_PFC_FUNCTION
(
mmc0
),
SH_PFC_FUNCTION
(
mmc1
),
...
...
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