Commit ffbded7d authored by Fabien Dessenne's avatar Fabien Dessenne Committed by Jassi Brar

mailbox: add STMicroelectronics STM32 IPCC driver

The STMicroelectronics STM32 Inter-Processor Communication Controller
(IPCC) is used for communicating data between two processors.
It provides a non blocking signaling mechanism to post and retrieve
communication data in an atomic way.
Signed-off-by: default avatarFabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: default avatarLudovic Barre <ludovic.barre@st.com>
Signed-off-by: default avatarJassi Brar <jaswinder.singh@linaro.org>
parent 8f51bb7c
...@@ -177,4 +177,12 @@ config BCM_FLEXRM_MBOX ...@@ -177,4 +177,12 @@ config BCM_FLEXRM_MBOX
Mailbox implementation of the Broadcom FlexRM ring manager, Mailbox implementation of the Broadcom FlexRM ring manager,
which provides access to various offload engines on Broadcom which provides access to various offload engines on Broadcom
SoCs. Say Y here if you want to use the Broadcom FlexRM. SoCs. Say Y here if you want to use the Broadcom FlexRM.
config STM32_IPCC
tristate "STM32 IPCC Mailbox"
depends on MACH_STM32MP157
help
Mailbox implementation for STMicroelectonics STM32 family chips
with hardware for Inter-Processor Communication Controller (IPCC)
between processors. Say Y here if you want to have this support.
endif endif
...@@ -38,3 +38,5 @@ obj-$(CONFIG_BCM_FLEXRM_MBOX) += bcm-flexrm-mailbox.o ...@@ -38,3 +38,5 @@ obj-$(CONFIG_BCM_FLEXRM_MBOX) += bcm-flexrm-mailbox.o
obj-$(CONFIG_QCOM_APCS_IPC) += qcom-apcs-ipc-mailbox.o obj-$(CONFIG_QCOM_APCS_IPC) += qcom-apcs-ipc-mailbox.o
obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o obj-$(CONFIG_TEGRA_HSP_MBOX) += tegra-hsp.o
obj-$(CONFIG_STM32_IPCC) += stm32-ipcc.o
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