- 26 Jun, 2020 38 commits
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Boris Brezillon authored
This simplifies the init() error path and the remove() handler. Signed-off-by:
Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200603134922.1352340-5-boris.brezillon@collabora.com
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Boris Brezillon authored
This simplifies the init error path and remove function. Signed-off-by:
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Boris Brezillon authored
fsl_upm_nand.parts is unused, let's get rid of it. Signed-off-by:
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Boris Brezillon authored
The mtd var in fun_wait_rnb() is now unused, let's get rid of it and fix the warning resulting from this unused var. Fixes: 50a487e7 ("mtd: rawnand: Pass a nand_chip object to chip->dev_ready()") Signed-off-by:
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Miquel Raynal authored
Instead of manipulating the statically allocated structure and copy timings around, allocate one at identification time and save it in the nand_chip structure once it has been initialized. All NAND chips using the same interface configuration during reset and startup, we define a helper to retrieve a single reset interface configuration object, shared across all NAND chips. We use a second pointer to always have a reference on the currently applied interface configuration, which may either point to the "best interface configuration" or to the "default reset interface configuration". Signed-off-by:
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Miquel Raynal authored
The ->choose_interface() hook is here for manufacturer drivers to provide a better timing interface than the default one, this field is not needed anymore. Signed-off-by:
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Rickard x Andersson authored
The Kioxia/Toshiba TH58NVG2S3HBAI4 NAND memory is not ONFI compliant. The timings of the NAND chip memory are quite close to ONFI mode 4 but is breaking that spec. By providing our own set of timings, erase block read speed is increased from 6910 kiB/s to 13490 kiB/s and erase block write speed is increased from 3350 kiB/s to 4410 kiB/s. Tested on IMX6SX which has a NAND controller supporting EDO mode. Signed-off-by:
Rickard x Andersson <rickaran@axis.com> Signed-off-by:
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Miquel Raynal authored
This chip supports ONFI SDR timing mode 4, implement the new hook to advertize it. Signed-off-by:
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Miquel Raynal authored
This chip supports ONFI SDR timing mode 2, implement the new hook to advertize it. Signed-off-by:
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Miquel Raynal authored
Implement this hook for the tc58teg5dclta00 NAND chip and stop setting ->default_timing_mode. Signed-off-by:
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Miquel Raynal authored
This hook can be overloaded by NAND manufacturer drivers to propose alternative timings when not following the main standards. In this case, the manufacturer drivers is responsible for choosing the best interface configuration that fits both the controller and chip capabilities. Signed-off-by:
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Miquel Raynal authored
Extract the logic out of nand_choose_interface_config() to create a public helper that can be reused by manufacturer drivers. Add the possibility to provide a specific set of timings. Signed-off-by:
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Miquel Raynal authored
Warn the user if the parameters are wrong but basically it would mean there is a serious issue in the NAND core. So no need to ever check its output, let's make this helper return void. Signed-off-by:
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Miquel Raynal authored
The name/suffix data_interface is a bit misleading in that the field or functions actually represent a configuration that can be applied by the controller/chip. Let's rename all fields/functions/hooks that are worth renaming. Signed-off-by:
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Miquel Raynal authored
As a preparation for allocating the data interface structure dynamically (and rename it), let's avoid accessing chip->data_interface directly. Instead, we introduce a helper, nand_get_interface_config(), and use it to retrieve the current data interface configuration out of a nand_chip object. Signed-off-by:
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Miquel Raynal authored
The ONFI parameter page of a chip might define more fine grained tPROG_max and tBERS_max. When we do not have this information, we default to the highest possible values (they are maxima anyway). There is no point setting these fields at runtime, so explicitly move these defaults to the main ONFI SDR timings structure. This way, we will also be able to return a pointer to mode 0 directly when we will create a default reset configuration. Signed-off-by:
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Miquel Raynal authored
These two values are already hardcoded in the default ONFI timing structure, no need to redefine them here. Plus, we want to be able to reference timing mode 0 easily and reliably, without extra computation, so we get rid of the extra assignations. Signed-off-by:
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Miquel Raynal authored
Vendors are allowed to provide their own set of timings. In this case, we provide a way to derive the "closest" timing mode so that, if the NAND controller does not support tweaking these parameters, it will be able to configure itself anyway. Signed-off-by:
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Miquel Raynal authored
Turn this argument into an unsigned int, as it cannot be signed. This also spares a check. Signed-off-by:
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Miquel Raynal authored
Right now the core uses onfi_fill_data_interface() to initialize the nand_data_interface object embedded in nand_chip, but we are about to allocate this object dynamically and let manufacturer drivers provide their own interface config. Let's patch the onfi_fill_data_interface() so it can initialize an interface config that's not the one currently attached to the nand_chip. Signed-off-by:
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Miquel Raynal authored
Describe all parameters and drop the legacy [NAND Interface] prefix. Signed-off-by:
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Miquel Raynal authored
This name is a bit misleading, what we do in this helper is trying to find the best SDR timings supported by the controller and the chip. Signed-off-by:
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Miquel Raynal authored
This is a copy/paste error and belongs to nand_init_data_interface() description. Signed-off-by:
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Miquel Raynal authored
This is really a NAND controller hook so call it nand_controller_can_setup_data_iface(), which makes much more sense. Signed-off-by:
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Miquel Raynal authored
The data interface setup does not care about the default timing mode but cares about the actual timing mode at the time of the call of this helper. Use this entry instead and let chip->default_timing_mode only be used at initialization time. Signed-off-by:
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Miquel Raynal authored
Avoid relying just on the default timing mode to discriminate if the data interface must be restored. This field should only be used at initialization time by legacy chips statically defined. Do a memcmp() instead. Signed-off-by:
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Miquel Raynal authored
Reorder fields in this structure and pack entries by theme: * The main descriptive structures * The data interface details * Bad block information * The device layout * Extra buffers matching the device layout * Internal values * External objects like the ECC controller, the ECC engine and a private data pointer. While at it, adapt the documentation style. I changed on purpose the description of @oob_poi which was weird. Signed-off-by:
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Miquel Raynal authored
Now that struct nand_manufacturer type is free, use it to store the nand_manufacturer_desc and the manufacturer's private data. Signed-off-by:
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Miquel Raynal authored
It is currently called nand_manufacturer but could actually be called nand_manufacturer_desc, like its instances, so that the former name is left unused for now. Signed-off-by:
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Miquel Raynal authored
And move nand_chip hooks there. While moving entries from one structure to the other, adapt the documentation style. Signed-off-by:
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Miquel Raynal authored
Mechanical change to avoid using old types. Signed-off-by:
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Miquel Raynal authored
page_shift, phys_erase_shift, bbt_erase_shift, chip_shift, pagemask, subpagesize and badblockbits are all positive values, so declare them as unsigned. Signed-off-by:
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Miquel Raynal authored
Prepare the migration to a generic ECC engine by renaming the nand_ecc_req structure into nand_ecc_props. This structure will be the base of a wider 'nand_ecc' structure. In nand_device, these properties are still named "eccreq" even if "eccprops" might be more descriptive. This is just a transition step, this field is being replaced very soon by a much wider structure. The impact of renaming this field would be huge compared to its interest. Signed-off-by:
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Miquel Raynal authored
Both OneNAND and raw NAND bits can't be compiled if MTD is disabled because of the if/endif logic in drivers/mtd/Kconfig. There is no need for an extra "depends on MTD" in their respective Kconfig files. Signed-off-by:
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Miquel Raynal authored
Use an extra level in Kconfig for all NAND related entries. Signed-off-by:
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Miquel Raynal authored
This structure might be used earlier in this file, let's move the forward declaration at the top. Signed-off-by:
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Boris Brezillon authored
A few drivers use this property to describe GPIO pins used to sample the NAND Ready/Busy state. Let's make it part of the generic binding doc. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Boris Brezillon authored
Let's convert the driver to exec_op() to have one less driver relying on the legacy interface. Signed-off-by:
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- 15 Jun, 2020 1 commit
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Boris Brezillon authored
Let's convert the driver to exec_op() to have one less driver relying on the legacy interface. Signed-off-by:
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- 14 Jun, 2020 1 commit
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Linus Torvalds authored
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