- 06 Aug, 2018 2 commits
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abdoulaye berthe authored
[Why] 400.1.1 is failing because we are not performing link training when we get an HPD pulse for the same display. This is breaking DP compliance [How] Always perform link training after HPD pulse if the detection reason is not DETECT_REASON_HPDRX. Signed-off-by:
abdoulaye berthe <abdoulaye.berthe@amd.com> Reviewed-by:
Wenjing Liu <Wenjing.Liu@amd.com> Acked-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Leo (Sunpeng) Li authored
[Why] The DRM mode's HDMI picture aspect ratio field was never saved in dc_stream's timing struct. This causes us to mistake a new stream to have the same timings as the old, even though the user has requested a different aspect ratio. [How] Save DRM's aspect ratio field within dc_stream's timing struct. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=107153Signed-off-by:
Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by:
Mikita Lipski <Mikita.Lipski@amd.com> Acked-by:
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- 03 Aug, 2018 2 commits
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Harry Wentland authored
[Why] VGA sometimes has trouble retrieving the EDID on very long cables, KVM switches, or old displays. [How] Only require EDID read for HDMI and DVI and exempt other types (DP, VGA). We currently don't support VGA but if anyone adds support in the future this might get overlooked. Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Suggested-by:
Michel Dänzer <michel@daenzer.net> Acked-by:
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Harry Wentland authored
[Why] Some boards seem to have a problem where HPD is high on HDMI even though no display is connected. We don't want to report these as connected. DP spec still requires us to report DP displays as connected when HPD is high but we can't read the EDID in order to go to fail-safe mode. [How] If connector_signal is not DP abort detection if we can't retrieve the EDID. v2: Add Bugzilla and stable Bugzilla: https://bugs.freedesktop.org/107390 Bugzilla: https://bugs.freedesktop.org/106846 Cc: stable@vger.kernel.org Signed-off-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
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- 01 Aug, 2018 3 commits
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Huang Rui authored
All non-x86 definitions are moved to ttm_set_memory header, so remove it from ttm_tt.c. Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Huang Rui <ray.huang@amd.com> Signed-off-by:
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Huang Rui authored
These two helpers will be used on set page caching. Reviewed-by:
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Huang Rui authored
This patch fixed the error when do not configure CONFIG_X86, otherwise, below error will be encountered. All errors (new ones prefixed by >>): drivers/gpu/drm/ttm/ttm_page_alloc_dma.c: In function 'ttm_set_pages_caching': >> drivers/gpu/drm/ttm/ttm_page_alloc_dma.c:272:7: error: implicit declaration of function 'set_pages_array_uc'; did you mean +'ttm_set_pages_array_uc'? [-Werror=implicit-function-declaration] r = set_pages_array_uc(pages, cpages); ^~~~~~~~~~~~~~~~~~ ttm_set_pages_array_uc cc1: some warnings being treated as errors Reported-by:kbuild test robot <lkp@intel.com> Reviewed-by:
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- 31 Jul, 2018 23 commits
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Gustavo A. R. Silva authored
idx can be indirectly controlled by user-space, hence leading to a potential exploitation of the Spectre variant 1 vulnerability. This issue was detected with the help of Smatch: drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c:408 amdgpu_set_pp_force_state() warn: potential spectre issue 'data.states' Fix this by sanitizing idx before using it to index data.states Notice that given that speculation windows are large, the policy is to kill the speculation on the first load and not worry if it can be completed with a dependent load/store [1]. [1] https://marc.info/?l=linux-kernel&m=152449131114778&w=2 Cc: stable@vger.kernel.org Signed-off-by:
Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
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Colin Ian King authored
Add a missing void parameter to function dc_create_transfer_func, fixes sparse warning: warning: non-ANSI function declaration of function 'dc_create_transfer_func' Signed-off-by:
Colin Ian King <colin.king@canonical.com> Reviewed-by:
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Thomas Zimmermann authored
The function ttm_bo_put releases a reference to a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. A call to ttm_bo_unref takes the address of the TTM BO object's pointer and clears the pointer's value to NULL. This is not necessary in most cases and sometimes even worked around by the calling code. A call to ttm_bo_put only releases the reference without clearing the pointer. The current behaviour of cleaning the pointer is kept in the calling code, but should be removed if not required in a later patch. Signed-off-by:
Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by:
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Thomas Zimmermann authored
The function ttm_bo_get acquires a reference on a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. Signed-off-by:
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Thomas Zimmermann authored
The function ttm_bo_put releases a reference to a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. A call to ttm_bo_unref takes the address of the TTM BO object's pointer and clears the pointer's value to NULL. This is not necessary in most cases and sometimes even worked around by the calling code. A call to ttm_bo_put only releases the reference without clearing the pointer. The current behaviour of cleaning the pointer is kept in the calling code, but should be removed if not required in a later patch. v2: * set prefix to drm/amdgpu Signed-off-by:
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Thomas Zimmermann authored
The function ttm_bo_get acquires a reference on a TTM buffer object. The function's name is more aligned to the Linux kernel convention of naming ref-counting function _get and _put. v2: * changed prefix to drm/amdgpu Signed-off-by:
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Christian König authored
We removed the redundancy of having an extra scheduler field, so we can't set the rq to NULL any more or otherwise won't know which scheduler to use for the cleanup. Just remove the entity from the scheduling list instead. Signed-off-by:
Nayan Deshmukh <nayan26deshmukh@gmail.com> Bug: https://bugs.freedesktop.org/show_bug.cgi?id=107367Signed-off-by:
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Christian König authored
Note which task is using the entity and only kill it if the last user of the entity is killed. This should prevent problems when entities are leaked to child processes. v2: add missing kernel doc Signed-off-by:
Andrey Grodzovsky <andrey.grodzovsky@amd.com> Acked-by:
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Christian König authored
Instead of having extra handling just create an empty bo_list when no handle is provided. Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
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Christian König authored
This avoids multiple allocations for the head and the array. Signed-off-by:
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Christian König authored
Add helpers to iterate over all entries in a bo_list. Signed-off-by:
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Christian König authored
The RCU grace period is harmless and avoiding it is not worth the effort of doubling the implementation. Signed-off-by:
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Christian König authored
The bo_list handle is allocated by OP_CREATE, so in OP_UPDATE here we just re-create the bo_list object and replace the handle. This way we don't need locking to protect the bo_list because it's always re-created when changed. Signed-off-by:
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Christian König authored
Further demangle amdgpu.h Signed-off-by:
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Christian König authored
This allows us to trace all VM ranges which should be valid inside a CS. v2: dump mappings without BO as well Signed-off-by:
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Christian König authored
Return -EINVAL when both the BOs as well as a list handle is provided in the IOCTL. Signed-off-by:
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Christian König authored
long might only be 32bit in size and we can easily use more than 4GB here. Signed-off-by:
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Masahiro Yamada authored
I refactored the include directives under include/drm/ some time ago. This flag is unneeded. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by:
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Christian König authored
Otherwise we silently don't use a BO list when the handle is invalid. Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Rex Zhu authored
This test was reversed so it would end up leading to vddnb value can't be read via hwmon on APU. Reviewed-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com> Signed-off-by:
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Rex Zhu authored
the voltage showed in debugfs and hwmon should be in mV Reviewed-by:
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Rex Zhu authored
Only delete the dead temp variables in Polaris. Reviewed-by:
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Rex Zhu authored
DIDTConfig_Polaris12[] table missed a big chunk of data. Pointed by aidan.fabius <aidan.fabius@coreavi.com> Reviewed-by:
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- 27 Jul, 2018 10 commits
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Huang Rui authored
This patch cleans up spaces and align the text to refine the comment for amdgpu_ttm. Signed-off-by:
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Junwei Zhang authored
pass the evict flag instead of hard code Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Reviewed-by:
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Bas Nieuwenhuizen authored
Every set_pages_array_wb call resulted in cross-core interrupts and TLB flushes. Merge more of them for less overhead. This reduces the time needed to free a 1.6 GiB GTT WC buffer as part of Vulkan CTS from ~2 sec to < 0.25 sec. (Allocation still takes more than 2 sec though) (v2): use set_pages_wb instead of set_memory_wb. Signed-off-by:
Bas Nieuwenhuizen <basni@chromium.org> Signed-off-by:
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Huang Rui authored
All non-x86 definitions are moved to ttm_set_memory header, so remove it from ttm_page_alloc.c. Suggested-by:
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Huang Rui authored
All non-x86 definitions are moved to ttm_set_memory header, so remove it from ttm_page_alloc_dma.c. Suggested-by:
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Huang Rui authored
This patch moves all non-x86 abstraction to the ttm_set_memory header. It is to make function calling more clearly. (v2): add ttm_ prefix. Suggested-by:
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Alex Deucher authored
Properly handle cases where one or more instance of the IP block may be harvested. v2: make sure ip_num_rings is initialized amdgpu_queue_mgr.c v3: rebase on Christian's UVD changes, drop unused var Reviewed-by:
James Zhu <James.Zhu@amd.com> Signed-off-by:
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Harry Wentland authored
This structure needs to align with structure in atomfirmware table. Update it. Signed-off-by:
Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Signed-off-by:
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Harry Wentland authored
Signed-off-by:
Aric Cyr <Aric.Cyr@amd.com> Acked-by:
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Anthony Koo authored
[Why] PSR_SET command is sent to the microcontroller in order to initialize parameters needed for PSR feature, such as telling the microcontroller which pipe is driving the PSR supported panel. When this command is skipped or fails, the microcontroller may program the wrong thing if driver tries to enable PSR. [How] If PSR_SET fails, do not set psr_enable flag to indicate the feature is not yet initialized. Signed-off-by:
Anthony Koo <Anthony.Koo@amd.com> Reviewed-by:
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