- 26 Aug, 2020 5 commits
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David S. Miller authored
Vineetha G. Jaya Kumaran says: ==================== Add Ethernet support for Intel Keem Bay SoC This patch set enables support for Ethernet on the Intel Keem Bay SoC. The first patch contains the required Device Tree bindings documentation, while the second patch adds the Intel platform glue layer for the stmmac device driver. This driver was tested on the Keem Bay evaluation module board. Changes since v2: -Add a select in DT documentation to avoid matching with all nodes containing 'snps,dwmac' -Rebased to 5.9-rc1 Changes since v1: -Removed clocks maxItems property from DT bindings documentation -Removed phy compatible strings from DT bindings documentation ==================== Signed-off-by:David S. Miller <davem@davemloft.net>
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Rusaimi Amira Ruslan authored
Add dwmac-intel-plat to enable the stmmac driver in Intel Keem Bay. Also add fix_mac_speed and tx_clk in order to change link speeds. This is required as mac_speed_o is not connected in the Intel Keem Bay SoC. Signed-off-by:
Rusaimi Amira Ruslan <rusaimi.amira.rusaimi@intel.com> Signed-off-by:
Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com> Signed-off-by:
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Vineetha G. Jaya Kumaran authored
Add Device Tree bindings documentation for the ethernet controller on Intel Keem Bay. Signed-off-by:
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Eric Dumazet authored
This is no longer used, SCTP now uses a private helper. Signed-off-by:
Eric Dumazet <edumazet@google.com> Signed-off-by:
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Xu Wang authored
Because kfree_skb already checked NULL skb parameter, so the additional check is unnecessary, just remove it. Signed-off-by:
Xu Wang <vulab@iscas.ac.cn> Signed-off-by:
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- 25 Aug, 2020 35 commits
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Joe Perches authored
Use semicolons and braces. Signed-off-by:
Joe Perches <joe@perches.com> Signed-off-by:
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Joe Perches authored
Use semicolons and braces. Signed-off-by:
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Joe Perches authored
Use semicolons and braces. Signed-off-by:
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Joe Perches authored
Use semicolons and braces. Signed-off-by:
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Joe Perches authored
Use semicolons and braces. Signed-off-by:
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Miaohe Lin authored
This is a pure codestyle cleanup patch. Also add a blank line after declarations as warned by checkpatch.pl. Signed-off-by:
Miaohe Lin <linmiaohe@huawei.com> Signed-off-by:
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Miaohe Lin authored
Check midx against 0 is always equal to check midx against sk_bound_dev_if when sk_bound_dev_if is known not equal to 0 in these case. Signed-off-by:
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Miaohe Lin authored
We can avoid unnecessary inet_addr_type() call by check addr against INADDR_ANY first. Signed-off-by:
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Miaohe Lin authored
We can defer set ping saddr until we successfully get the ping port. So we can avoid clear saddr when failed. Since ping_clear_saddr() is not used anymore now, remove it. Signed-off-by:
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Raju Rangoju authored
cxgb4 does not look for HASHTBLMEMCRCERR and CMDTIDERR bits in LE_DB_INT_CAUSE register, but these are enabled in LE_DB_INT_ENABLE. So, add error handlers to LE interrupt handler to emit a warning or alert message for hash table mem crc and cmd tid errors Signed-off-by:
Raju Rangoju <rajur@chelsio.com> Signed-off-by:
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Miaohe Lin authored
The need for padding 64bit is implicitly checked by nla_align_64bit(), so remove this explicit one. Signed-off-by:
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Miaohe Lin authored
When mtu is locked, we should not obtain ipv4 mtu as we return immediately in this case and leave acquired ipv4 mtu unused. Signed-off-by:
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git://git.open-mesh.org/linux-mergeDavid S. Miller authored
Simon Wunderlich says: ==================== This cleanup patchset includes the following patches: - bump version strings, by Simon Wunderlich - Drop unused function batadv_hardif_remove_interfaces(), by Sven Eckelmann - delete duplicated words, by Randy Dunlap - Drop (even more) repeated words in comments, by Sven Eckelmann - Migrate to linux/prandom.h, by Sven Eckelmann ==================== Signed-off-by: -
David S. Miller authored
Subbaraya Sundeep says: ==================== Add PTP support for Octeontx2 This patchset adds PTP support for Octeontx2 platform. PTP is an independent coprocessor block from which CGX block fetches timestamp and prepends it to the packet before sending to NIX block. Patches are as follows: Patch 1: Patch to enable/disable packet timstamping in CGX upon mailbox request. It also adjusts packet parser (NPC) for the 8 bytes timestamp appearing before the packet. Patch 2: Patch adding PTP pci driver which configures the PTP block and hooks up to RVU AF driver. It also exposes a mailbox call to adjust PTP hardware clock. Patch 3: Patch adding PTP clock driver for PF netdev. v8: Added missing header file reported by kernel test robot in patch 2 v7: As per Jesse Brandeburg comments: Simplified functions in patch 1 Replaced magic numbers with macros Added Copyrights Added code comments wherever required Modified commit description of patch 2 v6: Resent after net-next is open v5: As suggested by David separated the fix (adding rtnl lock/unlock) and submitted to net. https://www.spinics.net/lists/netdev/msg669617.html v4: Added rtnl_lock/unlock in otx2_reset to protect against network stack ndo_open and close calls Added NULL check after ptp_clock_register in otx2_ptp.c v3: Fixed sparse error in otx2_txrx.c Removed static inlines in otx2_txrx.c v2: Fixed kernel build robot reported error by adding timecounter.h to otx2_common.h ==================== Acked-by:Richard Cochran <richardcochran@gmail.com> Acked-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
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Aleksey Makarov authored
This patch adds PTP clock and uses it in Octeontx2 network device. PTP clock uses mailbox calls to access the hardware counter on the RVU side. Co-developed-by:
Subbaraya Sundeep <sbhatta@marvell.com> Signed-off-by:
Aleksey Makarov <amakarov@marvell.com> Signed-off-by:
Sunil Goutham <sgoutham@marvell.com> Acked-by:
Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by:
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Aleksey Makarov authored
Precision Timestamping block found on Octeontx2 platform is an independent coprocessor and has internal PTP hardware clock. Once configured PTP runs independently and when a packet arrives CGX hardware block gets the current timestamp from PTP block and forwards the packet to NIX by prepending timestamp to the packet. This patch adds the pci driver for PTP block. The driver gets registered by AF driver and does initial configuration and exposes a mailbox function to read and adjust PTP hardware clock. The mailbox function is called by AF consumers like netdev drivers or userspace drivers. Since PTP being a single block in platform this driver helps in accessing PTP block by any AF consumer. Co-developed-by:
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Zyta Szpak authored
Four new mbox messages ids and handler are added in order to enable or disable timestamping procedure on tx and rx side. Additionally when PTP is enabled, the packet parser must skip over 8 bytes and start analyzing packet data there. To make NPC profiles work seemlesly PTR_ADVANCE of IKPU is set so that parsing can be done as before when all data pointers are shifted by 8 bytes automatically. Co-developed-by:
Zyta Szpak <zyta@marvell.com> Signed-off-by:
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Miaohe Lin authored
Use helper macro RT_TOS() to get tos in __icmp_send(). Signed-off-by:
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Miaohe Lin authored
There is no need to fetch errno and fatal info from icmp_err_convert when icmp code is ICMP_FRAG_NEEDED. Signed-off-by:
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David S. Miller authored
Igor Russkikh says: ==================== qed: introduce devlink health support This is a followup implementation after series https://patchwork.ozlabs.org/project/netdev/cover/20200514095727.1361-1-irusskikh@marvell.com/ This is an implementation of devlink health infrastructure. With this we are now able to report HW errors to devlink, and it'll take its own actions depending on user configuration to capture and store the dump at the bad moment, and to request the driver to recover the device. So far we do not differentiate global device failures or specific PCI function failures. This means that some errors specific to one physical function will affect an entire device. This is not yet fully designed and verified, will followup in future. Solution was verified with artificial HW errors generated, existing tools for dump analysis could be used. v7: comments from Jesse and Jakub - p2: extra edev check - p9: removed extra indents v6: patch 4: changing serial to board.serial and fw to fw.app v5: improved patch 4 description v4: - commit message and other fixes after Jiri's comments - removed one patch (will send to net) v3: fix uninit var usage in patch 11 v2: fix #include issue from kbuild test robot. ==================== Signed-off-by:
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Igor Russkikh authored
In case recovery was not successful, netdev still should be present. But we should clear cdev if something bad happens on recovery. We also check cdev for null on dev close. That could be a case if recovery was not successful. Signed-off-by:
Igor Russkikh <irusskikh@marvell.com> Signed-off-by:
Alexander Lobakin <alobakin@marvell.com> Signed-off-by:
Michal Kalderon <michal.kalderon@marvell.com> Signed-off-by:
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Igor Russkikh authored
Remove extra indent on some of adjacent declarations. Signed-off-by:
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Igor Russkikh authored
Gather and push out full device dump to devlink. Device dump is the same as with `ethtool -d`, but now its generated exactly at the moment bad thing happens. Signed-off-by:
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Igor Russkikh authored
Remove forcible recovery trigger and put it as a normal devlink callback. This allows user to enable/disable it via devlink health set pci/0000:03:00.0 reporter fw_fatal auto_recover false Signed-off-by: -
Igor Russkikh authored
Use devlink_health_report to push error indications. We implement this in qede via callback function to make it possible to reuse the same for other drivers sitting on top of qed in future. Signed-off-by:
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Igor Russkikh authored
Here we declare health reporter ops (empty for now) and register these in qed probe and remove callbacks. This way we get devlink attached to all kind of qed* PCI device entities: networking or storage offload entity. Signed-off-by:
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Igor Russkikh authored
Here we return existing fw & mfw versions, we also fetch device's serial number: ~$ sudo ~/iproute2/devlink/devlink dev info pci/0000:01:00.1: driver qed board.serial_number REE1915E44552 versions: running: fw.app 8.42.2.0 stored: fw.mgmt 8.52.10.0 MFW and FW are different firmwares on device. Management is a firmware responsible for link configuration and various control plane features. Its permanent and resides in NVM. Running FW (or fastpath FW) is an embedded microprogram implementing all the packet processing, offloads, etc. This FW is being loaded on each start by the driver from FW binary blob. The base device specific structure (qed_dev_info) was not directly available to the base driver before. Thus, here we create and store a private copy of this structure in qed_dev root object to access the data. Signed-off-by: -
Igor Russkikh authored
This patch replaces stubs in kconfig help entries with an actual description. Signed-off-by:
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Igor Russkikh authored
Devlink instance lifecycle was linked to qed_dev object, that caused devlink to be recreated on each recovery. Changing it by making higher level driver (qede) responsible for its life. This way devlink now survives recoveries. qede now stores devlink structure pointer as a part of its device object, devlink private data contains a linkage structure, qed_devlink. Signed-off-by:
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Igor Russkikh authored
We are extending devlink infrastructure, thus move the existing stuff into a new file qed_devlink.c Signed-off-by:
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Christophe JAILLET authored
The wrappers in include/linux/pci-dma-compat.h should go away. The patch has been generated with the coccinelle script below and has been hand modified to replace GFP_ with a correct flag. It has been compile tested. When memory is allocated in 'free_rx_resources()' and 'alloc_tx_resources()' (sge.c) GFP_KERNEL can be used because it is already used in these functions. Moreover, they can only be called from a .ndo_open function. So it is guarded by the 'rtnl_lock()', which is a mutex. While at it, a pr_err message in 'init_one()' has been updated accordingly (s/consistent/coherent). @@ @@ - PCI_DMA_BIDIRECTIONAL + DMA_BIDIRECTIONAL @@ @@ - PCI_DMA_TODEVICE + DMA_TO_DEVICE @@ @@ - PCI_DMA_FROMDEVICE + DMA_FROM_DEVICE @@ @@ - PCI_DMA_NONE + DMA_NONE @@ expression e1, e2, e3; @@ - pci_alloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3; @@ - pci_zalloc_consistent(e1, e2, e3) + dma_alloc_coherent(&e1->dev, e2, e3, GFP_) @@ expression e1, e2, e3, e4; @@ - pci_free_consistent(e1, e2, e3, e4) + dma_free_coherent(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_single(e1, e2, e3, e4) + dma_map_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_single(e1, e2, e3, e4) + dma_unmap_single(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4, e5; @@ - pci_map_page(e1, e2, e3, e4, e5) + dma_map_page(&e1->dev, e2, e3, e4, e5) @@ expression e1, e2, e3, e4; @@ - pci_unmap_page(e1, e2, e3, e4) + dma_unmap_page(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_map_sg(e1, e2, e3, e4) + dma_map_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_unmap_sg(e1, e2, e3, e4) + dma_unmap_sg(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_cpu(e1, e2, e3, e4) + dma_sync_single_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_single_for_device(e1, e2, e3, e4) + dma_sync_single_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_cpu(e1, e2, e3, e4) + dma_sync_sg_for_cpu(&e1->dev, e2, e3, e4) @@ expression e1, e2, e3, e4; @@ - pci_dma_sync_sg_for_device(e1, e2, e3, e4) + dma_sync_sg_for_device(&e1->dev, e2, e3, e4) @@ expression e1, e2; @@ - pci_dma_mapping_error(e1, e2) + dma_mapping_error(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_dma_mask(e1, e2) + dma_set_mask(&e1->dev, e2) @@ expression e1, e2; @@ - pci_set_consistent_dma_mask(e1, e2) + dma_set_coherent_mask(&e1->dev, e2) Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by:
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David S. Miller authored
Ido Schimmel says: ==================== mlxsw: Misc updates This patch set includes various updates for mlxsw. Patches #1-#4 adjust the default burst size of packet trap policers to conform to Spectrum-{2,3} requirements. The corresponding selftest is also adjusted so that it could reliably pass on these platforms. Patch #5 adjusts a selftest so that it could pass with both old and new versions of mausezahn. Patch #6 significantly reduces the runtime of tc-police scale test by changing the preference and masks of the used tc filters. Patch #7 prevents the driver from trying to set invalid ethtool link modes. ==================== Signed-off-by: -
Danielle Ratson authored
The PTYS register is used to report and configure the port type and speed. Currently, internal bits in the register are used the same way other bits are used. Using the internal bits can cause bad parameter firmware errors. For example, trying to write to internal bit 25 returns: EMAD reg access failed (tid=53e2bffa00004310,reg_id=5004(ptys),type=write,status=7(bad parameter)) Remove the internal bits from the PTYS register, so that it is no longer possible to pass them to firmware. Signed-off-by:
Danielle Ratson <danieller@mellanox.com> Reviewed-by:
Jiri Pirko <jiri@mellanox.com> Signed-off-by:
Ido Schimmel <idosch@mellanox.com> Signed-off-by:
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Ido Schimmel authored
Currently, the test takes about 626 seconds to complete because of an inefficient use of the device's TCAM. Reduce the runtime to 202 seconds by inserting all the flower filters with the same preference and mask, but with a different key. In particular, this reduces the deletion of the qdisc (which triggers the deletion of all the filters) from 66 seconds to 0.2 seconds. This prevents various netlink requests from user space applications (e.g., systemd-networkd) from timing-out because RTNL is not held for too long anymore. Signed-off-by:
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Danielle Ratson authored
Currently, mausezahn delay parameter in mirror_test() is specified with 'ms' units. mausezahn versions before 0.6.5 interpret 'ms' as seconds and therefore the tests that use mirror_test() take a very long time to complete. Resolve this by specifying 'msec' units. Signed-off-by:
Petr Machata <petrm@mellanox.com> Signed-off-by:
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