- 31 Jul, 2014 2 commits
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Haifeng Yan authored
Enable support for the Hisilicon HiX5HD2 SoC. This HiX5HD2 SoC series support both single and dual Cortex-A9 cores. Add ARCH_HIX5HD2 to distinguish HiX5HD2 from Hi3xxx. They are different in implementation such as SMP, IPs integarted and earlycon configure. Signed-off-by:
Haifeng Yan <yanhaifeng@gmail.com> Signed-off-by:
Jiancheng Xue <jchxue@gmail.com> Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by:
Wei Xu <xuwei5@hisilicon.com> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Haojian Zhuang authored
Since multiple ARCH configuration will be appended into mach-hisi directory, add ARCH_HISI as common configuration for different platforms in mach-hisi. Signed-off-by:
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- 28 Jul, 2014 7 commits
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git://github.com/broadcom/mach-bcmArnd Bergmann authored
Merge "ARM: mach-bcm: soc updates for 3.17" from Matt Porter: - BCM Mobile SMP support - BRCM STB platform support * tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm: MAINTAINERS: add entry for Broadcom ARM STB architecture ARM: brcmstb: select GISB arbiter and interrupt drivers ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs ARM: configs: enable SMP in bcm_defconfig ARM: add SMP support for Broadcom mobile SoCs Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Brian Norris authored
Signed-off-by:
Brian Norris <computersforpeace@gmail.com> Acked-by:
Matt Porter <mporter@linaro.org>
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Brian Norris authored
Signed-off-by:
Florian Fainelli <f.fainelli@gmail.com> Acked-by:
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Marc Carino authored
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes. This patch adds machine support for the ARM-based Broadcom SoCs. Signed-off-by:
Marc Carino <marc.ceeeee@gmail.com> Acked-by:
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Alex Elder authored
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we currently need. Signed-off-by:
Ray Jui <rjui@broadcom.com> Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
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Alex Elder authored
This patch adds SMP support for BCM281XX and BCM21664 family SoCs. This feature is controlled with a distinct config option such that an SMP-enabled multi-v7 binary can be configured to run these SoCs in uniprocessor mode. Since this SMP functionality is used for multiple Broadcom mobile chip families the config option is called ARCH_BCM_MOBILE_SMP (for lack of a better name). On SoCs of this type, the secondary core is not held in reset on power-on. Instead it loops in a ROM-based holding pen. To release it, one must write into a special register a jump address whose low-order bits have been replaced with a secondary core's id, then trigger an event with SEV. On receipt of an event, the ROM code will examine the register's contents, and if the low-order bits match its cpu id, it will clear them and write the value back to the register just prior to jumping to the address specified. The location of the special register is defined in the device tree using a "secondary-boot-reg" property in a node whose "enable-method" matches. Derived from code originally provided by Ray Jui <rjui@broadcom.com> Signed-off-by:
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git://git.linaro.org/people/mike.turquette/linuxArnd Bergmann authored
This is a dependency for the rk3288 DT updates, the branch should first get merged through Mike's clk git. * 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux: ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER clk: rockchip: add clock controller for rk3288 dt-bindings: add documentation for rk3288 cru clk: rockchip: add clock driver for rk3188 and rk3066 clocks dt-bindings: add documentation for rk3188 clock and reset unit clk: rockchip: add reset controller clk: rockchip: add clock type for pll clocks and pll used on rk3066 clk: rockchip: add basic infrastructure for clock branches clk: composite: improve rate_hw sanity check logic clk: composite: allow read-only clocks clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent Signed-off-by:
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- 26 Jul, 2014 11 commits
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git://git.infradead.org/linux-mvebuArnd Bergmann authored
Merge "mvebu SoC changes for v3.17 (round 4)" from Jason Cooper: - Armada XP - Fix return value check in pmsu code - Document URLs for new public datasheets (Thanks, Marvell & free-electrons!) - Armada 370/38x - Add cpuidle support - mvebu - Fix build when no platforms are selected - Update EBU SoC status in docs * tag 'mvebu-soc-3.17-4' of git://git.infradead.org/linux-mvebu: (21 commits) Documentation: arm: misc updates to Marvell EBU SoC status Documentation: arm: add URLs to public datasheets for the Marvell Armada XP SoC ARM: mvebu: fix build without platforms selected ARM: mvebu: add cpuidle support for Armada 38x ARM: mvebu: add cpuidle support for Armada 370 cpuidle: mvebu: add Armada 38x support cpuidle: mvebu: add Armada 370 support cpuidle: mvebu: rename the driver from armada-370-xp to mvebu-v7 ARM: mvebu: export the SCU address ARM: mvebu: make the snoop disabling optional in mvebu_v7_pmsu_idle_prepare() ARM: mvebu: use a local variable to store the resume address ARM: mvebu: make the cpuidle initialization more generic ARM: mvebu: rename the armada_370_xp symbols to mvebu_v7 in pmsu.c ARM: mvebu: use the common function for Armada 375 SMP workaround ARM: mvebu: add a common function for the boot address work around ARM: mvebu: sort the #include of pmsu.c in alphabetic order ARM: mvebu: split again armada_370_xp_pmsu_idle_enter() in PMSU code ARM: mvebu: fix return value check in armada_xp_pmsu_cpufreq_init() clk: mvebu: extend clk-cpu for dynamic frequency scaling ARM: mvebu: extend PMSU code to support dynamic frequency scaling ... Conflicts: arch/arm/mach-mvebu/Kconfig drivers/cpuidle/cpuidle-armada-370-xp.c Signed-off-by: -
Arnd Bergmann authored
* cleanup/gpio-header-removal: ARM: delete old reference to ARM_GPIOLIB_COMPLEX ARM: kill CONFIG_NEED_MACH_GPIO_H ARM: mach-s5p: get rid of all <mach/gpio.h> headers ARM: s5p: cut the custom ARCH_NR_GPIOS definition This resolves a massive amount of conflicts between the mach/gpio.h removal and the s5p platform removal. Almost all changes are trivial, as both sides remove stuff. Conflicts: arch/arm/Kconfig arch/arm/mach-s5p64x0/common.c arch/arm/mach-s5p64x0/dev-audio.c arch/arm/mach-s5p64x0/include/mach/gpio-samsung.h arch/arm/mach-s5p64x0/mach-smdk6440.c arch/arm/mach-s5p64x0/mach-smdk6450.c arch/arm/mach-s5p64x0/setup-fb-24bpp.c arch/arm/mach-s5p64x0/setup-i2c0.c arch/arm/mach-s5p64x0/setup-i2c1.c arch/arm/mach-s5p64x0/setup-sdhci-gpio.c arch/arm/mach-s5p64x0/setup-spi.c arch/arm/mach-s5pc100/dev-audio.c arch/arm/mach-s5pc100/include/mach/gpio-samsung.h arch/arm/mach-s5pc100/mach-smdkc100.c arch/arm/mach-s5pc100/setup-fb-24bpp.c arch/arm/mach-s5pc100/setup-i2c0.c arch/arm/mach-s5pc100/setup-i2c1.c arch/arm/mach-s5pc100/setup-ide.c arch/arm/mach-s5pc100/setup-keypad.c arch/arm/mach-s5pc100/setup-sdhci-gpio.c arch/arm/mach-s5pc100/setup-spi.c arch/arm/mach-s5pv210/dev-audio.c arch/arm/mach-s5pv210/include/mach/gpio-samsung.h arch/arm/mach-s5pv210/mach-aquila.c arch/arm/mach-s5pv210/mach-goni.c arch/arm/mach-s5pv210/mach-smdkv210.c arch/arm/mach-s5pv210/setup-fb-24bpp.c arch/arm/mach-s5pv210/setup-fimc.c arch/arm/mach-s5pv210/setup-i2c0.c arch/arm/mach-s5pv210/setup-i2c1.c arch/arm/mach-s5pv210/setup-i2c2.c arch/arm/mach-s5pv210/setup-ide.c arch/arm/mach-s5pv210/setup-keypad.c arch/arm/mach-s5pv210/setup-sdhci-gpio.c arch/arm/mach-s5pv210/setup-spi.c arch/arm/plat-samsung/Kconfig arch/arm/plat-samsung/s5p-irq-eint.c Signed-off-by: -
Arnd Bergmann authored
This resolves a nontrivial conflict against a bug fix in another branch. Conflicts: arch/arm/mach-exynos/pm.c Signed-off-by: -
Arnd Bergmann authored
Merge tag 'v3.17-rockchip-smp-hotplug' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc Merge "CPU-Hotplug support for RK3066 and RK3188" from Heiko Stuebner: * tag 'v3.17-rockchip-smp-hotplug' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: rockchip: Add cpu hotplug support for RK3XXX SoCs ARM: rockchip: select ARMv7 compiler flags for platsmp.o Signed-off-by:
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git://github.com/hisilicon/linux-hisiArnd Bergmann authored
Merge "update MAINTAINERS to add Hisilicon SoC maintainer" from Wei Xu: * tag 'misc-for-3.17' of git://github.com/hisilicon/linux-hisi: MAINTAINERS:ARM:hisi: add Hisilicon SoC family Signed-off-by:
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Arnd Bergmann authored
Merge tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung S5PV210 DT support for v3.17" from Kukjin Kim: - support common clock framework for s5pv210 clock - add generic PHY driver on s5pv210 to support it via DT - add dt support for s5pv210-goni, smdkc110, smdkv210 and torbreck boards - remove board files from mach-s5pv210 and unused codes - enable multiplatform for s5pv210 * tag 's5pv210-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: clk: samsung: s5pv210: Remove legacy board support ARM: SAMSUNG: Remove remaining legacy code gpio: samsung: Remove legacy support of S5PV210 ARM: S5PV210: Enable multi-platform build support cpufreq: s5pv210: Make the driver multiplatform aware ARM: S5PV210: Register cpufreq platform device ARM: S5PV210: move debug-macro.S into the common space ARM: S5PV210: Untie PM support from legacy code ARM: S5PV210: Remove support for board files ARM: dts: Add Device tree for s5pc110/s5pv210 boards ARM: dts: Add Device tree for s5pv210 SoC ARM: S5PV210: Add board file for boot using Device Tree phy: Add support for S5PV210 to the Exynos USB 2.0 PHY driver clk: samsung: Add S5PV210 Audio Subsystem clock driver ARM: SAMSUNG: Remove legacy clock code serial: samsung: Remove support for legacy clock code cpufreq: s3c24xx: Remove some dead code ARM: S5PV210: Migrate clock handling to Common Clock Framework clk: samsung: Add clock driver for S5PV210 and compatible SoCs Signed-off-by:
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Arnd Bergmann authored
Merge tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc Merge "Samsung power management related updates for v3.17" from Kukjin Kim - support cluster power off on exynos5420 and exynos5800 to save power. - use PMU address via DT to remove PMU static mapping - remove exynos_cpuidle_init() and exynos_cpufreq_init() * Note that this is including tags/samsung-cleanup and tags/exynos-cpuidle are already merged into arm-soc. * tag 'power-exynos' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Move cpufreq and cpuidle device registration to init_machine ARM: EXYNOS: Refactored code for using PMU address via DT ARM: EXYNOS: Support cluster power off on exynos5420/5800 Signed-off-by:
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Arnd Bergmann authored
The following samsung branches are based on these cleanups, which are already in mainline before this branch gets pulled. Signed-off-by: -
Arnd Bergmann authored
Merge tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical Merge non-urgent omap fixes from Tony Lindgren: Fixes for omaps that were not considered urgent enough for the rc series. Mostly a fix for GPMC allocation and omap5 ABB (Adaptive Body Bias). * tag 'omap-for-v3.17/fixes-not-urgent-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: omap2+: gpmc-nand: Use dynamic platform_device_alloc() omap16xx: Removes fixme no longer needed in ocpi_enable() ARM: dts: OMAP5: Add device nodes for ABB ARM: omap2+: usb-tusb6010.c: Cleaning up variable is set more than once Signed-off-by:
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Arnd Bergmann authored
Merge tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Merge "SoC related changes for omaps for v3.17 merge window" from Tony Lindgren: - Add device tree and hwmod data for various devices for new SoCs - Remove legacy mailbox hwmod data that's no longer needed for SoCs that are DT only. Note that this may cause a minor merge conflict in mach-omap2/devices.c with omap_init_mbox() and omap_init_hdmi_audio(), both are legacy code that is getting removed * tag 'omap-for-v3.17/soc-new' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: DRA7: hwmod: Add data for RTC arm: dra7xx: Add hwmod data for MDIO and CPSW arm: dra7xx: Add hwmod data for pcie1 and pcie2 subsystems arm: dra7xx: Add hwmod data for pcie1 phy and pcie2 phy ARM: DRA7: hwmod: Add OCP2SCP3 module ARM: DRA7: hwmod: remove interrupts for DMA ARM: OMAP2+: DMA: remove requirement of irq for platform-dma driver ARM: AM33xx: hwmod_data: Remove legacy mailbox addrs ARM: OMAP4: hwmod_data: Remove legacy mailbox addrs ARM: OMAP2: hwmod_data: Remove legacy mailbox data and addrs ARM: OMAP2+: Avoid mailbox legacy device creation for DT-boot ARM: DRA7: hwmod_data: Add mailbox hwmod data ARM: dts: DRA7: Add mailbox nodes ARM: dts: AM4372: Correct mailbox node data ARM: dts: AM33xx: Add mailbox node ARM: dts: OMAP4: Add mailbox node ARM: dts: OMAP2+: Add mailbox fifo and user information ARM: AM43xx: hwmod: add DSS hwmod data Signed-off-by:
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Arnd Bergmann authored
This is a dependency for the omap/soc branch Signed-off-by:
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- 25 Jul, 2014 2 commits
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Thomas Petazzoni authored
Following the merging of mach-kirkwood into mach-mvebu, the removal of mach-kirkwood, and the progress of the integration of mach-dove into mach-mvebu, this commit makes a few updates to the Marvell README file in the kernel documentation. Signed-off-by:
Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1406227593-29749-3-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by:
Jason Cooper <jason@lakedaemon.net>
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Thomas Petazzoni authored
Marvell has very recently released a public version of the "Functional specifications" and "Hardware specifications" datasheets for the Marvell Armada XP SoC. This allows contributors and developers not under NDA with Marvell to get more details about this SoC than what the current kernel code shows, and hopefully allows to improve the support for this SoC in the mainline kernel, as well as in other projects. Signed-off-by:
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- 24 Jul, 2014 17 commits
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Arnd Bergmann authored
When building a multiplatform kernel that enables 'ARCH_MVEBU' but none of the individual options under it, we get this link error: arch/arm/mach-mvebu/built-in.o: In function `mvebu_armada375_smp_wa_init': :(.text+0x190): undefined reference to `mvebu_setup_boot_addr_wa' The best solution seems to be to ensure that in this configuration, we don't actually build any of the mvebu code. Signed-off-by:
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Jason Cooper authored
Conflicts: arch/arm/mach-mvebu/pmsu.c
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Gregory CLEMENT authored
Unlike the Armada XP and the Armada 370, this SoC uses a Cortex A9 core. Consequently, the procedure to enter the idle state is different: interaction with the SCU, not disabling snooping, etc. Signed-off-by:
Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by:
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Gregory CLEMENT authored
This commit introduces the cpuidle support for Armada 370. The main difference compared to the already supported Armada XP is that the Armada 370 has an issue caused by "a slow exit process from the deep idle state due to heavy L1/L2 cache cleanup operations performed by the BootROM software" (cf errata GL-BootROM-10). To work around this issue, we replace the restart code of the BootROM by some custom code located in an internal SRAM. For this purpose, we use the common function mvebu_boot_addr_wa() introduced in the commit "ARM: mvebu: Add a common function for the boot address work around". The message in case of failure to suspend the system was switched from the warn level to the debug level. Indeed due to the "slow exit process from the deep idle state" in Armada 370, this situation happens quite often. Using the debug level avoids spamming the kernel logs, but still allows to enable it if needed. Signed-off-by:
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Thomas Petazzoni authored
This commit adds the list of cpuidle states supported by the Armada 38x SoC in the cpuidle-mvebu-v7 driver, as well as the necessary logic around it to support this SoC. Signed-off-by:
Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lkml.kernel.org/r/1406120453-29291-14-git-send-email-thomas.petazzoni@free-electrons.comSigned-off-by:
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Thomas Petazzoni authored
This commit adds the list of cpuidle states supported by the Armada 370 SoC in the cpuidle-mvebu-v7 driver, as well as the necessary logic around it to support this SoC. Signed-off-by:
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Gregory CLEMENT authored
This driver will be able to manage the cpuidle for more SoCs than just Armada 370 and XP. It will also support Armada 38x and potentially other SoC of the Marvell Armada EBU family. To take this into account, this patch renames the driver and its symbols. It also changes the driver name from cpuidle-armada-370-xp to cpuidle-armada-xp, because separate platform drivers will be registered for the other SoC types. This change must be done simultaneously in the cpuidle driver and in the PMSU code in order to remain bisectable. Signed-off-by:
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Gregory CLEMENT authored
The SCU address will be needed in other files than board-v7.c, especially in pmsu.c for cpuidle related activities. So this patch adds a function that allows to retrieve the virtual address at which the SCU has been mapped. Signed-off-by:
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Gregory CLEMENT authored
On some mvebu v7 SoCs (the ones using a Cortex-A9 core and not a PJ4B core), the snoop disabling feature does not exist as the hardware coherency is handled in a different way. Therefore, in preparation to the introduction of the cpuidle support for those SoCs, this commit modifies the mvebu_v7_psmu_idle_prepare() function to take several flags, which allow to decide whether snooping should be disabled, and whether we should use the deep idle mode or not. Signed-off-by:
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Gregory CLEMENT authored
The resume address used by the cpuidle code will not always be the same depending on the SoC. Using a local variable to store the resume address allows to keep the same function for the PM notifier but with a different address. This address will be set during the initialization of the cpuidle logic in pmsu.c. Signed-off-by:
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Gregory CLEMENT authored
In preparation to the addition of the cpuidle support for more SoCs, this patch moves the Armada XP specific initialization to a separate function. Signed-off-by:
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Gregory CLEMENT authored
Most of the function related to the PMSU are not specific to the Armada 370 or Armada XP SoCs. They can also be used for most of the other mvebu ARMv7 SoCs, and will actually be used to support cpuidle on Armada 38x. Signed-off-by:
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Gregory CLEMENT authored
Use the common function mvebu_setup_boot_addr_wa() introduced in the commit "ARM: mvebu: Add a common function for the boot address work around" instead of the dedicated version for Armada 375. This commit also moves the workaround in the system-controller module. Indeed the workaround on 375 is really related to setting the boot address which is done by the system controller. As a bonus we no longer use an harcoded value to access the register storing the boot address. Signed-off-by:
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Gregory CLEMENT authored
On some of the mvebu SoCs and due to internal BootROM issue, the CPU initial jump code must be placed in the SRAM memory of the SoC. In order to achieve this, we have to unmap the BootROM and at some specific location where the BootROM was placed, create a dedicated MBus window for the SRAM. This SRAM is initialized with a few instructions of code that allows to jump to the real secondary CPU boot address. The SRAM used is the Crypto engine one. This work around is currently needed for booting SMP on Armada 375 Z1 and will be needed for cpuidle support on Armada 370. Instead of duplicating the same code, this commit introduces a common function to handle it: mvebu_setup_boot_addr_wa(). Signed-off-by:
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Gregory CLEMENT authored
Sorting the headers in alphabetic order will help to reduce conflicts when adding new headers later. Signed-off-by:
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Gregory CLEMENT authored
do_armada_370_xp_cpu_suspend() and armada_370_xp_pmsu_idle_prepare(), have been merged into a single function called armada_370_xp_pmsu_idle_enter() by the commit "bbb92284 ARM: mvebu: slightly refactor/rename PMSU idle related functions", in prepare for the introduction of the CPU hotplug support for Armada XP. But for cpuidle the prepare function will be common to all the mvebu SoCs that use the PMSU, while the suspend function will be specific to each SoC. Keeping the prepare function separate will help reducing code duplication while new SoC support is added. Signed-off-by:
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Jason Cooper authored
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- 23 Jul, 2014 1 commit
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https://github.com/mbgg/linux-mediatekArnd Bergmann authored
Merge basic support for the Mediatek Cortex-A7 SoCs from Matthias Brugger: Support is quite basic, as the only component working up to now are the timers. * tag 'v3.17-next-mediatek-support' of https://github.com/mbgg/linux-mediatek: arm: mediatek: add dts for Aquaris5 mobile phone dt-bindings: add documentation for Mediatek SoC arm: add basic support for Mediatek MT6589 boards Signed-off-by: Matthias Brugger matthias.bgg@gmail.com Signed-off-by:
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