- 30 Jan, 2008 40 commits
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Zhang Xiantao authored
Move ioapic code to common, since IA64 also needs it. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This allows reuse of ioapic in ia64. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
This paves the way for multiple architecture support. Note that while ioapic.c could potentially be shared with ia64, it is also moved. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Ryan Harper authored
Add printk_ratelimit check in front of printk. This prevents spamming of the message during 32-bit ubuntu 6.06server install. Previously, it would hang during the partition formatting stage. Signed-off-by:
Ryan Harper <ryanh@us.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patch moves kvm_vm_stat to x86.h, and every arch can define its own kvm_vm_stat in $arch.h Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches moves two fields round_robin_prev_vcpu and tss to kvm_arch. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches moves two fields vpid and vioapic to kvm_arch Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches moves mmu-related fields to kvm_arch. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches create kvm_arch to hold arch-specific kvm fileds and moves fields naliases and aliases to kvm_arch. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches moves kvm_vcpu_stat to x86.h, so every arch can define its own kvm_vcpu_stat structure. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches removes KVM_COMM macro, original it is hold kvm_vcpu common fields. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
This patches moves kvm_vcpu definition to kvm.h, and finally kvm.h includes x86.h. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Since these functions need to know the details of kvm or kvm_vcpu structure, it can't be put in x86.h. Create mmu.h to hold them. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Move all the architecture-specific fields in kvm_vcpu into a new struct kvm_vcpu_arch. Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Acked-by:
Carsten Otte <cotte@de.ibm.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Zhang Xiantao authored
Signed-off-by:
Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Marcelo Tosatti authored
Emulate cmpxchg8b atomically on i386. This is required to avoid a guest pte walker from seeing a splitted write. [avi: make it compile] Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Joerg Roedel authored
This lets SVM ignore writes of the value 0 to the performance counter control registers. Thus enabling them will still fail in the guest, but a write of 0 which keeps them disabled is accepted. This is required to boot Windows Vista 64bit. [avi: avoid fall-thru in switch statement] Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Joerg Roedel authored
This patch fixes a compile error of the LAPIC code with APIC debugging enabled. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Marcelo Tosatti authored
There is a race where VCPU0 is shadowing a pagetable entry while VCPU1 is updating it, which results in a stale shadow copy. Fix that by comparing the contents of the cached guest pte with the current guest pte after write-protecting the guest pagetable. Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Joerg Roedel authored
With this patch KVM on SVM will exit to userspace if the guest writes to CR8 and the in-kernel APIC is disabled. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
In addition to removing some duplicated code, this also handles the unlikely case of real-mode code updating a guest page table. This can happen when one vcpu (in real mode) touches a second vcpu's (in protected mode) page tables, or if a vcpu switches to real mode, touches page tables, and switches back. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
As set_pte() no longer references either a gpte or the guest walker, we can move it out of paging mode dependent code (which compiles twice and is generally nasty). Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Unused. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
This allows us to remove its dependency on pt_element_t. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
We already set it according to cumulative access permissions. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
When we emulate a guest pte write, we fail to apply the correct inherited permissions from the parent ptes. Now that we store inherited permissions in the shadow page, we can use that to update the pte permissions correctly. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
While the page table walker correctly generates a guest page fault if a guest tries to execute a non-executable page, the shadow code does not mark it non-executable. This means that if a guest accesses an nx page first with a read access, then subsequent code fetch accesses will succeed. Fix by setting the nx bit on shadow ptes. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
The nx bit is awkwardly placed in the 63rd bit position; furthermore it has a reversed meaning compared to the other bits, which means we can't use a bitwise and to calculate compounded access masks. So, we simplify things by creating a new 3-bit exec/write/user access word, and doing all calculations in that. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Marcelo Tosatti authored
In preparation for multi-threaded guest pte walking, use cmpxchg() when updating guest pte's. This guarantees that the assignment of the dirty bit can't be lost if two CPU's are faulting the same address simultaneously. [avi: fix kunmap_atomic() parameters] Signed-off-by:
Marcelo Tosatti <mtosatti@redhat.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Later we may be able to use the virtual tpr feature, but for now, just trap it. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Stack instructions are always 64-bit on 64-bit mode; many of the emulated stack instructions did not take that into account. Fix by adding a 'Stack' bitflag and setting the operand size appropriately during the decode stage (except for 'push r/m', which is in a group with a few other instructions, so it gets its own treatment). This fixes random crashes on Vista x64. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Joerg Roedel authored
This patch adds code to emulate the access to the cr8 register to the x86 instruction emulator in kvm. This is needed on svm, where there is no hardware decode for control register access. Signed-off-by:
Joerg Roedel <joerg.roedel@amd.com> Signed-off-by:
Markus Rechberger <markus.rechberger@amd.com> Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
With apic in userspace, we must exit to userspace after a cr8 write in order to update the tpr. But if the apic is in the kernel, the exit is unnecessary. Noticed by Joerg Roedel. Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
We prepare eflags for the emulated instruction, then clobber it with an 'andl'. Fix by popping eflags as the last thing in the sequence. Patch taken from Xen (16143:959b4b92b6bf) Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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Avi Kivity authored
Signed-off-by:
Avi Kivity <avi@qumranet.com>
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