Add DT nodes for HDMI0 PHY and related syscon found on RK3588 SoC.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Link: https://lore.kernel.org/r/20240219204626.284399-1-cristian.ciocaltea@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add PCLK_VO1GRF to complement PCLK_VO0GRF. This will be needed
for HDMI support.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-4-sebastian.reichel@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

CLK_NR_CLKS should not be part of the binding. Let's drop it, since
the kernel code no longer uses it either.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-3-sebastian.reichel@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

CLK_NR_CLKS is not part of the DT bindings and needs to be removed
from it, just like it recently happened for other platforms. This
takes care of it by introducing a new function identifying the
maximum used clock ID at runtime.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20240126182919.48402-2-sebastian.reichel@collabora.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add the proper nodes to activate the USB 3.0 ports on the Indiedroid
Nova.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20240125201943.90476-3-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The rock-pi-e currently comes in 4 board spins, the latest one (v1.21)
swaps out the Realtek 8211e PHY for an 8211f PHY. Therefore modify the
phy-handle name to be more generic.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Link: https://lore.kernel.org/r/20240116204103.29318-1-twoerner@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Fix rk3399 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/a6ab6f75-3b80-40b1-bd30-3113e14becdd@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Fix rk3328 hdmi ports node so that it matches the
rockchip,dw-hdmi.yaml binding.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/e5dea3b7-bf84-4474-9530-cc2da3c41104@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The sdmmc node already have a "&sdmmc_det" for pinctrl which switch the
GPIO0A4 to sdmmc detect function, no need to define a separate "cd-gpios".

RK3588 has force_jtage feature which is enable JTAG function via sdmmc
pins automatically when there is no SD card insert, this feature will
need the GPIO0A4 works in sdmmc_det function like other mmc signal instead
of GPIO function, or else the force_jtag can not auto be disabled when
SD card insert.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20240201034621.1970279-1-kever.yang@rock-chips.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

A hardware switch can set the rs485 transceiver into half or full duplex
mode.

Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the
RTS signal for uart0. Implement GPIO0_B5 as rts-gpios with RTS_ON_SEND
option enabled (default) so that driver mode gets enabled while sending
(RTS high) and receiver mode gets enabled while not sending (RTS low).

In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and
RE is grounded (enabled). Since GPIO0_B5 is implemented as rts-gpios, the
driver mode gets enabled whenever we want to send something and RE is not
affected (always enabled) in this case by the state of RTS.
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-2-39e68e17a339@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

A hardware switch can set the rs485 transceiver into half or full duplex
mode.

Switching to the half-duplex mode requires the user to enable em485 on
uart5 using ioctl, DE/RE are both connected to GPIO2_C3 which is the
RTS signal for uart0. Implement GPIO2_C3 as rts-gpios with RTS_ON_SEND
option enabled (default) so that driver mode gets enabled while sending
(RTS high) and receiver mode gets enabled while not sending (RTS low).

In full-duplex mode (em485 is disabled), DE is connected to GPIO2_C3 and
RE is grounded (enabled). Since GPIO2_C3 is implemented as rts-gpios, the
driver mode gets enabled whenever we want to send something and RE is not
affected (always enabled) in this case by the state of RTS.
Signed-off-by: Farouk Bouabid <farouk.bouabid@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240208-dev-rx-enable-v6-1-39e68e17a339@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add support for the Powkiddy RGB10MAX3. The Powkiddy RGB10MAX3 is a
handheld gaming device with a 720p 5.0 inch screen powered by the
Rockchip RK3566 SoC. It includes a Realtek 8723ds WiFi/BT module, 2 ADC
joysticks powered by a 4-way muxed ADC channel, and several GPIO
face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), 3 pwm
controlled LEDs, and the device includes 1GB of RAM.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20240212184950.52210-8-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The Powkiddy RGB10MAX3 is a handheld gaming device made by Powkiddy and
powered by the Rockchip RK3566 SoC.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240212184950.52210-7-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Move the vdd_cpu regulator to the device specific dts. This is in
preparation of adding the Powkiddy RGB10MAX3 device, which uses
a different vendor for the CPU regulator at a different i2c address.

Also add a phandle to the bluetooth device so that we can change the
compatible string for the RGB10MAX3. This device uses the same pinouts
but a different bluetooth device.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Link: https://lore.kernel.org/r/20240212184950.52210-6-macroalpha82@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

This includes support for both the v0.1 units that were sent to developers and
the v2.0 units from production.

v1.0 is not included as no units are known to exist.

Working/Tested:
- SDMMC
- UART
- Buttons
- Charging/Battery/PMIC
- Audio
- USB
- Display
- SPI NOR Flash
Signed-off-by: Alexander Warnecke <awarnecke002@hotmail.com>
Signed-off-by: Manuel Traut <manut@mecka.net>
Tested-By: Diederik de Haas <didi.debian@cknow.org>
Reviewed-by: Ondrej Jirman <megi@xff.cz>
Tested-by: Ondrej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20240127-pinetab2-v4-4-37aab1c39194@mecka.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add devicvetree binding documentation for Pine64 PineTab2
which uses the Rockchip RK3566 SoC.
Signed-off-by: Manuel Traut <manut@mecka.net>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240127-pinetab2-v4-3-37aab1c39194@mecka.net
[moved Pinetab below Pinephone to keep alphabetical sorting]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Add the Goodix GT927 touchscreen to the Anbernic RG-ARC D.
Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Tested-by: Trooper_Max <troopermax@gmail.com>
Link: https://lore.kernel.org/r/20240201150620.886786-1-macroalpha82@gmail.com
[renamed node to generic touchscreen@14]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

sdmmc on the nanopc-t6 is powered by vcc3v3_sd_s0, not vcc_3v3_s3
add the vcc3v3_sd_s0 regulator, and control it with gpio4_a5
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20240102024054.1030313-1-inindev@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

An earlier commit defined an alias for all SPI controllers found on the
RK3399, so there's no need to duplicate the aliases in helios64's device
tree.

Cc: Quentin Schulz <foss+kernel@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-2-2009e44e734a@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

There are 6 SPI controllers on RK3399 and they are all numbered in the
TRM, so let's add the appropriate aliases to the main DTSI so that any
RK3399-based board doesn't need to define the aliases themselves to
benefit from stable SPI indices in userspace.

Cc: Quentin Schulz <foss+kernel@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240109-rk3399-spi-aliases-v1-1-2009e44e734a@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

NanoPi R6C is mostly same as R6S variant. It has M2 port instead of a
NIC port and different led labeling.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Link: https://lore.kernel.org/r/0f9ee0baa6c9de4d54dd6d13957ca15a63ec934f.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add basic NanoPi R6S support that comes with USB2, PCIe, SD card, eMMC
support.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Link: https://lore.kernel.org/r/6db3b653efc6f0a2dca8e96fdd0503906db72fb6.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add support for NanoPi R6 series boards that based on RK3588S.

NanoPi R6S basically has:
- USB3
- USB2
- eMMC
- 2x 2.5GBe & 1x 1GBe ethernet
- HDMI
- SD card support

Unlike R6S variant, NanoPi R6C has PCIe M.2 M-key instead of 1x 2.5GBe.
Signed-off-by: Muhammed Efe Cetin <efectn@protonmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/30c1c7eac02cd32b76edb77572523f6ad8de89fb.1703934548.git.efectn@protonmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The ROCK Pi 4A/B/C boards come with a 32 Mbit SPI NOR flash chip (XTX
Technology Limited XT25F32) with a maximum clock frequency of 108 MHz.
Use this value for the device node's spi-max-frequency property.

This patch has been tested on ROCK Pi 4A.
Signed-off-by: Stefan Nagy <stefan.nagy@ixypsilon.net>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20231217113208.64056-1-stefan.nagy@ixypsilon.netSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The nanopc-t6 has an sdmmc card detect connected to gpio0_a4 which is
active low.
Signed-off-by: John Clark <inindev@gmail.com>
Link: https://lore.kernel.org/r/20231230165053.3781-1-inindev@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Add missing cache information to the Rockchip RK3399 SoC dtsi.  The specified
values were derived by hand from the cache size specifications available from
the RK3399 datasheet;  for future reference, here's a brief summary:

  - Each Cortex-A72 core has 48 KB of L1 instruction cache and
    32 KB of L1 data cache available, four-way set associative
  - Each Cortex-A53 core core has 32 KB of instruction cache and
    32 KB of L1 data cache available, four-way set associative
  - The big (A72) cluster has 1 MB of unified L2 cache available
  - The little (A53) cluster has 512 KB of unified L2 cache available

This patch allows /proc/cpuinfo and lscpu(1) to display proper RK3399 cache
information, and it eliminates the following error in the kernel log:

  cacheinfo: Unable to detect cache hierarchy for CPU 0

While there, add a couple of somewhat useful comments, which may help a bit
anyone going through the RK3399 SoC dtsi.
Co-developed-by: Kyle Copperfield <kmcopper@danwin1210.me>
Signed-off-by: Kyle Copperfield <kmcopper@danwin1210.me>
Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/be3cbcae5c40fa72a52845d30dcc66c847a98cfa.1702616304.git.dsimic@manjaro.orgSigned-off-by: Heiko Stuebner <heiko@sntech.de>

By default the GPIO pin that connects to the WiFi enable signal
inside the M.2 Key E slot is driven low, resulting in impossibility
to connect to any network. Add a DT node to expose it as an RFKILL
device, which lets the WiFi driver or userspace toggle it as
required.
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20240106202650.22310-1-alchark@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The NanoPC-T6 has a Mini PCIe slot intended to be used for a 4G or LTE
modem. This slot has no PCIe functionality, only USB 2.0 pins are wired
to the SoC, and USIM pins are wired to a SIM card slot on the board.
Define the 3.3v supply for the slot so it can be used.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Link: https://lore.kernel.org/r/20240109202729.54292-1-sigmaris@gmail.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A, NCM6B SoM has Green LED on the module.

Enable them with heartbeat function.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-11-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has 2 port USB2.0 Host and USB2.0 on E-Key.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-10-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has M.2 B-Key, E-Key via PCI3x2.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-9-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has M.2 M-Key via PCI3x4.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-8-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO board has 2.5Gbps Ethernet via PCI2_0.

Add support for it.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-7-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The RK8602 and RK8603 voltage regulators on the Rock 5B board provide
the power lines vdd_cpu_big0 and vdd_cpu_big1, respectively.

Add the necessary device tree nodes and bind them to the corresponding
CPU big core nodes.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-6-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A SOM has on-module M.2 1216-compatible WiFi modules.

Currently, AW-XM548NF WiFi6 and Intel 8260D2W WiFi5 modules are supported.

WiFi modules are fixed on SoM, not pluggable M.2 slots, so different SoM's
for each type of WiFi module.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-5-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble Neu6a and Neu6b are compatible with common IO board.

So, maintain the IO board in rk3588-edgeble-neu6a-io.dtsi.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-4-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Edgeble NCM6A-IO is common compatible IO board for both NCM6A
and NCM6B. Add a common io DTSI for it to include them in both
NCM6A and NCM6B DTS files.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-3-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

The 'regulator-init-microvolt' property is not currently supported by
any driver, it was simply carried on from downstream kernels.

rk3588-edgeble-neu6b-io.dtb: pmic@0: regulators:dcdc-reg4: Unevaluated properties are not allowed ('regulator-init-microvolt' was unexpected)

Remove the invalid property.
Signed-off-by: Jagan Teki <jagan@edgeble.ai>
Link: https://lore.kernel.org/r/20231125190522.87607-2-jagan@edgeble.aiSigned-off-by: Heiko Stuebner <heiko@sntech.de>

Two pmuio domains on ringneck are not defined:
	1- PMUIO1: supplied by vcc_3v3 regulator(PMIC RK809)
	2- PMUIO2: supplied by vcc_3v3 regulator(PMIC RK809)

The reason why no functional effect was observed is because of that
the above mentionned PMUIO domains were supplied by a regulator
which is always on.

So let's add their definition in the dtsi.
Signed-off-by: Iskander Amara <iskander.amara@theobroma-systems.com>
Link: https://lore.kernel.org/r/20240103164734.1151290-1-iskander.amara@theobroma-systems.comSigned-off-by: Heiko Stuebner <heiko@sntech.de>