- 09 Mar, 2018 2 commits
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git://people.freedesktop.org/~agd5f/linuxDave Airlie authored
More stuff for 4.17. Highlights: - More fixes for "wattman" like functionality (fine grained clk/voltage control) - Add more power profile infrastucture (context based dpm) - SR-IOV fixes - Add iomem debugging interface for use with umr - Powerplay and cgs cleanups - DC fixes and cleanups - ttm improvements - Misc cleanups all over * 'drm-next-4.17' of git://people.freedesktop.org/~agd5f/linux: (143 commits) drm/amdgpu:Always save uvd vcpu_bo in VM Mode drm/amdgpu:Correct max uvd handles drm/amdgpu: replace iova debugfs file with iomem (v3) drm/amd/display: validate plane format on primary plane drm/amdgpu: Clean sdma wptr register when only enable wptr polling drm/amd/amdgpu: re-add missing GC 9.1 and SDMA0 4.1 sh_mask header files drm/amdgpu: give warning before sleep in kiq_r/wreg drm/amdgpu: further mitigate workaround for i915 drm/amdgpu: drop gtt->adev drm/amdgpu: add amdgpu_evict_gtt debugfs entry drm/amd/pp: Add #ifdef checks for CONFIG_ACPI drm/amd/pp: fix "Delete the wrapper layer of smu_allocate/free_memory" drm/amd/pp: Drop wrapper functions for upper/lower_32_bits drm/amdgpu: Delete cgs wrapper functions for gpu memory manager drm/amd/pp: Delete the wrapper layer of smu_allocate/free_memory drm/amd/pp: Remove cgs wrapper function for temperature update Revert "drm/amd/pp: Add a pp feature mask bit for AutoWattman feature" drm/amd/pp: Add auto power profilng switch based on workloads (v2) drm/amd/pp: Revert gfx/compute profile switch sysfs drm/amd/pp: Fix sclk in highest two levels when compute on smu7 ...
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git://linuxtv.org/pinchartl/mediaDave Airlie authored
- Convert LVDS support to a drm_bridge driver - Add DT bindings for the R8A77995 SoC - Add DT bindings and driver support for the R8A77970 SoC Note that the LVDS conversion depends on a patch series from Frank Rowand that will make it upstream through Rob Herring's tree. Frank has provided a stable branch based on v4.16-rc1 with the patches, and both Rob and I have merged it into our trees. This should thus generate no conflict when reaching -next. * 'drm/next/du' of git://linuxtv.org/pinchartl/media: dt-bindings: display: renesas: lvds: Document r8a77995 bindings dt-bindings: display: renesas: du: Document r8a77995 bindings drm: rcar-du: lvds: Add R8A77970 support drm: rcar-du: Add R8A77970 support dt-bindings: display: renesas: lvds: Document R8A77970 bindings dt-bindings: display: renesas: du: Document R8A77970 bindings drm: rcar-du: Convert LVDS encoder code to bridge driver drm: rcar-du: Fix legacy DT to create LVDS encoder nodes dt-bindings: display: renesas: Deprecate LVDS support in the DU bindings dt-bindings: display: renesas: Add R-Car LVDS encoder DT bindings of: improve reporting invalid overlay target path of: convert unittest overlay devicetree source to sugar syntax of: Documentation: of_overlay_apply() replaced by of_overlay_fdt_apply() of: change overlay apply input data from unflattened to FDT x86: devicetree: fix config option around x86_flattree_get_config()
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- 07 Mar, 2018 29 commits
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James Zhu authored
When UVD is in VM mode, there is not uvd handle exchanged, uvd.handles are always 0. So vcpu_bo always need save, Otherwise amdgpu driver will fail during suspend/resume. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105021Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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James Zhu authored
Max uvd handles should use adev->uvd.max_handles instead of AMDGPU_MAX_UVD_HANDLES here. Signed-off-by:
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Tom St Denis authored
This allows access to pages allocated through the driver with optional IOMMU mapping. v2: Fix number of bytes copied and add write method v3: drop check for kmap return Original-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Shirish S authored
In dce110, the plane configuration is such that plane 0 or the primary plane should be rendered with only RGB data. This patch adds the validation to ensure that no video data is rendered on plane 0. Signed-off-by:
Shirish S <shirish.s@amd.com> Reviewed-by:
Tony Cheng <Tony.Cheng@amd.com> Signed-off-by:
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Emily Deng authored
The sdma wptr polling memory is not fast enough, then the sdma wptr register will be random, and not equal to sdma rptr, which will cause sdma engine hang when load driver, so clean up the sdma wptr directly to fix this issue. v2:add comment above the code and correct coding style Reviewed-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by:
Emily Deng <Emily.Deng@amd.com> Signed-off-by:
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Tom St Denis authored
These are required by umr to properly parse bitfield offsets. Signed-off-by:
Alex Deucher <alexdeucher@amd.com> Signed-off-by:
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Monk Liu authored
to catch error that may schedule in atomic context early on Signed-off-by:
Monk Liu <Monk.Liu@amd.com> Reviewed-by:
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Christian König authored
Disable the workaround on imported BOs as well. Signed-off-by:
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Christian König authored
We can use ttm->bdev instead. Signed-off-by:
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Christian König authored
Allow evicting all BOs from the GTT domain. Signed-off-by:
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Rex Zhu authored
Fix compiling error when CONFIG_ACPI not enabled. Change-Id: I5f901adbc799c10b30e5ea79f8f44760e749fae1 Reviewed-by:
Rex Zhu <Rex.Zhu@amd.com>
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Christian König authored
For amdgpu_bo_create_kernel to work the handle must be NULL initialized, otherwise we only try to pin and map the BO. Signed-off-by:
Rex Zhu <rezhu@amd.com> Signed-off-by:
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Rex Zhu authored
replace smu_upper_32_bits/smu_lower_32_bits with the standard kernel macros Reviewed-by:
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Rex Zhu authored
delete those cgs interfaces: amdgpu_cgs_alloc_gpu_mem amdgpu_cgs_free_gpu_mem amdgpu_cgs_gmap_gpu_mem amdgpu_cgs_gunmap_gpu_mem amdgpu_cgs_kmap_gpu_mem amdgpu_cgs_kunmap_gpu_mem Reviewed-by:
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Rex Zhu authored
use amdgpu_bo_create/free_kernel instand. Reviewed-by:
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Rex Zhu authored
Reviewed-by:
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Rex Zhu authored
This reverts commit e429ea87b2939c4cce1b439baf6d76535a0767f2. Implement Workload Aware Dynamic power management instand of AutoWattman feature in linux. Reviewed-by:
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Rex Zhu authored
Add power profiling mode dynamic switch based on the workloads. Currently, support Cumpute, VR, Video, 3D,power saving with Cumpute have highest prority, power saving have lowest prority. in manual dpm mode, driver will stop auto switch, just save the client's requests. user can set power profiling mode through sysfs. when exit manual dpm mode, driver will response the client's requests. switch based on the client's prority. v2: squash in fixes from Rex Reviewed-by:
Evan Quan <evan.quan@amd.com> Signed-off-by:
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Kieran Bingham authored
The D3 (r8a77995) supports two LVDS channels. Extend the binding to support them. Signed-off-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> [Fixed compatible string] Reviewed-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by:
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Kieran Bingham authored
Document the D3 (r8a77995) SoC in the R-Car DU bindings. Signed-off-by:
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Sergei Shtylyov authored
Add support for the R-Car V3M (R8A77970) SoC to the LVDS encoder driver. Note that there are some differences with the other R-Car gen3 SoCs, e.g. LVDPLLCR has the same layout as in the R-Car gen2 SoCs. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Reviewed-by:
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Sergei Shtylyov authored
Add support for the R-Car V3M (R8A77970) SoC to the R-Car DU driver. Signed-off-by:
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Sergei Shtylyov authored
Document the R-Car V3M (R8A77970) SoC in the R-Car LVDS bindings. Signed-off-by:
Rob Herring <robh@kernel.org> Reviewed-by:
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Sergei Shtylyov authored
Document the R-Car V3M (R8A77970) SoC in the R-Car DU bindings. Signed-off-by:
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Laurent Pinchart authored
The LVDS encoders used to be described in DT as part of the DU. They now have their own DT node, linked to the DU using the OF graph bindings. This allows moving internal LVDS encoder support to a separate driver modelled as a DRM bridge. Backward compatibility is retained as legacy DT is patched live to move to the new bindings. Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
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Laurent Pinchart authored
The internal LVDS encoders now have their own DT bindings. Before switching the driver infrastructure to those new bindings, implement backward-compatibility through live DT patching. Patching is disabled and will be enabled along with support for the new DT bindings in the DU driver. Signed-off-by:
Frank Rowand <frank.rowand@sony.com>
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Laurent Pinchart authored
The internal LVDS encoders now have their own DT bindings, representing them as part of the DU is deprecated. Signed-off-by:
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Laurent Pinchart authored
The Renesas R-Car Gen2 and Gen3 SoCs have internal LVDS encoders. Add corresponding device tree bindings. Signed-off-by:
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Laurent Pinchart authored
Merge tag 'overlay_apply_fdt_v7-for-4.17' of git://git.kernel.org/pub/scm/linux/kernel/git/frowand/linux into drm/next/du - DT overlay applying rework (Frank Rowand) Move duplicating and unflattening of an overlay flattened devicetree (FDT) into the overlay application code. To accomplish this, of_overlay_apply() is replaced by of_overlay_fdt_apply().
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- 06 Mar, 2018 6 commits
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Rex Zhu authored
The gfx/compute profiling mode switch is only for internally test. Not a complete solution and unexpectly upstream. so revert it. Reviewed-by:
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Rex Zhu authored
Compute workload tends to be "bursty", Only tune the behavior of nature dpm don't work well for most of such workloads. From test results, Fix sclk in highest two levels can get better performance. so add min sclk setting into the default cumpute workload policy on smu7. user still can change sclk range through sysfs pp_dpm_sclk for better perf/watt. Reviewed-by:
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Rex Zhu authored
It show what parameters can be configured to tune the behavior of natural dpm for perf/watt on smu7. user can select the mode per workload, but even the default per workload settings are not bulletproof. user can configure custom settings per different use case for better perf or better perf/watt. cat pp_power_profile_mode NUM MODE_NAME SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL 0 3D_FULL_SCREEN: 0 100 30 0 100 10 1 POWER_SAVING: 10 0 30 - - - 2 VIDEO: - - - 10 16 31 3 VR: 0 11 50 0 100 10 4 COMPUTE: 0 5 30 - - - 5 CUSTOM: 0 0 0 0 0 0 * CURRENT: 0 100 30 0 100 10 Under manual dpm level, user can echo "0/1/2/3/4">pp_power_profile_mode to select 3D_FULL_SCREEN/POWER_SAVING/VIDEO/VR/COMPUTE mode. echo "5 * * * * * * * *">pp_power_profile_mode to set custom settings. "5 * * * * * * * *" mean "CUSTOM enable_sclk SCLK_UP_HYST SCLK_DOWN_HYST SCLK_ACTIVE_LEVEL enable_mclk MCLK_UP_HYST MCLK_DOWN_HYST MCLK_ACTIVE_LEVEL" if the parameter enable_sclk/enable_mclk is true, driver will update the following parameters to dpm table. if false, ignore the following parameters. Reviewed-by:
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Rex Zhu authored
use SW method to update DPM settings by updating SRAM directly on CI. Reviewed-by:
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Rex Zhu authored
use SW method to update DPM settings by updating SRAM directly on Tonga. Reviewed-by:
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Rex Zhu authored
use SW method to update DPM settings by updating SRAM directly on Fiji. Reviewed-by:
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- 05 Mar, 2018 3 commits
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Alex Deucher authored
Always set the graphics values to the max for the asic type. E.g., some 1 RB chips are actually 1 RB chips, others are actually harvested 2 RB chips. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99353Reviewed-by:
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Alex Deucher authored
Always set the graphics values to the max for the asic type. E.g., some 1 RB chips are actually 1 RB chips, others are actually harvested 2 RB chips. Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=99353Reviewed-by:
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Rex Zhu authored
v2: lock dpm level when update pptable by SW method use SW method to update DPM settings by updating SRAM directly on Polaris. Reviewed-by:
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