- 27 Mar, 2020 10 commits
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Ajay Kishore authored
For IPQ806x targets, TZ protects the registers that are used to configure the routing of interrupts to a target processor. To resolve this, this patch uses scm call to route GPIO interrupts to application processor. Also the scm call interface is changed. Signed-off-by:
Ajay Kishore <akisho@codeaurora.org> Signed-off-by:
Ansuel Smith <ansuelsmth@gmail.com> Link: https://lore.kernel.org/r/20200327223209.20409-1-ansuelsmth@gmail.comReviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Linhua Xu authored
For Spreadtrum pin controller, it will be the high impedance mode if disable input and output mode for a pin. Thus add PIN_CONFIG_BIAS_HIGH_IMPEDANCE configuration to support it. Signed-off-by:
Linhua Xu <linhua.xu@unisoc.com> Signed-off-by:
Baolin Wang <baolin.wang7@gmail.com> Link: https://lore.kernel.org/r/3bdac4c2673b54c940e511f3fa569ee33b87b8d5.1585124562.git.baolin.wang7@gmail.comSigned-off-by:
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Linhua Xu authored
The Spreadtrum pin controller did not supply registers to set high level or low level for output mode, instead we should let the pin controller current configuration drive values on the line. So we should use the PIN_CONFIG_OUTPUT_ENABLE configuration to enable or disable the output mode. [Baolin Wang changes the commit message] Fixes: 41d32cfc ("pinctrl: sprd: Add Spreadtrum pin control driver") Signed-off-by:
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Thierry Reding authored
Prior to Tegra186, the selection of SFIO vs. GPIO modes was done as part of the GPIO controller's register programming. Starting with Tegra186, a pin is configured as GPIO or SFIO with a bit in a configuration register of the pin controller. Signed-off-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20200319122737.3063291-10-thierry.reding@gmail.comTested-by:
Vidya Sagar <vidyas@nvidia.com> Signed-off-by:
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Thierry Reding authored
There is no need to define these at a specific offset since they are the only pins defined for this SoC generation. Begin numbering them at 0. Signed-off-by:
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Thierry Reding authored
On Tegra194, almost all of the pin control programming happens in early boot firmware, so there is no use in having a pin range defined for all the pins. Signed-off-by:
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Thierry Reding authored
Pass the struct tegra_pmx when checking for the pin range in device tree. This makes the call site a bit easier to read and will help keep that readability in a subsequent patch. Signed-off-by:
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Thierry Reding authored
Properly spell "Schmitt" in the kerneldoc for pin group definitions. Signed-off-by:
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Thierry Reding authored
Fix a few whitespace inconsistencies to make the code easier to read. Signed-off-by:
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Takashi Iwai authored
Since snprintf() returns the would-be-output size instead of the actual output size, the succeeding calls may go beyond the given buffer limit. Fix it by replacing with scnprintf(). Signed-off-by:
Takashi Iwai <tiwai@suse.de> Link: https://lore.kernel.org/r/20200311090644.20287-1-tiwai@suse.deSigned-off-by:
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- 25 Mar, 2020 2 commits
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Peng Fan authored
Moving to support aarch32 mode on aarch64 hardware, need to drop the dependency on ARM64 to make the driver could be selected for ARM32. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/1584070036-26447-2-git-send-email-peng.fan@nxp.comAcked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Linus Walleij authored
This reverts commit 06e26b75. According to discussions, it causes a regression. Signed-off-by:
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- 12 Mar, 2020 2 commits
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Jonathan Neuschäfer authored
Signed-off-by:
Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20200308214230.15193-1-j.neuschaefer@gmx.netAcked-by:
Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by:
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Igor Vavro authored
Add the tsin pinctrl definitions needed for integrated DVB hardware support on Meson GXBB/GXL/GXM boards. changes in v2 - fix ordering and numbering of uart_c ping flagged by Otto in [1] [1] http://lists.infradead.org/pipermail/linux-amlogic/2020-March/015906.htmlSigned-off-by:
Igor Vavro <afl2001@gmail.com> [updated commit message] Signed-off-by:
Christian Hewitt <christianshewitt@gmail.com> Link: https://lore.kernel.org/r/1583377666-13378-1-git-send-email-christianshewitt@gmail.comReviewed-by:
Neil Armstrong <narmstrong@baylibre.com> Signed-off-by:
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- 03 Mar, 2020 1 commit
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Baolin Wang authored
On X86 plaform, if the CONFIG_OF is not selected, and set the CONFIG_SPRD_SC9860 as 'm', that will cause below waring: WARNING: unmet direct dependencies detected for PINCTRL_SPRD Depends on [n]: PINCTRL [=y] && OF [=n] && (ARCH_SPRD || COMPILE_TEST [=y]) Selected by [m]: - PINCTRL_SPRD_SC9860 [=m] && PINCTRL [=y] Thus move the configuration dependency under CONFIG_PINCTRL_SPRD_SC9860 to fix the warning. Reported-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
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- 02 Mar, 2020 1 commit
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Paul Boddie authored
Signed-off-by:
Paul Boddie <paul@boddie.org.uk> Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Link: https://lore.kernel.org/r/010d6ad3473fb4b1f1041888a071796180cdd838.1582913973.git.hns@goldelico.comSigned-off-by:
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- 28 Feb, 2020 4 commits
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Gustavo A. R. Silva authored
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by:Gustavo A. R. Silva <gustavo@embeddedor.com> Link: https://lore.kernel.org/r/20200227185837.GA4469@embeddedorSigned-off-by:
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Baolin Wang authored
Change the config to 'tristate' and export some symbols needed by modules to allow the Spreadtrum pinctrl driver building into a module. Signed-off-by:
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Baolin Wang authored
Export the pin_get_name()/pinconf_generic_parse_dt_config() symbols needed by the Spreadtrum pinctrl driver when building it as a module. Signed-off-by:
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YueHaibing authored
gcc 7.4.0 build fails: drivers/pinctrl/pinctrl-da9062.c:28:10: fatal error: ../gpio/gpiolib.h: No such file or directory #include <../gpio/gpiolib.h> ^~~~~~~~~~~~~~~~~~~ Fix this wrong include path. Fixes: 56cc3af4 ("pinctrl: da9062: add driver support") Signed-off-by:YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20200228063429.47528-1-yuehaibing@huawei.comReviewed-by:
Marco Felsch <m.felsch@pengutronix.de> Signed-off-by:
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- 26 Feb, 2020 1 commit
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Linus Walleij authored
Merge tag 'sh-pfc-for-v5.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.7 - Improve checks for pinctrl table validation, - Miscellaneous cleanups.
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- 25 Feb, 2020 1 commit
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Marco Felsch authored
The function was currently used internal by the gpiolib. Since commit 56cc3af4 ("pinctrl: da9062: add driver support") it is also used by drivers so we need to export the symbol. Signed-off-by:
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- 21 Feb, 2020 18 commits
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Dan Carpenter authored
These comparisons should be >= instead of > to prevent accessing one element beyond the end of the hw->soc->pins[] array. Fixes: 3de7deef ("pinctrl: mediatek: Check gpio pin number and use binary search in mtk_hw_pin_field_lookup()") Fixes: 184d8e13 ("pinctrl: mediatek: Add support for pin configuration dump via debugfs.") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20200218055247.74s2xa7veqx2do34@kili.mountainReviewed-by:
Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by:
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Josh Poimboeuf authored
In the second loop of ingenic_pinconf_set(), it annotates the switch default case as unreachable(). The annotation is technically correct, because that same case would have resulted in an early function return in the previous loop. However, the compiled code is suboptimal. GCC seems to work extra hard to ensure that the unreachable code path triggers undefined behavior. The function would fall through to start executing whatever function happens to be next in the compilation unit. This is problematic because: a) it adds unnecessary 'ensure undefined behavior' logic, and corresponding i-cache footprint; and b) it's less robust -- if a bug were to be introduced, falling through to the next function would be catastrophic. Yet another issue is that, while objtool normally understands unreachable() annotations, there's one special case where it doesn't: when the annotation occurs immediately after a 'ret' instruction. That happens to be the case here because unreachable() is immediately before the return. Remove the unreachable() annotation and replace it with a comment. This simplifies the code generation and changes the unreachable error path to just silently return instead of corrupting execution. This fixes the following objtool warning: drivers/pinctrl/pinctrl-ingenic.o: warning: objtool: ingenic_pinconf_set() falls through to next function ingenic_pinconf_group_set() Reported-by:Josh Poimboeuf <jpoimboe@redhat.com> Link: https://lore.kernel.org/r/bc20fdbcb826512cf76b7dfd0972740875931b19.1582212881.git.jpoimboe@redhat.comSigned-off-by:
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Ansuel Smith authored
Add missing gpio definition for mdio and rgmii2. Signed-off-by:
Ram Chandra Jangir <rjangir@codeaurora.org> Signed-off-by:
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Anson Huang authored
The items of mux_reg/conf_reg/input_reg/mux_val/input_val/pad_setting should be uint32-matrix instead of uint32-array, fix it and improve the schema and example. Signed-off-by:
Anson Huang <Anson.Huang@nxp.com> Link: https://lore.kernel.org/r/1582012300-30260-4-git-send-email-Anson.Huang@nxp.comReviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Anson Huang authored
Convert the i.MX8MN pinctrl binding to DT schema format using json-schema Signed-off-by:
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Anson Huang authored
Convert the i.MX8MM pinctrl binding to DT schema format using json-schema Signed-off-by:
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Anson Huang authored
Convert the i.MX8MQ pinctrl binding to DT schema format using json-schema Signed-off-by:
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Gustavo A. R. Silva authored
The current codebase makes use of the zero-length array language extension to the C90 standard, but the preferred mechanism to declare variable-length types such as these ones is a flexible array member[1][2], introduced in C99: struct foo { int stuff; struct boo array[]; }; By making use of the mechanism above, we will get a compiler warning in case the flexible array does not occur last in the structure, which will help us prevent some kind of undefined behavior bugs from being inadvertently introduced[3] to the codebase from now on. Also, notice that, dynamic memory allocations won't be affected by this change: "Flexible array members have incomplete type, and so the sizeof operator may not be applied. As a quirk of the original implementation of zero-length arrays, sizeof evaluates to zero."[1] This issue was found with the help of Coccinelle. [1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html [2] https://github.com/KSPP/linux/issues/21 [3] commit 76497732 ("cxgb3/l2t: Fix undefined behaviour") Signed-off-by:Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
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周琰杰 (Zhou Yanjie) authored
Add lcd pinctrl driver for X1830. Signed-off-by:
周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1581851828-3493-3-git-send-email-zhouyanjie@wanyeetech.comSigned-off-by:
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Matti Vaittinen authored
Use newly added GPIO defines GPIO_LINE_DIRECTION_IN and GPIO_LINE_DIRECTION_OUT instead of using hard-coded 1 and 0. Main benefit is to make it easier to see which values mean IN and which OUT. As a side effect this helps GPIO framework to change the direction defines to something else if ever needed. Please note that return value from get_direction call on pinctrl-axp209 driver was changed. Previously pinctrl-axp209 might have returned value 2 for direction INPUT. Signed-off-by:
Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reported-by:
kbuild test robot <lkp@intel.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Acked-by:
Jacopo Mondi <jacopo+renesas@jmondi.org> Link: https://lore.kernel.org/r/20200214135712.GA14557@localhost.localdomainSigned-off-by:
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Samuel Holland authored
The pin controller hardware does not distinguish IRQs intended for wakeup from other IRQs, so we must mask non-wakeup IRQs in software to prevent inadvertent wakeups. This is accomplished at the irqchip level via the IRQCHIP_MASK_ON_SUSPEND flag. Signed-off-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20200117213340.47714-2-samuel@sholland.orgAcked-by:
Maxime Ripard <mripard@kernel.org> Signed-off-by:
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Samuel Holland authored
The pinctrl irqchip may be connected to an irqchip that implements the .irq_set_wake callback, such as the R_INTC on A31 and newer sunxi SoCs. In order for GPIOs to be able to trigger wakeup, the IRQ from the pinctrl to the upper irqchip must also be enabled for wakeup. Since the kernel's IRQ core already manages the "wake_depth" of each IRQ, no additional accounting is needed in the pinctrl driver. Signed-off-by:
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Geert Uytterhoeven authored
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and CONFIG_ARCH_R8A77951 in commit b925adfc ("soc: renesas: Add ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed. Signed-off-by:
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Geert Uytterhoeven authored
As of commit 4adeabd0 ("pinctrl: sh-pfc: Remove hardcoded IRQ numbers"), only a single operation needs to be performed after finding the wanted pin. Hence decrease the needed attention span of the casual reader by replacing the goto by a direct return. Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
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Geert Uytterhoeven authored
Add checks for legacy function GPIO descriptors: 1. Function GPIOs must have a name, 2. Names must be unique, 3. Enum ID values must be unique. This exposes bugs like those fixed in - commit 884caada ("pinctrl: sh-pfc: sh7734: Fix duplicate TCLK1_B"), - commit 55b1cb1f ("pinctrl: sh-pfc: sh7264: Fix CAN function GPIOs"), - commit 02aeb2f2 ("pinctrl: sh-pfc: sh7269: Fix CAN function GPIOs"), - commit db9c0727 ("sh: sh7264: Remove bogus SSU GPIO function definitions"), - commit b4fba344 ("sh: sh7269: Remove bogus SSU GPIO function definitions"). Signed-off-by:
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Geert Uytterhoeven authored
Add checks for data register descriptors: 1. Register addresses must be unique. 2. Enum ID values must be unique. Signed-off-by:
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Geert Uytterhoeven authored
Add checks for generic control register descriptors: 1. Register addresses must be unique. Signed-off-by:
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Geert Uytterhoeven authored
Add checks for bias register descriptors: 1. Pull-up and optional pull-down register addresses must be unique, 2. Referred pins must exist. Signed-off-by:
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