- 17 Apr, 2023 5 commits
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David E. Box authored
On some platforms, it may take up to 400ms for the ready bit to be set in a successful mailbox transaction. Set the timeout to 500ms to cover the worst case. Signed-off-by:
David E. Box <david.e.box@linux.intel.com> Reviewed-by:
Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230413013230.1521584-1-david.e.box@linux.intel.comSigned-off-by:
Hans de Goede <hdegoede@redhat.com>
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David E. Box authored
On Intel Xeon, unused PMT regions will have uninitialized discovery headers containing all 0xF. Instead of returning an error, just skip the region. Signed-off-by:
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Shyam Sundar S K authored
Some platforms do not support hardware backed s0i3 transitions. When such CPUs are detected, provide a warning message to the user. Suggested-by:
Sanket Goswami <Sanket.Goswami@amd.com> Signed-off-by:
Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Reviewed-by:
Mario Limonciello <mario.limonciello@amd.com> Link: https://lore.kernel.org/r/20230412111500.2602529-1-Shyam-sundar.S-k@amd.comReviewed-by:
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Feng Jiang authored
Function amd_pmc_stb_debugfs_open_v2() may be called when the STB debug mechanism enabled. When amd_pmc_send_cmd() fails, the 'buf' needs to be released. Signed-off-by:
Feng Jiang <jiangfeng@kylinos.cn> Link: https://lore.kernel.org/r/20230412093734.1126410-1-jiangfeng@kylinos.cnReviewed-by:
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Liming Sun authored
This commit adds sysfs file for BlueField boot fifo. The boot fifo is usually used to push boot stream via USB or PCIe. Once OS is up, it can be reused by applications to read data or configuration from external host. Signed-off-by:
Liming Sun <limings@nvidia.com> Reviewed-by:
David Thompson <davthompson@nvidia.com> Link: https://lore.kernel.org/r/52b0b00dacbc4aad3169dd3667d79c85e334783b.1680657571.git.limings@nvidia.comReviewed-by:
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- 11 Apr, 2023 9 commits
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Hans de Goede authored
Now that the pmc code has switched to DEFINE_SIMPLE_DEV_PM_OPS() the __maybe_unused is no longer necessary, drop it. Signed-off-by:
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David E. Box authored
On Meteor Lake, the GNA, IPU, and VPU devices are booted in D0 power state and will block the SoC from going into the deepest Package C-state if a driver is not present. Put each device in D3hot if no driver is found. Signed-off-by:
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Shyam Sundar S K authored
The current SMN index used for the driver probe seems to be meant for the BIOS pair and there are potential concurrency problems that can occur with an inopportune SMI. It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_6, which is what amd_nb.c provides and this function has protections to ensure that only one caller can use it at a time. Fixes: 426c0ff2 ("platform/x86: amd-pmc: Add support for AMD Smart Trace Buffer") Co-developed-by:
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Shyam Sundar S K authored
The current SMN index used for the driver probe seems to be meant for the BIOS pair and there are potential concurrency problems that can occur with an inopportune SMI. It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_2, which is what amd_nb.c provides and this function has protections to ensure that only one caller can use it at a time. Fixes: 156ec473 ("platform/x86: amd-pmc: Add AMD platform support for S2Idle") Co-developed-by:
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Mario Limonciello authored
The version check requirement for idle mask support actually only applies to RN/CZN/BRC platforms. So far no issues have happened because the PMFW version string is bigger on other supported systems. This can be reset for any new platform so move the check to only RN/CZN/BRC case. Fixes: f6045de1 ("platform/x86: amd-pmc: Export Idlemask values based on the APU") Signed-off-by:
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Mario Limonciello authored
This command isn't supported on Picasso, so guard against running it to avoid errors like `SMU cmd unknown. err: 0xfe` in the logs. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449 Fixes: 76620567 ("platform/x86: amd-pmc: Add support for logging SMU metrics") Signed-off-by:
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Mario Limonciello authored
As the command to get version isn't supported on Picasso, we shouldn't be exposing this into sysfs either. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449 Fixes: 7f1ea75d ("platform/x86/amd: pmc: Add sysfs files for SMU") Signed-off-by:
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Mario Limonciello authored
Picasso doesn't support the command in the uPEP mailbox to try to read the SMU version. Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2449 Fixes: f6045de1 ("platform/x86: amd-pmc: Export Idlemask values based on the APU") Signed-off-by:
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Shyam Sundar S K authored
The current SMN index used for the driver probe seems to be meant for the BIOS pair and there are potential concurrency problems that can occur with an inopportune SMI. It is been advised to use SMN_INDEX_0 instead of SMN_INDEX_2, which is what amd_nb.c provides and this function has protections to ensure that only one caller can use it at a time. Fixes: da5ce22d ("platform/x86/amd/pmf: Add support for PMF core layer") Co-developed-by:
Patil Rajesh Reddy <Patil.Reddy@amd.com> Signed-off-by:
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- 07 Apr, 2023 1 commit
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Srinivas Pandruvada authored
Make Intel uncore frequency driver support to client processor starting from Alder Lake. Signed-off-by:
Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230330145939.1022261-1-srinivas.pandruvada@linux.intel.comReviewed-by:
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- 06 Apr, 2023 8 commits
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Khalil Blaiech authored
Add a new sysfs to initiate firmware reset in isolation mode. Reviewed-by:
Khalil Blaiech <kblaiech@nvidia.com> Link: https://lore.kernel.org/r/10da04fa43e8acce5d4ec173e225c28b9e979e4b.1675790783.git.kblaiech@nvidia.comSigned-off-by:
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Hans de Goede authored
Fix the __iomem annotation of the iomem_base pointers in the apple-gmux code. The __iomem should go before the *. This fixes a bunch of sparse warnings like this one: drivers/platform/x86/apple-gmux.c:224:48: sparse: expected void const [noderef] __iomem * got unsigned char [usertype] * Fixes: 0c18184d ("platform/x86: apple-gmux: support MMIO gmux on T2 Macs") Reported-by:
kernel test robot <lkp@intel.com> Link: https://lore.kernel.org/oe-kbuild-all/202304040401.IMxt7Ubi-lkp@intel.com/Suggested-by:
Dan Carpenter <error27@gmail.com> Signed-off-by:
Orlando Chamberlain <orlandoch.dev@gmail.com> Link: https://lore.kernel.org/r/20230404111955.43266-1-hdegoede@redhat.com
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Hans de Goede authored
The Lenovo Yoga Book X90F/L is a x86 ACPI tablet which ships with Android x86 as factory OS. Its DSDT contains a bunch of I2C devices which are not actually there, causing various resource conflicts. Enumeration of these is skipped through the acpi_quirk_skip_i2c_client_enumeration(). Add support for manually instantiating the I2C + other devices which are actually present on this tablet by adding the necessary device info to the x86-android-tablets module. Signed-off-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20230401150737.597417-3-hdegoede@redhat.com
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Hans de Goede authored
Various Lenovo models use a TI LP8557 LED backlight controller and the necessary platform_data is the same for the different models. Currently there are 2 identical copies and the upcoming support for the Lenovo Yoga Book X90F/L would add a 3th identical copy. Move to sharing the lp855x_platform_data between different models to avoid this duplication. Signed-off-by:
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Hans de Goede authored
Both the Lenovo Yoga Tablet 2 830 and 1050 models use an TI LP8557 LED backlight controller. On the 1050 the LP8557's PWM input is connected to the PMIC's PWM output and everything works fine with the defaults programmed into the LP8557 by the BIOS. But on the 830 the LP8557's PWM input is connected to a PWM output coming from the LCD panel's controller. The Android code has a hack in the i915 driver to write the non-standard DSI reg 0x9f with the desired backlight level to set the duty-cycle of the LCD's PWM output. To avoid having to have a similar hack in the mainline kernel the LP8557 entry in lenovo_yoga_tab2_830_1050_i2c_clients instead just programs the LP8557 to directly set the level, ignoring the PWM input. So far we have only been instantiating the LP8557 i2c_client for direct backlight control on the 830 model. But we want hide/disable the intel_backlight interface on the 830 model to avoid having 2 backlight interfaces for the same LCD panel. And the 830 and 1050 share the same DMI strings. So this will hide the intel_backlight interface on the 1050 model too. To avoid this causing problems make the backlight handling consistent between the 2 models and always directly use the LP8557. This also simplifies the code. Signed-off-by:
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Thomas Weißschuh authored
These casts are unnecessary and could break if structure layouts are randomized or implementation details change. Use the proper syntax that works without casts. Also remove some unnecessary braces that checkpatch complains about. Signed-off-by:
Thomas Weißschuh <linux@weissschuh.net> Link: https://lore.kernel.org/r/20230329-think-lmi-attrs-v1-1-5794f2367cc2@weissschuh.netReviewed-by:
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Gergo Koteles authored
This WMI driver for the tablet mode control switch for Lenovo Yoga notebooks was originally written by Gergo Koteles. The mode is mapped to a SW_TABLET_MODE switch capable input device. Andrew followed the suggestions that were posted in reply to Gergo's RFC patch, and on the v1 & v2 versions of this patch to follow-up and get it merged. Changes from Gergo's RFC: - Refactored obtaining a reference to the EC ACPI device needed for the quirk implementation as suggested by Hans de Goede - Applied small fixes and switched to always registering handles with the driver for automatic cleanup as suggested by Barnabás Pőcze. - Merged the lenovo_ymc_trigger_ec function with the ideapad_trigger_ymc_next_read function since it was no longer external. - Added the word "Tablet" to the driver description to hopefully make it more clear. - Fixed the LENOVO_YMC_QUERY_METHOD ID and the name string for the EC APCI device trigged for the quirk - Triggered the input event on probe so that the initial tablet mode state when the driver is loaded is reported to userspace as suggested by Armin Wolf. - Restricted the permissions of the ec_trigger parameter as suggested by Armin Wolf. Also updated the description. We have tested this on the Yoga 7 14AIL7 for the non-quirk path and on the Yoga 7 14ARB7 which has the firmware bug that requires triggering the embedded controller to send the mode change events. This workaround is also used by the Windows drivers. According to reports at https://github.com/lukas-w/yoga-usage-mode, which uses the same WMI devices, the following models should also work: Yoga C940, Ideapad flex 14API, Yoga 9 14IAP7, Yoga 7 14ARB7, etc. Signed-off-by:
Gergo Koteles <soyer@irl.hu> Co-developed-by:
Andrew Kallmeyer <kallmeyeras@gmail.com> Signed-off-by:
André Apitzsch <git@apitzsch.eu> Link: https://lore.kernel.org/r/20230329014559.44494-3-kallmeyeras@gmail.comReviewed-by:
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Andrew Kallmeyer authored
These functions will be used by a driver written by Gergo Koteles to detect the tablet mode switch in Lenovo Yoga laptops. These changes were discussed in review of that patch. This is the minimal set of functions needed in that driver, there are several more small functions left in the ACPI Helpers section in ideapad-laptop.c. The only change is the functions are now marked inline as requested in the review comments. Signed-off-by:
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- 27 Mar, 2023 12 commits
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Dan Carpenter authored
Call mutex_unlock(&isst_tpmi_dev_lock) before returning on this error path. Fixes: d805456c ("platform/x86: ISST: Enumerate TPMI SST and create framework") Signed-off-by:
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Jithu Joseph authored
Array BIST test doesn't need an IFS test image to operate unlike the SCAN test. Consequently current_batch and image_version files are not applicable for Array BIST IFS device instance, clarify this in the ABI doc. Also given that multiple tests are supported, take the opportunity to generalize descriptions wherever applicable. Signed-off-by:
Jithu Joseph <jithu.joseph@intel.com> Reviewed-by:
Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20230322003359.213046-10-jithu.joseph@intel.comReviewed-by:
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Jithu Joseph authored
Array BIST is the second test supported by IFS. Modify IFS doc entry to be more general. Signed-off-by:
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Jithu Joseph authored
Array BIST test (for a particular core) is triggered by writing to MSR_ARRAY_BIST from one sibling of the core. This will initiate a test for all supported arrays on that CPU. Array BIST test may be aborted before completing all the arrays in the event of an interrupt or other reasons. In this case, kernel will restart the test from that point onwards. Array test will also be aborted when the test fails, in which case the test is stopped immediately without further retry. Signed-off-by:
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Jithu Joseph authored
The interface to trigger Array BIST test and obtain its result is similar to the existing scan test. The only notable difference is that, Array BIST doesn't require any test content to be loaded. So binary load related options are not needed for this test. Add sysfs interface for array BIST test, the testing support will be added by subsequent patch. Signed-off-by:
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Jithu Joseph authored
Array BIST is a new type of core test introduced under the Intel Infield Scan (IFS) suite of tests. Emerald Rapids (EMR) is the first CPU to support Array BIST. Array BIST performs tests on some portions of the core logic such as caches and register files. These are different portions of the silicon compared to the parts tested by the first test type i.e Scan at Field (SAF). Make changes in the device driver init flow to register this new test type with the device driver framework. Each test will have its own sysfs directory (intel_ifs_0 , intel_ifs_1) under misc hierarchy to accommodate for the differences in test type and how they are initiated. Upcoming patches will add actual support. Signed-off-by:
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Jithu Joseph authored
Define MSR bitfields for enumerating support for Array BIST test. Signed-off-by:
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Jithu Joseph authored
Cleanup incorporating misc review comments - Remove the subdirectory intel_ifs/0 for devicenode [1] - Make plat_ifs_groups non static and use it directly without using a function [2] Link: https://lore.kernel.org/lkml/Y+4kQOtrHt5pdsSO@kroah.com/ [1] Link: https://lore.kernel.org/lkml/Y9nyxNesVHCUXAcH@kroah.com/ [2] Signed-off-by: -
Jithu Joseph authored
The struct holding device driver data contained both read only(ro) and read write(rw) fields. Separating ro fields from rw fields was recommended as a preferable design pattern during review[1]. Group ro fields into a separate const struct. Associate it to the miscdevice being registered by keeping its pointer in the same container struct as the miscdevice. Link: https://lore.kernel.org/lkml/Y+9H9otxLYPqMkUh@kroah.com/ [1] Signed-off-by:
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Jithu Joseph authored
In preparation to supporting additional tests, remove ifs_pkg_auth from per-test scope, as it is only applicable for one test type. This will simplify ifs_init() flow when multiple tests are added. Signed-off-by:
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Nikita Kravets authored
Add a new driver to allow various MSI laptops' functionalities to be controlled from userspace. This includes such features as power profiles (aka shift modes), fan speed, charge thresholds, LEDs, etc. This driver contains EC memory configurations for different firmware versions and exports battery charge thresholds to userspace (note, that start and end thresholds control the same EC parameter and are always 10% apart). Link: https://github.com/BeardOverflow/msi-ec/ Link: https://github.com/BeardOverflow/msi-ec/pull/13 Cc: Aakash Singh <mail@singhaakash.dev> Cc: Jose Angel Pastrana <japp0005@red.ujaen.es> Signed-off-by:
Nikita Kravets <teackot@gmail.com> Link: https://lore.kernel.org/r/20230320225509.3559-1-teackot@gmail.comReviewed-by:
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Hans de Goede authored
Summary of changes: Till the commit: "tools/power/x86/intel-speed-select: Get punit core mapping information" All patches just lays foundation for adding new hardware interface in addition to existing MSR/MMIO interface. All patches prefixed with "Abstract" just adds individual hardware callback for functions called from the core processing. The mailbox processing is abstracted to a new file with callbacks. In addition some changes to reduce duplicated code for display of TRL level. Patch "Introduce Punit ID concept and add related API" add further abstraction in addition to existing package and die scope. ----------- tools/power/x86/intel-speed-select: Get punit core mapping information -Adds a new way to get package/die/punit information for each CPU. ----------- Introduce TPMI interface support - Implement all abstracted callbacks above to use TPMI IOCTL interface. ----------- tools/power/x86/intel-speed-select: Display punit info - With TPMI the granularity is per punit, which can be multiple in a package/die. ---------- tools/power/x86/intel-speed-select: Remove cpu mask display for non-cpu power domain tools/power/x86/intel-speed-select: Display fact info for non-cpu power domain -There are some power domains with no CPUs, the above patches adds CPU as invalid for these domains ---------- tools/power/x86/intel-speed-select: Use cgroup v2 isolation - Adds new option to use Cgroup CPU isolation instead of offline of CPUs ---------- tools/power/x86/intel-speed-select: Change TRL display for Emerald Rapids - Emerald Rapid has multiple TRL levels and moves away from TRL level based on instruction type
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- 22 Mar, 2023 5 commits
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Zhang Rui authored
Update tool and supported API version. This is the first version which supports newer Xeon platforms with TPMI support. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> [srinivas.pandruvada@linux.intel.com: subject and changelog edits] Signed-off-by:
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Srinivas Pandruvada authored
Emerald Rapids doesn't specify TRL (Turbo Ratio Limits) based instruction types. Instead it specifies 5 TRL levels, which can be anyone of the instruction types. Increase TRL levels to 5 for Emerald Rapids. Also change display to show by level number. Show only non zero level values. Signed-off-by: -
Srinivas Pandruvada authored
There are some differences compared to Sapphire Rapids. So, add a separate API. Signed-off-by: -
Srinivas Pandruvada authored
AMX frequency is present in non TPMI platforms also. When platform supports, the value is non zero. So, display AMX base frequency when non zero, irrespective of platform API version. Signed-off-by: -
Srinivas Pandruvada authored
On supported systems, it is possiible to isolate CPUs instead of CPU online/offline. This is optional and can be specified using -g option when running as daemon or in combination with -o option for SST-PP level change. CPU isolation doesn't isolate IRQs. So IRQs needs to be moved away from isoolated CPUs. This can be done via IRQ sysfs or irqbalance daemon. The IRQ balance daemon is also capable to parse thermal HFI messages to move IRQs away from CPUS, which are supposed be isolated. But this requires version released after July 2022. Signed-off-by:
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