1. 27 Jul, 2022 2 commits
    • Kalle Valo's avatar
      Revert "ath11k: add support for hardware rfkill for QCA6390" · 169ede1f
      Kalle Valo authored
      This reverts commit ec038c61. Tyler reported
      that on L390 Yoga Thinkpad with QCA6390 the suspend was failing because of this commit.
      
      Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.9
      
      Link: https://bugzilla.kernel.org/show_bug.cgi?id=215881Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
      Link: https://lore.kernel.org/r/20220708164656.29549-1-kvalo@kernel.org
      169ede1f
    • Manikanta Pubbisetty's avatar
      wifi: ath11k: Fix register write failure on QCN9074 · 867f4eee
      Manikanta Pubbisetty authored
      Commit 56c8ccf3 ("ath11k: Add register access logic for WCN6750")
      regressed QCN9074. With the above mentioned commit, writes are failing
      for some registers on QCN9074 although the device seems to work
      normally.
      
      ath11k_pci 0000:03:00.0: failed to set pcie link register0x01e0e0a8: 0xffffffff != 0x00000010
      ath11k_pci 0000:03:00.0: failed to set sysclk: -110
      
      PCIe devices in ath11k (QCA6390, WCN6855, QCN9074, WCN6750) use window
      concept for register accesses. There are two schemes, dynamic & static
      window.
      
      In dynamic window scheme, a single window(region in the BAR) is mapped
      either to CE or DP register windows at any give time. QCA6390 & WCN6855
      follow this scheme for register accesses.
      
      In static window scheme, CE & DP register windows are statically mapped
      to separate regions with in the BAR so that there is no switching of
      register windows between CE & DP register accesses. QCN9074 & WCN6750
      follow this scheme although the window start offsets are different for
      QCN9074 & WCN6750.
      
      QCN9074 uses 3rd & 2nd window for DP & CE register accesses respectively
      whereas WCN6750 uses 1st & 2nd window for DP & CE. In QCN9074, along with
      2nd & 3rd windows, 1st window is also used for certain configurations
      which commit 56c8ccf3 ("ath11k: Add register access logic for WCN6750")
      did not account for and hence the regression.
      
      Fix this by going back to the original way of accessing the registers on
      QCN9074. Since this diverges from WCN6750 way of accessing registers, it
      is required to register window_read32/window_write32() pci_ops for WCN6750.
      We can also get rid of dp_window_idx & ce_window_idx members in hw_params,
      so remove them.
      
      Also add a new API ath11k_pcic_register_pci_ops() for registering pci_ops
      to the ath11k core. This API checks for mandatory pci_ops() and reports
      error if those are missing. Also initialize unused pci_ops to NULL.
      
      Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-00887-QCAMSLSWPLZ-1
      Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.6.0.1-00861-QCAHKSWPL_SILICONZ-1
      
      Fixes: 56c8ccf3 ("ath11k: Add register access logic for WCN6750")
      Reported-by: default avatarMaxime Bizon <mbizon@freebox.fr>
      Tested-by: default avatarMaxime Bizon <mbizon@freebox.fr>
      Signed-off-by: default avatarManikanta Pubbisetty <quic_mpubbise@quicinc.com>
      Signed-off-by: default avatarKalle Valo <quic_kvalo@quicinc.com>
      Link: https://lore.kernel.org/r/20220608062954.27792-1-quic_mpubbise@quicinc.com
      867f4eee
  2. 25 Jul, 2022 1 commit
  3. 22 Jul, 2022 34 commits
  4. 18 Jul, 2022 3 commits