- 04 May, 2018 27 commits
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Philippe CORNU authored
Add display support on the stm32f469-disco board. Signed-off-by:
Philippe Cornu <philippe.cornu@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Philippe Cornu authored
In the stm32f4 family, mipi dsi is only supported on stm32f469. So add a new stm32f469 dtsi file & add mipi dsi support inside. Signed-off-by:
Philippe Cornu <philippe.cornu@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Philippe Cornu authored
Use gpio bindings for vcc5v_otg. Signed-off-by:
Philippe Cornu <philippe.cornu@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Alexandre Torgue authored
Since commit 83a86fbb ("irqchip/gic: Loudly complain about the use of IRQ_TYPE_NONE"), a warning is raised if IRQ_TYPE_NONE is used. So we use IRQ_TYPE_LEVEL_HIGH for usart nodes instead of IRQ_TYPE_NONE. Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com> Tested-by:
Fabrice Gasnier <fabrice.gasnier@st.com>
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Alexandre Torgue authored
Fix DTC warnings for stm32mp157: Warning (unit_address_vs_reg): /soc/pin-controller: node has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): /soc/pin-controller/uart4@0: node has a unit name, but no reg property Warning (unit_address_vs_reg): /soc/pin-controller-z: node has a reg or ranges property, but no unit name Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Ludovic Barre authored
This patch adds flash nor on qspi. Each flash is connected in quad mode and has its own chip select. Signed-off-by:
Ludovic Barre <ludovic.barre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Ludovic Barre authored
This patch adds qspi support on stm32mp157c, read in memory mapped, write in indirect mode. Signed-off-by:
Ludovic Barre <ludovic.barre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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yannick fertre authored
This patch enables cec node on stm32mp157c-ev1 board Signed-off-by:
Yannick Fertre <yannick.fertre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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yannick fertre authored
This patch adds cec support on stm32mp157c eval board. Signed-off-by:
Yannick Fertre <yannick.fertre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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yannick fertre authored
Add cec support on stm32mp157c Signed-off-by:
yannick fertre <yannick.fertre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Amelie Delaunay authored
Add support for USBH (USB Host) to STM32MP157C SoC. USBH is a USB Host controller supporting the standard registers used for full- and low-speed (OHCI controller) and high-speed (EHCI controller). Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com>
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Amelie Delaunay authored
This patch enables USBPHYC (USB PHY Controller) on stm32mp157c-ev1. This enables the two usbphyc usb2 ports. Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Amelie Delaunay authored
USBPHYC ports require 3 supplies: 3v3, 1v1 and 1v8. This patch adds the corresponding properties to usbphyc ports on stm32mp157c-ed1 board. Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Amelie Delaunay authored
Add support for USBPHYC (USB PHY Controller) to STM32MP157C SoC. It manages two usb2 ports. Signed-off-by:
Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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yannick fertre authored
Add dsi support on stm32mp157c Signed-off-by:
yannick fertre <yannick.fertre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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yannick fertre authored
Add support for the display controller ltdc. Signed-off-by:
yannick fertre <yannick.fertre@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
Add I2C1/5 support for STM32MP157C evaluation daughter on evaluation mother board. Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
Add I2C4 support for STM32MP157C evaluation daughter. Required for PMIC. Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
This patch adds pins groups for I2C1,2,4 & 5 Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
This patch adds all STM32F7 I2C instances for STM32MP157C SoC. Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Lionel Debieve authored
This patch add CRC instance of the stm32mp157c SoC Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Lionel Debieve authored
This patch add CRYP instance of the stm32mp157c SoC Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Lionel Debieve authored
Enable stm32-hwrng for ed1 and ev1 boards Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Lionel Debieve authored
This patch add RNG instance of the stm32mp157c SoC Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
Activate MDMA for STM32MP157C Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
Activate DMAMUX for STM32MP157C Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Pierre-Yves MORDRET authored
Activate DMAv2 for STM32MP157C Signed-off-by:
Pierre-Yves MORDRET <pierre-yves.mordret@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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- 02 May, 2018 7 commits
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Fabrice Gasnier authored
Add support for DAC (Digital to Analog Converter) to STM32MP157C. STM32MP157C DAC has two output channels. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Gabriel Fernandez authored
This patch adds reset binding file. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-by:
Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Fabrice Gasnier authored
Add LPtimer definitions, depending on features they provide: - lptimer1 & 2 can act as PWM, trigger and encoder/counter - lptimer3 can act as PWM and trigger - lptimer4 & 5 can act as PWM Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Fabrice Gasnier authored
stm32mp157c has vrefbuf regulator that can provide analog reference voltage from 1500mV to 2500mV. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Fabrice Gasnier authored
Enable timer 6 on stm32mp157c-ed1 that can serve as trigger for ADC for instance. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Fabrice Gasnier authored
stm32mp157c evaluation board has TIM2_CH4, TIM8_CH4 and TIM12_CH1 available on GPIO expansion connector. Add PWM and associated triggers (for ADC/DAC) on these timers. Keep them disabled so these pins can be used as GPIOs by default. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Fabrice Gasnier authored
stm32mp157c evaluation board has following PWM pins available on GPIO expansion connector: - TIM2_CH4 (PA3) - TIM8_CH4 (PI2) - TIM12_CH1 (PH6) Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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- 27 Apr, 2018 1 commit
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Fabrice Gasnier authored
Add PWM and trigger support to stm32mp157c. Signed-off-by:
Fabrice Gasnier <fabrice.gasnier@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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- 16 Apr, 2018 5 commits
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Gabriel Fernandez authored
This patch enables stm32mp1 clock driver. Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by:
Alexandre Torgue <alexandre.torgue@st.com>
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linuxLinus Torvalds authored
Pull more btrfs updates from David Sterba: "We have queued a few more fixes (error handling, log replay, softlockup) and the rest is SPDX updates that touche almost all files so the diffstat is long" * tag 'for-4.17-part2-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/kdave/linux: btrfs: Only check first key for committed tree blocks btrfs: add SPDX header to Kconfig btrfs: replace GPL boilerplate by SPDX -- sources btrfs: replace GPL boilerplate by SPDX -- headers Btrfs: fix loss of prealloc extents past i_size after fsync log replay Btrfs: clean up resources during umount after trans is aborted btrfs: Fix possible softlock on single core machines Btrfs: bail out on error during replay_dir_deletes Btrfs: fix NULL pointer dereference in log_dir_items
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git://git.samba.org/sfrench/cifs-2.6Linus Torvalds authored
Pull cifs fixes from Steve French: "SMB3 fixes, a few for stable, and some important cleanup work from Ronnie of the smb3 transport code" * tag '4.17-rc1SMB3-Fixes' of git://git.samba.org/sfrench/cifs-2.6: cifs: change validate_buf to validate_iov cifs: remove rfc1002 hardcoded constants from cifs_discard_remaining_data() cifs: Change SMB2_open to return an iov for the error parameter cifs: add resp_buf_size to the mid_q_entry structure smb3.11: replace a 4 with server->vals->header_preamble_size cifs: replace a 4 with server->vals->header_preamble_size cifs: add pdu_size to the TCP_Server_Info structure SMB311: Improve checking of negotiate security contexts SMB3: Fix length checking of SMB3.11 negotiate request CIFS: add ONCE flag for cifs_dbg type cifs: Use ULL suffix for 64-bit constant SMB3: Log at least once if tree connect fails during reconnect cifs: smb2pdu: Fix potential NULL pointer dereference
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git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsiLinus Torvalds authored
Pull SCSI fixes from James Bottomley: "This is a set of minor (and safe changes) that didn't make the initial pull request plus some bug fixes. The status handling code is actually a running regression from the previous merge window which had an incomplete fix (now reverted) and most of the remaining bug fixes are for problems older than the current merge window" [ Side note: this merge also takes the base kernel git repository to 6+ million objects for the first time. Technically we hit it a couple of merges ago already if you count all the tag objects, but now it reaches 6M+ objects reachable from HEAD. I was joking around that that's when I should switch to 5.0, because 3.0 happened at the 2M mark, and 4.0 happened at 4M objects. But probably not, even if numerology is about as good a reason as any. - Linus ] * tag 'scsi-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: scsi: devinfo: Add Microsoft iSCSI target to 1024 sector blacklist scsi: cxgb4i: silence overflow warning in t4_uld_rx_handler() scsi: dpt_i2o: Use after free in I2ORESETCMD ioctl scsi: core: Make scsi_result_to_blk_status() recognize CONDITION MET scsi: core: Rename __scsi_error_from_host_byte() into scsi_result_to_blk_status() Revert "scsi: core: return BLK_STS_OK for DID_OK in __scsi_error_from_host_byte()" scsi: aacraid: Insure command thread is not recursively stopped scsi: qla2xxx: Correct setting of SAM_STAT_CHECK_CONDITION scsi: qla2xxx: correctly shift host byte scsi: qla2xxx: Fix race condition between iocb timeout and initialisation scsi: qla2xxx: Avoid double completion of abort command scsi: qla2xxx: Fix small memory leak in qla2x00_probe_one on probe failure scsi: scsi_dh: Don't look for NULL devices handlers by name scsi: core: remove redundant assignment to shost->use_blk_mq
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