- 21 Aug, 2019 6 commits
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in three places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190815060609.3056-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
The ST pinctrl driver wants to provode a gpio_chip but is not including the header for this, fix the inclusion to use the right header. <linux/of_gpio.h> has to remain as the driver is calling of_get_named_gpio(). Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Maxime Coquelin <maxime.coquelin@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190820111135.10701-1-linus.walleij@linaro.org
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Nishka Dasgupta authored
Static structures rk805_pinctrl_desc and rk805_gpio_chip, of types gpio_chip and pinctrl_desc respectively, are not used except to be copied into the fields of a different variable. Hence make rk805_pinctrl_desc and rk805_gpio_chip both constant to protect them from unintended modification. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190819075757.1753-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sowjanya Komatineni authored
This patch adds pinctrl register read to flush all the prior pinctrl writes and then adds barrier for pinctrl register read to complete during resume to make sure all pinctrl changes are effective. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1565984527-5272-3-git-send-email-skomatineni@nvidia.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Sowjanya Komatineni authored
pmx_writel uses writel which inserts write barrier before the register write. This patch has fix to replace writel with writel_relaxed followed by a readback and memory barrier to ensure write operation is completed for successful pinctrl change. Acked-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com> Link: https://lore.kernel.org/r/1565984527-5272-2-git-send-email-skomatineni@nvidia.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Pramod Kumar <pramodku@broadcom.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20190812132554.18313-1-linus.walleij@linaro.orgAcked-by: Scott Branden <scott.branden@broadcom.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 10 Aug, 2019 5 commits
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Linus Walleij authored
Merge tag 'sh-pfc-for-v5.4-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: sh-pfc: Updates for v5.4 - Add missing of_node_put() calls on RZ/N1, - Small cleanups.
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node() puts the previous node; however, in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence put of_node_put() statements as required before two mid-loop return statements. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190808074720.15754-1-nishkadg.linux@gmail.comReviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190808074329.15579-1-nishkadg.linux@gmail.comReviewed-by: Baolin Wang <baolin.wang@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node and for_each_available_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190808075457.16109-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nathan Chancellor authored
clang errors: drivers/pinctrl/aspeed/pinctrl-aspeed-g6.c:2325:9: error: incompatible pointer types initializing 'int (*)(struct aspeed_pinmux_data *, const struct aspeed_sig_expr *, bool)' with an expression of type 'int (const struct aspeed_pinmux_data *, const struct aspeed_sig_expr *, bool)' [-Werror,-Wincompatible-pointer-types] .set = aspeed_g6_sig_expr_set, ^~~~~~~~~~~~~~~~~~~~~~ 1 error generated. Commit 674fa8da ("pinctrl: aspeed-g5: Delay acquisition of regmaps") changed the set function pointer declaration and the g6 one wasn't updated (I assume because it wasn't merged yet). Fixes: 2eda1cde ("pinctrl: aspeed: Add AST2600 pinmux support") Link: https://github.com/ClangBuiltLinux/linux/issues/632Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Link: https://lore.kernel.org/r/20190807003037.48457-1-natechancellor@gmail.comReviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 09 Aug, 2019 1 commit
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Geert Uytterhoeven authored
Use the devm_platform_ioremap_resource() helper instead of open-coding the same operation. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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- 08 Aug, 2019 1 commit
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Geert Uytterhoeven authored
At the time of commit 9a643c9a ("sh-pfc: Convert message printing from pr_* to dev_*"), the dev_*_once() variants didn't exist yet, so the once behavior was open-coded. Since commit e135303b ("device: Add dev_<level>_once variants") they do, so "revert" to the good practice of using a helper. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
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- 07 Aug, 2019 2 commits
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Jitendra Sharma authored
Add initial pinctrl driver to support pin configuration with pinctrl framework for SC7180 Signed-off-by: Jitendra Sharma <shajit@codeaurora.org> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> [rnayak: modify to use upstream tile support sort and squash some functions] Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190806060536.18094-2-rnayak@codeaurora.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jitendra Sharma authored
Add the binding for the TLMM pinctrl block found in the SC7180 platform Signed-off-by: Jitendra Sharma <shajit@codeaurora.org> Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org> [rnayak: Fix some copy-paste issues, sort and fix functions] Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20190806060536.18094-1-rnayak@codeaurora.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 06 Aug, 2019 5 commits
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Link: https://lore.kernel.org/r/20190804154948.4584-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in three places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190804160420.5309-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190804155154.4916-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_child_of_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190804155117.4753-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Nishka Dasgupta authored
Each iteration of for_each_compatible_node puts the previous node, but in the case of a return from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the return in two places. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Link: https://lore.kernel.org/r/20190804152745.2231-1-nishkadg.linux@gmail.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 05 Aug, 2019 20 commits
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Geert Uytterhoeven authored
Improve readability and maintainability by replacing a hardcoded string allocation and formatting by the use of the devm_kasprintf() helper. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190731132917.17607-4-geert+renesas@glider.beSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
Improve readability and maintainability by replacing a hardcoded string allocation and formatting by the use of the kasprintf() helper. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190731132917.17607-3-geert+renesas@glider.beSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
Improve readability by replacing a hardcoded number requiring a comment by strlen(). Gcc is smart enough to evaluate the length of a constant string at compile-time. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20190731132917.17607-2-geert+renesas@glider.beSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stephen Boyd authored
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-34-swboyd@chromium.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kunihiko Hayashi authored
SD uses the following pins starting from 247: SDCD, SDWP, SDVOLC, SDCLK, SDCMD, SDDAT{0,1,2,3} Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/1564465410-9165-6-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kunihiko Hayashi authored
Pro5 PCIe interface uses the following pins: XPERST, XPEWAKE, XPECLKRQ Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1564465410-9165-5-git-send-email-hayashi.kunihiko@socionext.comAcked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kunihiko Hayashi authored
The 5th serial TS interface uses the following pins: hscin4_s: PCA[11-14] Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/1564465410-9165-4-git-send-email-hayashi.kunihiko@socionext.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kunihiko Hayashi authored
This adds support for pinmux settings of aout1b group. This group includes audio I/O signals derived from xirq pins, and it is equivalent to "aout1" in functionality. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1564465410-9165-3-git-send-email-hayashi.kunihiko@socionext.comAcked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Kunihiko Hayashi authored
It depends on the board implementation whether to have each pins of CTS/RTS, and others for modem. So it is necessary to divide current uart_ctsrts group into uart_ctsrts and uart_modem groups. Since the number of implemented pins for modem differs depending on SoC, each uart_modem group also has a different number of pins. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1564465410-9165-2-git-send-email-hayashi.kunihiko@socionext.comAcked-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Neil Armstrong authored
Add the missing pinmux for the pwm_a function on the GPIOE_2 pin. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20190729125838.6498-1-narmstrong@baylibre.comSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
Guide readers away from using the aspeed,g[45].* compatible patterns. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190724081313.12934-4-andrew@aj.id.auReviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
Otherwise they look odd in the face of not being listed in the bindings documents. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190724081313.12934-3-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
The AST2600 pinmux is fairly similar to the previous generations of ASPEED BMC SoCs in terms of architecture, though differ in some of the design details. The complexity of the pin expressions is largely reduced (e.g. there are no-longer signals with multiple expressions muxing them to the associated pin), and there are now signals and buses with multiple pin groups. The driver implements pinmux support for all 244 GPIO-capable pins plus a further four pins that are not GPIO capable but which expose multiple signals. pinconf will be implemented in a follow-up patch. The implementation has been smoke-tested under qemu, and run on hardware by ASPEED. Debugged-by: Johnny Huang <johnny_huang@aspeedtech.com> Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190711041942.23202-7-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
The complement of SIG_DESC_SET(). Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190729055604.13239-6-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
The AST2400 and AST2500 SoCs only exposed one pin group per function. Lone pin groups drove some implementation simplifications in the ASPEED pinmux infrastructure that is now invalid for the AST2600, which supports multiple groups per function for some functions on the chip (SMBus Alert pins and UARTs among others). This patch reworks the macro jungle to enable support for multiple pin groups. In the process we inflict some collateral damage on the existing AST2400 and AST2500 drivers, but the rework is mostly a relatively straight-forward, automated transform of adding the pin name as an argument to some macro calls and implementing wrappers to paper over groups in the cases where there aren't multiple. As previously documented, the macro infrastructure exposes mux configuration as symbols in the source file which are used to detect accidental duplication. Previously these symbols were named in terms of the signal for a given expression. As the AST2600 supports multiple pin groups for a function, the signal name on its own is no-longer unique, and we must switch to the (signal, group) tuple. However, this means that we can no-longer derive the signal expression symbol name from the signal name alone, which among other cases, impacts the operation of the PIN_DECL_x() macros. To fix that and avoid requiring we awkwardly provide the associated group name for every signal for every PIN_DECL_x() invocation, instead opportunistically alias the name of the signal expression symbol from the unique (signal, group) tuple to the also unique (pin, signal) tuple, then reference the alias symbol in the tables generated by PIN_DECL_x(). This way we do not require extra group parameters for PIN_DECL_x() as the pin name was already provided as an argument, and instead simply require that the pin name be provided to the expression declaration macros in order to generate the alias symbol. The patch implements the alias strategy and fixes up all the expression definition macro calls in the AST2400 and AST2500 drivers to account for pin groups. Given the implementation strategy has the property that compilation either fails or loudly warns for bad pin descriptions, this patch is theoretically tested by successfully compiling both affected drivers. For a more practical test I've inspected the diff of the content of the pinctrl debugfs entries before and after the patch under qemu; all pins, functions and groups match. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190729055604.13239-5-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
This case is common in the AST2600, so add to the collection. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190729055604.13239-4-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
Rename macros as follows: * s/SS_PIN_DECL()/PIN_DECL_1()/ * s/MS_PIN_DECL()/PIN_DECL_2()/ * s/MS_PIN_DECL_()/PIN_DECL_()/ This is in preparation for adding PIN_DECL_3(). We could clean this up with e.g. CPPMAGIC_MAP() from ccan, but that might be a bridge too far given how much of a macro jungle we already have. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190729055604.13239-3-andrew@aj.id.auSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andrew Jeffery authored
The AST260 differs from the 2400 and 2500 in that it supports multiple groups for a subset of functions. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20190729055604.13239-2-andrew@aj.id.auReviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Icenowy Zheng authored
Introduce the GPIO pins that is only available on V3 (not on V3s) to the V3s pinctrl driver. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Acked-by: Maxime Ripard <maxime.ripard@bootlin.com> Link: https://lore.kernel.org/r/20190728031227.49140-2-icenowy@aosc.ioSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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Anders Roxell authored
When fall-through warnings was enabled by default the following warnings was starting to show up: ../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c: In function ‘pmic_gpio_populate’: ../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:815:20: warning: this statement may fall through [-Wimplicit-fallthrough=] pad->have_buffer = true; ~~~~~~~~~~~~~~~~~^~~~~~ ../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:816:2: note: here case PMIC_GPIO_SUBTYPE_GPIOC_4CH: ^~~~ ../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:820:20: warning: this statement may fall through [-Wimplicit-fallthrough=] pad->have_buffer = true; ~~~~~~~~~~~~~~~~~^~~~~~ ../drivers/pinctrl/qcom/pinctrl-spmi-gpio.c:821:2: note: here case PMIC_GPIO_SUBTYPE_GPIOC_8CH: ^~~~ Rework so that the compiler doesn't warn about fall-through. Fixes: d93512ef0f0e ("Makefile: Globally enable fall-through warning") Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Link: https://lore.kernel.org/r/20190726112816.19723-1-anders.roxell@linaro.orgSigned-off-by: Linus Walleij <linus.walleij@linaro.org>
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