- 06 Jul, 2017 32 commits
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Keerthy authored
The LP87565 chip is a power management IC for Portable Navigation Systems and Tablet Computing devices. It contains the following components: - Configurable Bucks(Single and multi-phase). - Configurable General Purpose Output Signals (GPO). The LP87565-Q1 variant device uses two 2-phase outputs configuration, Buck0 is master for Buck0/1 output and Buck2 is master for Buck2/3 output. Signed-off-by:Keerthy <j-keerthy@ti.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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Jeffy Chen authored
Currently we request the irq when probing, but never free it. So after unbind ec driver, this irq will be left requested, which would break the next bind: [ 2683.338437] genirq: Flags mismatch irq 64. 00002008 (chromeos-ec) vs. 00002008 (chromeos-ec) [ 2683.338591] cros-ec-spi spi5.0: request irq 64: error -16 [ 2683.338610] cros-ec-spi spi5.0: cannot register EC [ 2683.338656] cros-ec-spi: probe of spi5.0 failed with error -16 Signed-off-by:
Jeffy Chen <jeffy.chen@rock-chips.com> Signed-off-by:
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Olimpiu Dejeu authored
Acked-by:
Jingoo Han <jingoohan1@gmail.com> Signed-off-by:
Olimpiu Dejeu <olimpiu@arcticsand.com> Signed-off-by:
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Steve Twiss authored
Remove the register DA9062AA_BBAT_CONT (0x0C5) from the DA9061 chip model regmap access ranges. This applies to both da9061_aa_readable_ranges[] and da9061_aa_writeable_ranges[]. This change is to correct the DA9061 chip model and align it with the latest DA9061 Datasheet. This register previously appeared in the DA9061 Datasheet, Revision 3.2, 01-Mar-2016 and has been removed from later DA9061 datasheet from Dialog, Revision 3.3, 04-Apr-2017. Signed-off-by:
Steve Twiss <stwiss.opensource@diasemi.com> Signed-off-by:
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Steve Twiss authored
Remove the register DA9062AA_BBAT_CONT (0x0C5) from the DA9061 chip model regmap access ranges. This applies to both da9061_aa_readable_ranges[] and da9061_aa_writeable_ranges[]. This change is to correct the DA9061 chip model and align it with the latest DA9061 Datasheet. This register previously appeared in the DA9061 Datasheet, Revision 3.2, 01-Mar-2016 and has been removed from later DA9061 datasheet from Dialog, Revision 3.3, 04-Apr-2017. Signed-off-by:
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Hans de Goede authored
On x86 the AXP288 PMIC provides an ACPI OpRegion handler, which must be available before other drivers using it are loaded, which can only be ensured if the MFD, OpRegion and i2c-bus drivers are built-in. Since the AXP20x MFD code is used on non x86 too we cannot simply change this into a bool, I've tried some Kconfig magic with if x86 but I could not get this working correctly, so this commit just documents that this should be built-in on x86, which fixes errors like these during boot: mmc0: SDHCI controller on ACPI [80860F14:00] using ADMA ACPI Error: No handler for Region [REGS] (ffff93543b0cc3a8) [UserDefinedRegion] ACPI Error: Region UserDefinedRegion (ID=143) has no handler (20170119/exfldio-2 ACPI Error: Method parse/execution failed [\_SB.PCI0.I2C7.PMI5.GET] (Node ffff93 ACPI Error: Method parse/execution failed [\_SB.PCI0.SHC1._PS0] (Node ffff93543b acpi 80860F14:02: Failed to change power state to D0 Signed-off-by:
Hans de Goede <hdegoede@redhat.com> Acked-by:
Chen-Yu Tsai <wens@csie.org> Tested-by:
russianneuromancer <russianneuromancer@ya.ru> Signed-off-by:
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Hans de Goede authored
Add mfd driver for Intel CHT Whiskey Cove PMIC, based on various non upstreamed CHT Whiskey Cove PMIC patches. This is a somewhat minimal version which adds irqchip support and cells for: ACPI PMIC opregion support, the i2c-controller driving the external charger irc and the pwrsrc/extcon block. Further cells can be added in the future if/when drivers are upstreamed for them. [The above patch caused a build error on some archetectures] From: Arnd Bergmann <arnd@arndb.de> I ran into a build error on ARM with a platform that has a non-standard clk implementation: drivers/clk/clk.o: In function `clk_disable': clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable' arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_disable+0x0): first defined here drivers/clk/clk.o: In function `clk_enable': clk.c:(.text.clk_enable+0x0): multiple definition of `clk_enable' arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_enable+0x0): first defined here The problem is a device driver that uses 'select COMMON_CLK', which is generally a bad idea: selecting a subsystem should only be done from a platform, otherwise we run into circular dependencies. The same driver also selects 'GPIOLIB' and 'I2C', which has a similar effect. This turns all three into 'depends on', as it should be. Finally, we can limit the build to x86, unless we are compile testing. First patch: Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
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Arvind Yadav authored
clk_prepare_enable() can fail here and we must check its return value. Signed-off-by:
Arvind Yadav <arvind.yadav.cs@gmail.com> Signed-off-by:
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Jan Kiszka authored
The SIMATIC IOT2020 and IOT2040 are derived from the Galileo Gen2 board and share its I2C frequency. Signed-off-by:
Sascha Weisenberger <sascha.weisenberger@siemens.com> Signed-off-by:
Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by:
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Jan Kiszka authored
Avoids reimplementation of DMI matching in intel_quark_i2c_setup. Signed-off-by:
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Benjamin Gaignard authored
Usage of devm_of_platform_populate() simplify driver code by allowing to delete cpcap_remove(). Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org> Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Usage of devm_of_platform_populate() simplify driver code by allowing to delete pmic_spmi_remove(). Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() to be sure that of_platform_depopulate is called when removing the driver. Signed-off-by:
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Benjamin Gaignard authored
Use devm_of_platform_populate() instead of of_platform_populate() and suppress stm32_timers_remove() which become useless. Signed-off-by:
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Hans de Goede authored
The Crystal Cove PMIC provides an ACPI OPRegion handler, which must be available before other drivers using it are loaded, which is why INTEL_SOC_PMIC is a bool. Just having the driver is not enough, the driver for the i2c-bus must also be built in, to ensure this, this patch adds a select for it. This fixes errors like these during boot: mmc0: SDHCI controller on ACPI [80860F14:00] using ADMA ACPI Error: No handler for Region [REGS] (ffff93543b0cc3a8) [UserDefinedRegion] (20170119/evregion-166) ACPI Error: Region UserDefinedRegion (ID=143) has no handler (20170119/exfldio-299) ACPI Error: Method parse/execution failed [\_SB.PCI0.I2C7.PMI5.GET] (Node ffff93543b0cde10), AE_NOT_EXIST (20170119/psparse-543) ACPI Error: Method parse/execution failed [\_SB.PCI0.SHC1._PS0] (Node ffff93543b0b5cd0), AE_NOT_EXIST (20170119/psparse-543) acpi 80860F14:02: Failed to change power state to D0 While at it this patch also changes the human readable name of the Kconfig option to make clear the INTEL_SOC_PMIC option selects support for the Intel Crystal Cove PMIC and documents why this is a bool. [The above patch caused a build error on some archetectures] From: Arnd Bergmann <arnd@arndb.de> I ran into a build error on ARM with a platform that has a non-standard clk implementation: drivers/clk/clk.o: In function `clk_disable': clk.c:(.text.clk_disable+0x0): multiple definition of `clk_disable' arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_disable+0x0): first defined here drivers/clk/clk.o: In function `clk_enable': clk.c:(.text.clk_enable+0x0): multiple definition of `clk_enable' arch/arm/mach-omap1/clock.o:clock.c:(.text.clk_enable+0x0): first defined here The problem is a device driver that uses 'select COMMON_CLK', which is generally a bad idea: selecting a subsystem should only be done from a platform, otherwise we run into circular dependencies. The same driver also selects 'GPIOLIB' and 'I2C', which has a similar effect. This turns all three into 'depends on', as it should be. Finally, we can limit the build to x86, unless we are compile testing. First patch: Signed-off-by:
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Steve Twiss authored
Additions to search terms for files supported by Dialog Semiconductor. This update will allow Dialog support to follow files for device tree bindings (onkey, thermal and watchdog) and source code for chip thermal monitoring drivers. Signed-off-by:
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Tobias Klauser authored
struct irq_domain_ops is not modified, so it can be made const. Signed-off-by:
Tobias Klauser <tklauser@distanz.ch> Signed-off-by:
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Uwe Kleine-König authored
As silently failing isn't that nice, emit an error message at a place that was silent on failure up to now. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by:
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Charles Keepax authored
Link to the generic GPIO specifier bindings now that the second cell of the binding has some support in the driver. Signed-off-by:
Charles Keepax <ckeepax@opensource.wolfsonmicro.com> Signed-off-by:
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Gustavo A. R. Silva authored
Add NULL check before dereferencing pointer of_id in order to avoid a potential NULL pointer dereference. Addresses-Coverity-ID: 1408830 Signed-off-by:
Gustavo A. R. Silva <garsilva@embeddedor.com> Signed-off-by:
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Gustavo A. R. Silva authored
Add NULL check before dereferencing pointer of_id in order to avoid a potential NULL pointer dereference. Addresses-Coverity-ID: 1408829 Signed-off-by:
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Steven Feng authored
The request should be resent when DMA transfer error occurred. For rts5227, the clock rate needs to be reduced when error occurred. Signed-off-by:
Steven Feng <steven_feng@realsil.com.cn> Signed-off-by:
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Icenowy Zheng authored
As axp20x-regulator now supports AXP803, add a cell for it. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Acked-by:
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Stefan Agner authored
Remove the restart handler registered in probe on device remove. Fixes: a370f60a ("mfd: rn5t618: Register restart handler") Signed-off-by:
Stefan Agner <stefan@agner.ch> Signed-off-by:
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Charles Keepax authored
Since a copy of the pdata was added into the core struct in commit f6dd8449 ("mfd: wm831x: Add basic device tree binding") the pdata pointer in probe can no longer be NULL. As such remove the redundant checks for this case. Signed-off-by:
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Linus Walleij authored
These hexdumps get printed no matter if CONFIG_DEBUG is set or not. Just get rid of them. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
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Andy Shevchenko authored
Intel Cannonlake PCH has the same LPSS than Intel Kabylake. Add the new IDs to the list of supported devices. Signed-off-by:
Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by:
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- 19 Jun, 2017 6 commits
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Kuppuswamy Sathyanarayanan authored
Currently in WCOVE PMIC MFD driver, all second level IRQ chips are chained to the respective first level IRQs. So there is no need for explicitly unmasking the first level IRQ in this driver. This patches removes this level 1 IRQ unmask support. Signed-off-by:
Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by:
Darren Hart (VMware) <dvhart@infradead.org> Reviewed-by:
Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by:
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Kuppuswamy Sathyanarayanan authored
Whishkey cove PMIC has support to mask/unmask interrupts at two levels. At first level we can mask/unmask interrupt domains like TMU, GPIO, ADC, CHGR, BCU THERMAL and PWRBTN and at second level, it provides facility to mask/unmask individual interrupts belong each of this domain. For example, in case of TMU, at first level we have TMU interrupt domain, and at second level we have two interrupts, wake alarm, system alarm that belong to the TMU interrupt domain. Currently, in this driver all first level IRQs are registered as part of IRQ chip(bxtwc_regmap_irq_chip). By default, after you register the IRQ chip from your driver, all IRQs in that chip will masked and can only be enabled if that IRQ is requested using request_irq() call. This is the default Linux IRQ behavior model. And whenever a dependent device that belongs to PMIC requests only the second level IRQ and not explicitly unmask the first level IRQ, then in essence the second level IRQ will still be disabled. For example, if TMU device driver request wake_alarm IRQ and not explicitly unmask TMU level 1 IRQ then according to the default Linux IRQ model, wake_alarm IRQ will still be disabled. So the proper solution to fix this issue is to use the chained IRQ chip concept. We should chain all the second level chip IRQs to the corresponding first level IRQ. To do this, we need to create separate IRQ chips for every group of second level IRQs. In case of TMU, when adding second level IRQ chip, instead of using PMIC IRQ we should use the corresponding first level IRQ. So the following code will change from ret = regmap_add_irq_chip(pmic->regmap, pmic->irq, ...) to, virq = regmap_irq_get_virq(&pmic->irq_chip_data, BXTWC_TMU_LVL1_IRQ); ret = regmap_add_irq_chip(pmic->regmap, virq, ...) In case of Whiskey Cove Type-C driver, Since USBC IRQ is moved under charger level2 IRQ chip. We should use charger IRQ chip(irq_chip_data_chgr) to get the USBC virtual IRQ number. Signed-off-by:
Heikki Krogerus <heikki.krogerus@linux.intel.com> Signed-off-by:
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Kuppuswamy Sathyanarayanan authored
Cleanup the resource allocation/free code in probe function by using devm_* calls. Signed-off-by:
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Kuppuswamy Sathyanarayanan authored
Currently all PMIC GPIO domain IRQs are consumed by the same device(bxt_wcove_gpio), so there is no need to export them as separate interrupts. We can just export only the first level GPIO IRQ(BXTWC_GPIO_LVL1_IRQ) as an IRQ resource and let the GPIO device driver(bxt_wcove_gpio) handle the GPIO sub domain IRQs based on status value of GPIO level2 interrupt status register. Also, just using only the first level IRQ will eliminate the bug involved in requesting only the second level IRQ and not explicitly enable the first level IRQ. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 This patch also makes relevant change in Whiskey cove GPIO driver to use only first level PMIC GPIO IRQ. Signed-off-by:
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Kuppuswamy Sathyanarayanan authored
Since all second level thermal IRQs are consumed by the same device(bxt_wcove_thermal), there is no need to expose them as separate interrupts. We can just export only the first level IRQs for thermal and let the device(bxt_wcove_thermal) driver handle the second level IRQs based on thermal interrupt status register. Also, just using only the first level IRQ will eliminate the bug involved in requesting only the second level IRQ and not explicitly enable the first level IRQ. For more info on this issue please read the details at, https://lkml.org/lkml/2017/2/27/148 This patch also makes relevant change in bxt_wcove_thermal driver to use only first level PMIC thermal IRQ. Signed-off-by:
Zhang Rui <rui.zhang@intel.com> Reviewed-by:
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Kuppuswamy Sathyanarayanan authored
TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its index value is 11. Since this index value is used when calculating .num_irqs of regmap_irq_chip_tmu, it incorrectly reports number of IRQs as 12 instead of actual value of 1. This patch fixes this issue by creating new enum of tmu IRQs and resetting its starting index to 0. Signed-off-by:
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- 13 May, 2017 2 commits
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Linus Torvalds authored
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git://git.kernel.org/pub/scm/linux/kernel/git/dtor/inputLinus Torvalds authored
Pull some more input subsystem updates from Dmitry Torokhov: "An updated xpad driver with a few more recognized device IDs, and a new psxpad-spi driver, allowing connecting Playstation 1 and 2 joypads via SPI bus" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: cros_ec_keyb - remove extraneous 'const' Input: add support for PlayStation 1/2 joypads connected via SPI Input: xpad - add USB IDs for Mad Catz Brawlstick and Razer Sabertooth Input: xpad - sync supported devices with xboxdrv Input: xpad - sort supported devices by USB ID
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