- 07 Mar, 2023 40 commits
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Wenjing Liu authored
[why] link component should only have one interface serving dc. [how] We are moving dc_link functions exposed to DM to dc_link_exports and unify link component interface in link.h with function pointer to match the style of other dc component. This is the third step to move dc_link functions under protocols folder to dc_link_exports. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[Why & How] - We have added link_dp_dpia_bw code but it is not currently added in makefile. We are adding this to makefile so it would be built. - Remove unused dc_link.h Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[why] link component should only have one interface serving dc. [how] We are moving dc_link functions exposed to DM to dc_link_exports and unify link component interface in link.h with function pointer to match the style of other dc component. This is the second step to move dc_link functions under link root folder to dc_link_exports. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Wenjing Liu authored
[why] link component should only have one interface serving dc. [how] We are moving dc_link functions exposed to DM to dc_link_exports and unify link component interface in link.h with function pointer to match the style of other dc component. This is the first step to move dc_link functions under accessories folder to dc_link_exports. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
[Why & How] DSC needs DCN but we are trying reduce the usage of the DCN flag. It's easier to build the DSC code sprinkled around DC core and the DMs and just guard the place where DSC uses floating point code. Since DSC is never enabled on non-DCN ASICs this won't have any effect. Reviewed-by: Hamza Mahfooz <Hamza.Mahfooz@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
[Why & How] DM should never use a non-interface function to call into DC. The original code is incorrect on ASICs that don't use DCN20's remove_stream_from_ctx function. Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
[Why & How] There is no reason we still need a config option for this. Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Mike Hsieh authored
[WHY] There is a typo in dc_dsc_config_options structure [HOW] Fix the typo Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
[Why & How] This fixes a couple misplaced CONFIG_DRM_AMD_DC_DCN blocks. Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Harry Wentland authored
[Why & How] Remove dead code. Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Harry Wentland <harry.wentland@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] Block periods that are too short as they have the potential to currently cause hangs in other firmware components on the system. [How] Update the threshold, mostly targeting a block of 4k and downscaling. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Nicholas Kazlauskas authored
[Why] Allows finer control and tuning for debug and profiling. [How] Add the debug option into DC. The default remains the same as before for now. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Aric Cyr authored
This version brings along the following: - Correct way to find OPP index - Unify DC logging for BW Alloc - Add height granularity limitation for dsc slice height calculation Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Aric Cyr <aric.cyr@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Alvin Lee authored
[Description] For pipe harvesting cases we cannot rely on array index to get the correct OPP instance, we must loop through each instance to find the correct one. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Mustapha Ghaddar authored
[WHY] To keep all logging within DC unified [HOW] Use the standard DC Logging functions Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Mustapha Ghaddar <mghaddar@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Mike Hsieh authored
[WHY] eDP add new limitation for Y granularity for selected update feature. DSC does not include this limitation while calculating slice height. [HOW] Add new limitation while looking for DSC slice height. Reviewed-by: Cruise Hung <Cruise.Hung@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Perry Yuan authored
If some invalid workload types exposed by the power profile sysfs node, it will be failed to set the unsuported profiles. So we can skip to show the invalid workload type in the profiles list to avoid that failure happen. Acked-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Perry Yuan authored
Capped and Uncapped workload types are supported, each workload type has different performance thresholds and pstate conditions. * capped mode is used by power centric workload * uncapped mode is used by perf centric workload Acked-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Perry Yuan authored
Capped and uncapped workload types switching are supported on Vangogh, User can switch the power profile and check current type with below commands. 1) switch to capped mode: `# echo 8 > /sys/class/drm/card0/device/pp_power_profile_mode` 2) switch to uncapped mode: `# echo 9 > /sys/class/drm/card0/device/pp_power_profile_mode` 3) check current mode: $ cat /sys/class/drm/card0/device/pp_power_profile_mode 1 3D_FULL_SCREEN 3 VIDEO 4 VR 5 COMPUTE 6 CUSTOM 8 CAPPED 9 UNCAPPED* Acked-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Perry Yuan <perry.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Shashank Sharma authored
This patch fixes a return value check in kfd doorbell handling. This function should return 0(error) only when the ida_simple_get returns < 0(error), return > 0 is a success case. Cc: Felix Kuehling <Felix.Kuehling@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Fixes: 16f00131 ("drm/amdkfd: Allocate doorbells only when needed") Acked-by: Christian Koenig <chriatian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Shashank Sharma <shashank.sharma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Christian König authored
We only need one offset and not an array of it. Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add PSP IP handling for PSP 13.0.6 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Initialize ta ucode for psp v13_0_6 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
parse psp_v13_0_6_sos.bin and initialze various psp ucode arraies respectively Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Initialize psp ip callbacks for PSP 13.0.6. Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <le.ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Le Ma authored
Use sdma 4.4.2 IP block for chips with sdma 4.4.2 hardware. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Le Ma authored
Add support for SDMA 4.4.2. v1: Create sdma_v4_4_2.[c|h] for initial support (Le) v2: update amdgpu_ring_init call with atomic score (Hawking) v3: Squash in sdma_start fixes (Alex) v4: Comment out currently unused RAS code (Alex) Signed-off-by: Le Ma <le.ma@amd.com> Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add sdma v4_4_2 register offset and shift masks header files v2: update headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add HDP IP handling for HDP 4.4.2 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Le Ma authored
No mmHDP_READ_CACHE_INVALIDATE register on HDP 4.4.2. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add hdp v4_4_2 register offset and shift masks header files v2: update headers (Alex) Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Hawking Zhang authored
Add IH IP handling for IH 4.4.2 Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Le Ma <Le.Ma@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Le Ma authored
No ih2 hardware on IH 4.4.2. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Le Ma authored
Share same register address with IH 4.4.0. Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Muhammad Usama Anjum authored
The less than zero comparison of unsigned variable "value" is never true. Remove dead code. Fixes: c3ed0e72 ("drm/amdgpu: added a sysfs interface for thermal throttling") Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Deepak R Varma authored
The if / else block code has same effect irrespective of the logical evaluation. Hence, simply the implementation by removing the unnecessary conditional evaluation. While at it, also fix the long line checkpatch complaint. Issue identified using cond_no_effect.cocci Coccinelle semantic patch script. Fixes: 9114b55f ("drm/amd/display: Fix SubVP control flow in the MPO context") Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Deepak R Varma <drv@mailo.com> Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Daniel Phillips authored
Our assumptions about how much KFD memory is currently available for allocation may be violated by various complexities so we define the reported value as advisory, however we should never report negative availability. Signed-off-by: Daniel Phillips <daniel.phillips@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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Mario Limonciello authored
The same strapping initialization issue that happened on NBIO 7.5.1 appears to be happening on NBIO 7.3.0. Apply the same fix to 7.3.0 as well. Note: This workaround relies upon the integrated GPU being enabled in BIOS. If the integrated GPU is disabled in BIOS a different workaround will be required. Reported-by: Thomas Glanzmann <thomas@glanzmann.de> Cc: Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/linux-usb/Y%2Fz9GdHjPyF2rNG3@glanzmann.de/T/#uSigned-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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lyndonli authored
On GPUs with RAS enabled, below call trace and hang are observed when shutting down device. v2: use DRM device unplugged flag instead of shutdown flag as the check to prevent memory wipe in shutdown stage. [ +0.000000] RIP: 0010:amdgpu_vram_mgr_fini+0x18d/0x1c0 [amdgpu] [ +0.000001] PKRU: 55555554 [ +0.000001] Call Trace: [ +0.000001] <TASK> [ +0.000002] amdgpu_ttm_fini+0x140/0x1c0 [amdgpu] [ +0.000183] amdgpu_bo_fini+0x27/0xa0 [amdgpu] [ +0.000184] gmc_v11_0_sw_fini+0x2b/0x40 [amdgpu] [ +0.000163] amdgpu_device_fini_sw+0xb6/0x510 [amdgpu] [ +0.000152] amdgpu_driver_release_kms+0x16/0x30 [amdgpu] [ +0.000090] drm_dev_release+0x28/0x50 [drm] [ +0.000016] devm_drm_dev_init_release+0x38/0x60 [drm] [ +0.000011] devm_action_release+0x15/0x20 [ +0.000003] release_nodes+0x40/0xc0 [ +0.000001] devres_release_all+0x9e/0xe0 [ +0.000001] device_unbind_cleanup+0x12/0x80 [ +0.000003] device_release_driver_internal+0xff/0x160 [ +0.000001] driver_detach+0x4a/0x90 [ +0.000001] bus_remove_driver+0x6c/0xf0 [ +0.000001] driver_unregister+0x31/0x50 [ +0.000001] pci_unregister_driver+0x40/0x90 [ +0.000003] amdgpu_exit+0x15/0x120 [amdgpu] Signed-off-by: lyndonli <Lyndon.Li@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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bobzhou authored
building with gcc and W=1 reports drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c:7292:11: error: unused variable 'tmp' [-Werror=unused-variable] uint32_t tmp; ^~~ tmp is not used so remove it. Signed-off-by: bobzhou <bob.zhou@amd.com> Reviewed-by: Guchun Chen <guchun.chen@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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