- 17 Jul, 2018 7 commits
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Sean Wang authored
After the commit acf137951367 ("pinctrl: core: Return selector to the pinctrl driver") and the commit 47f1242d19c3 ("pinctrl: pinmux: Return selector to the pinctrl driver"), it's necessary to add the fixes needed for the pin controller drivers to use the appropriate returned selector for a negative error number returned in case of the fail at these functions. Otherwise, the driver would have a failed probe and that causes boot message cannot correctly output and devices fail to acquire their own pins. Cc: Kevin Hilman <khilman@baylibre.com> Fixes: acf137951367 ("pinctrl: core: Return selector to the pinctrl driver") Fixes: 47f1242d19c3 ("pinctrl: pinmux: Return selector to the pinctrl driver") Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Wei Yongjun authored
Add the missing unlock before return from function in the error handling case. Fixes: 0f5972033509 ("pinctrl: single: Fix group and function selector use") Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Lindgren authored
With no users left for these functions let's remove them. Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Cc: Christ van Willegen <cvwillegen@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-By: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Lindgren authored
We must use a mutex around the generic_add functions and save the function and group selector in case we need to remove them. Otherwise the selector use will be racy for deferred probe at least. Fixes: 5a49b644 ("pinctrl: Renesas RZ/A1 pin and gpio controller") Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Cc: Christ van Willegen <cvwillegen@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Sean Wang <sean.wang@mediatek.com> Acked-by: Jacopo Mondi <jacopo@jmondi.org> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-By: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Lindgren authored
We must use a mutex around the generic_add functions and save the function and group selector in case we need to remove them. Otherwise the selector use will be racy for deferred probe at least. Note that struct device_node *np is unused in pcs_add_function() we remove that too and fix a checkpatch warning for bare unsigned while at it. Fixes: 571aec4d ("pinctrl: single: Use generic pinmux helpers for managing functions") Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Cc: Christ van Willegen <cvwillegen@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-By: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Lindgren authored
We must return the selector from pinmux_generic_add_function() so pin controller device drivers can remove the right group if needed for deferred probe for example. And we now must make sure that a proper name is passed so we can use it to check if the entry already exists. Note that fixes are also needed for the pin controller drivers to use the selector value. Fixes: a76edc89 ("pinctrl: core: Add generic pinctrl functions for managing groups") Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Cc: Christ van Willegen <cvwillegen@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-By: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Tony Lindgren authored
We must return the selector from pinctrl_generic_add_group() so pin controller device drivers can remove the right group if needed for deferred probe for example. And we now must make sure that a proper name is passed so we can use it to check if the entry already exists. Note that fixes are also needed for the pin controller drivers to use the selector value. Fixes: c7059c5a ("pinctrl: core: Add generic pinctrl functions for managing groups") Reported-by: H. Nikolaus Schaller <hns@goldelico.com> Cc: Christ van Willegen <cvwillegen@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@linaro.org> Cc: Jacopo Mondi <jacopo+renesas@jmondi.org> Cc: Paul Cercueil <paul@crapouillou.net> Cc: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Tested-By: H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 16 Jul, 2018 13 commits
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Jisheng Zhang authored
Add as370 to existing berlin pinctrl device tree binding. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Wei Yongjun authored
Remove unneeded error handling on the result of a call to platform_get_resource() when the value is passed to devm_ioremap_resource(). Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Alexandre Belloni authored
the TWI function on GPIO4 is actually a multiplexed SCL, not an original TWI SDA or SCL. Fix it. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lucas Stach authored
The i.MX8MQ pincontrol works in a similar way to the earlier i.MX SoCs. This driver builds on top of the imx specific pinconf handling. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Abel Vesa authored
This adds the binding for the i.MX8MQ pin controller, in the same fashion as earlier i.MX SoCs. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Acked-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Gustavo A. R. Silva authored
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Addresses-Coverity-ID: 1292308 ("Missing break in switch") Addresses-Coverity-ID: 1292309 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Ludovic Desroches authored
Add support for the drive strength configuration. Usually, this value is expressed in mA. Since the numeric value depends on VDDIOP voltage, a value we can't retrieve at runtime, the controller uses low, medium and high to define the drive strength. The PIO controller accepts two values for the low drive configuration: 0 and 1. Most of the time, we don't care about the drive strength. So we keep the default value which is 0. The drive strength is advertised through the sysfs only when it has been explicitly set in the device tree i.e. if its value is different from 0. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Gustavo A. R. Silva authored
In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. Warning level 2 was used: -Wimplicit-fallthrough=2 Addresses-Coverity-ID: 1463284 ("Missing break in switch") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jerome Brunet authored
Add the pinctrl configuration for gen_clk on gxbb and axg. gen_clk allows to output and devide several internal clocks of SoC, including most of the plls. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Takeshi Kihara authored
This patch adds USB30_{PWEN,OVC} and USB3HS0_ID pins, groups and functions to the R8A77990 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Takeshi Kihara authored
This patch adds USB0_{PWEN,OVC}_{A,B} and USB0_ID pins, groups and functions to the R8A77990 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Yoshihiro Shimoda authored
Since the datasheet Rev.1.00 has an error about the USB ID pin name, this patch revises it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Takeshi Kihara authored
This patch adds HSCIF{0,1,2,3,4} pins, groups and functions to the R8A77965 SoC. Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 09 Jul, 2018 3 commits
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Douglas Anderson authored
If you do this on an sdm845 board: grep "" /sys/kernel/debug/pinctrl/*spmi:pmic*/pinconf-groups ...it looks like nonsense. For every pin you see listed: input bias disabled, input bias high impedance, input bias pull down, input bias pull up, ... That's because pmic_gpio_config_get() isn't complying with the rules that pinconf_generic_dump_one() expects. Specifically for boolean parameters (anything with a "struct pin_config_item" where has_arg is false) the function expects that the function should return its value not through the "config" parameter but should return "0" if the value is set and "-EINVAL" if the value isn't set. Let's fix this. From a quick sample of other pinctrl drivers, it appears to be tradition to also return 1 through the config parameter for these boolean parameters when they exist. I'm not one to knock tradition, so I'll follow tradition and return 1 in these cases. While I'm at it, I'll also continue searching for four leaf clovers, kocking on wood three times, and trying not to break mirrors. NOTE: This also fixes an apparent typo for reading PIN_CONFIG_BIAS_DISABLE where the old driver was accidentally using "=" instead of "==" and thus was setting some internal state when you tried to query PIN_CONFIG_BIAS_DISABLE. Oops. Fixes: eadff302 ("pinctrl: Qualcomm SPMI PMIC GPIO pin controller driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Douglas Anderson authored
If you do this on an sdm845 board: cat /sys/kernel/debug/pinctrl/3400000.pinctrl/pinconf-groups ...it looks like nonsense. For every pin you see listed: input bias bus hold, input bias disabled, input bias pull down, input bias pull up That's because msm_config_group_get() isn't complying with the rules that pinconf_generic_dump_one() expects. Specifically for boolean parameters (anything with a "struct pin_config_item" where has_arg is false) the function expects that the function should return its value not through the "config" parameter but should return "0" if the value is set and "-EINVAL" if the value isn't set. Let's fix this. From a quick sample of other pinctrl drivers, it appears to be tradition to also return 1 through the config parameter for these boolean parameters when they exist. I'm not one to knock tradition, so I'll follow tradition and return 1 in these cases. While I'm at it, I'll also continue searching for four leaf clovers, kocking on wood three times, and trying not to break mirrors. Fixes: f365be09 ("pinctrl: Add Qualcomm TLMM driver") Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Douglas Anderson authored
The pinconf_generic_dump_one() function makes the assumption that pin_config_group_get() should return -EINVAL and -ENOTSUPP just like pin_config_get() does. Document that so it's more obvious. Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 02 Jul, 2018 2 commits
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Colin Ian King authored
The check to see if platform_get_irq failed is performed on the unsigned value of pctrl->irq[i] and the check is never true because an unsigned cannot be less than zero. Fix this by assinging the signed int ret to the return of platform_get_irq and checking ret instead. Detected by CoverityScan, CID#1470247 ("Unsigned comparison against 0") Fixes: 6c5d0736 ("pinctrl: actions: Add interrupt support for OWL S900 SoC") Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Andy Shevchenko authored
Reduce size of duplicated comments by switching to use SPDX identifier. No functional change. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 29 Jun, 2018 4 commits
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Andy Shevchenko authored
This adds pinctrl/GPIO support for Intel Ice Lake PCH. The Ice Lake PCH GPIO is based on the same version of the Intel GPIO hardware than Intel Cannon Lake with different set of pins and ACPI ID. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Miquel Raynal authored
Add suspend/resume hooks in pinctrl driver to handle S2RAM operations. Beyond the traditional register save/restore operations, these hooks also keep the GPIOs used for both-edge IRQ synchronized between their level (low/high) and expected IRQ polarity (falling/rising edge). Since pinctrl is an infrastructure module, its resume should be issued prior to other IO drivers. The pinctrl PM operations are requested at early/late stages for this reason. Suggested-by: Ken Ma <make@marvell.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Gregory CLEMENT <gregory.clement@bootlin.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Manivannan Sadhasivam authored
Add interrupt support for Actions Semi OWL S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Manivannan Sadhasivam authored
Add gpio interrupt bindings for Actions Semi S900 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 28 Jun, 2018 3 commits
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Christian Lamparter authored
This patch adds the gpio-ranges and gpio-reserved-ranges property definitions to the binding text files supported by the pinctrl-msm driver framework. gpio-ranges: For DT-based platforms the pinctrl-msm framework currently relies on the deprecated-for-DT gpiochip_add_pin_range() function to add the range of GPIOs to be handled by the pin controller. Due to interactions within gpiolib code, this causes the pinctrl-msm driver to bail out (-517) during boot when a gpio-hog is declared. This can be fatal and cause the system to not boot or reset (for a detailed explanation and call-trace, refer to patch: "pinctrl: msm: fix gpio-hog related boot issues" in this series). gpio-reserved-ranges: The binding has been added as a precaution since the TrustZone firmware (aka QSEE), which is running as the hypervisor, might have reserved certain, but undisclosed pins. Hence reading or writing to the registers for those pins will cause an XPU violation and this subsequently crashes the kernel. Signed-off-by: Christian Lamparter <chunkeey@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Joel Stanley authored
Fixes these warnings: pinctrl-aspeed.c:112: warning: Function parameter or member 'map' not described in 'aspeed_sig_desc_eval' pinctrl-aspeed.c:112: warning: Excess function parameter 'regmap' description in 'aspeed_sig_desc_eval' Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Mika Westerberg authored
The driver missed the fact that PECI_SMB_DATA has moved from EAST community 224 to 182 instead. Correct the pin ordering accordingly. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 26 Jun, 2018 1 commit
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Linus Walleij authored
Some logical error in the gemini pin control driver made it not mask and write properly for the GMAC. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 18 Jun, 2018 5 commits
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Linus Walleij authored
We simply don't use sysfs. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Stephen Boyd authored
Update the binding for two more PMICs supported by the same driver. While we're here, remove the duplicate pmi8994 lines because that support got merged twice. Cc: Rajendra Nayak <rnayak@codeaurora.org> Cc: <devicetree@vger.kernel.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Geert Uytterhoeven authored
The divisions (and multiplications) can be avoided by changing the loops to use increments of mux_bytes instead of 1. While at it, remove the unneeded casts when assigning void pointers. This saves +100 bytes of kernel size on arm32/arm64. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jan Kundrát authored
Apart from the usual stuff, the debugfs code is currently also used for one non-obvious side effect. It attempts to check whether the chip's registers are still set to an expected value, and if not, re-initializes them. It seems that the driver has "always" done so. The code, however, also checks the INTF register which normally indicates which pins have caused the recent interrupt. That's a volatile register, and the datasheet says that writes are ignored in there. When I'm just cat-ing /sys/kernel/debug/gpio with no SPI traffic and no nosie on the GPIO lines, I'm not getting any warnings. Once I actually use these GPIOs and cat that file in parallel, I always seem to get a: mcp23s08 spi1.1: restoring reg 0x07 from 0x0000 to 0xffff (power-loss?) This might be a sign that I should not leave my unused inputs floating, but the code should not be checking a volatile register, anyway. Let's simply skip this last item in the iteration. I was also considering removing this enitre re-initialization because it's non-obvious, but the code survived various refactorings already and has sign-offs by people who know more than I do, so let's leave it as-is. For now :). Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Reviewed-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Jan Kundrát authored
Commit d8f4494e removed comments which described this limitation. The code supported interrupts even before. Also add some spacing so that the chip IDs are a bit more readable. Signed-off-by: Jan Kundrát <jan.kundrat@cesnet.cz> Reviewed-by: Phil Reid <preid@electromag.com.au> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- 16 Jun, 2018 2 commits
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Linus Torvalds authored
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git://git.kernel.dk/linux-blockLinus Torvalds authored
Pull block fixes from Jens Axboe: "A collection of fixes that should go into -rc1. This contains: - bsg_open vs bsg_unregister race fix (Anatoliy) - NVMe pull request from Christoph, with fixes for regressions in this window, FC connect/reconnect path code unification, and a trace point addition. - timeout fix (Christoph) - remove a few unused functions (Christoph) - blk-mq tag_set reinit fix (Roman)" * tag 'for-linus-20180616' of git://git.kernel.dk/linux-block: bsg: fix race of bsg_open and bsg_unregister block: remov blk_queue_invalidate_tags nvme-fabrics: fix and refine state checks in __nvmf_check_ready nvme-fabrics: handle the admin-only case properly in nvmf_check_ready nvme-fabrics: refactor queue ready check blk-mq: remove blk_mq_tagset_iter nvme: remove nvme_reinit_tagset nvme-fc: fix nulling of queue data on reconnect nvme-fc: remove reinit_request routine blk-mq: don't time out requests again that are in the timeout handler nvme-fc: change controllers first connect to use reconnect path nvme: don't rely on the changed namespace list log nvmet: free smart-log buffer after use nvme-rdma: fix error flow during mapping request data nvme: add bio remapping tracepoint nvme: fix NULL pointer dereference in nvme_init_subsystem blk-mq: reinit q->tag_set_list entry only after grace period
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